cxgb4vf: Remove superfluous "idx" parameter of CH_DEVICE() macro.
Remove redundant idx parameter of CH_DEVICE() macro, its always zero. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2907,60 +2907,60 @@ static void cxgb4vf_pci_shutdown(struct pci_dev *pdev)
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/*
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* PCI Device registration data structures.
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*/
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#define CH_DEVICE(devid, idx) \
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{ PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
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#define CH_DEVICE(devid) \
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{ PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }
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static const struct pci_device_id cxgb4vf_pci_tbl[] = {
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CH_DEVICE(0xb000, 0), /* PE10K FPGA */
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CH_DEVICE(0x4801, 0), /* T420-cr */
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CH_DEVICE(0x4802, 0), /* T422-cr */
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CH_DEVICE(0x4803, 0), /* T440-cr */
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CH_DEVICE(0x4804, 0), /* T420-bch */
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CH_DEVICE(0x4805, 0), /* T440-bch */
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CH_DEVICE(0x4806, 0), /* T460-ch */
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CH_DEVICE(0x4807, 0), /* T420-so */
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CH_DEVICE(0x4808, 0), /* T420-cx */
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CH_DEVICE(0x4809, 0), /* T420-bt */
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CH_DEVICE(0x480a, 0), /* T404-bt */
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CH_DEVICE(0x480d, 0), /* T480-cr */
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CH_DEVICE(0x480e, 0), /* T440-lp-cr */
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CH_DEVICE(0x4880, 0),
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CH_DEVICE(0x4880, 1),
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CH_DEVICE(0x4880, 2),
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CH_DEVICE(0x4880, 3),
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CH_DEVICE(0x4880, 4),
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CH_DEVICE(0x4880, 5),
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CH_DEVICE(0x4880, 6),
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CH_DEVICE(0x4880, 7),
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CH_DEVICE(0x4880, 8),
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CH_DEVICE(0x5801, 0), /* T520-cr */
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CH_DEVICE(0x5802, 0), /* T522-cr */
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CH_DEVICE(0x5803, 0), /* T540-cr */
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CH_DEVICE(0x5804, 0), /* T520-bch */
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CH_DEVICE(0x5805, 0), /* T540-bch */
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CH_DEVICE(0x5806, 0), /* T540-ch */
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CH_DEVICE(0x5807, 0), /* T520-so */
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CH_DEVICE(0x5808, 0), /* T520-cx */
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CH_DEVICE(0x5809, 0), /* T520-bt */
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CH_DEVICE(0x580a, 0), /* T504-bt */
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CH_DEVICE(0x580b, 0), /* T520-sr */
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CH_DEVICE(0x580c, 0), /* T504-bt */
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CH_DEVICE(0x580d, 0), /* T580-cr */
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CH_DEVICE(0x580e, 0), /* T540-lp-cr */
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CH_DEVICE(0x580f, 0), /* Amsterdam */
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CH_DEVICE(0x5810, 0), /* T580-lp-cr */
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CH_DEVICE(0x5811, 0), /* T520-lp-cr */
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CH_DEVICE(0x5812, 0), /* T560-cr */
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CH_DEVICE(0x5813, 0), /* T580-cr */
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CH_DEVICE(0x5814, 0), /* T580-so-cr */
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CH_DEVICE(0x5815, 0), /* T502-bt */
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CH_DEVICE(0x5880, 0),
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CH_DEVICE(0x5881, 0),
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CH_DEVICE(0x5882, 0),
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CH_DEVICE(0x5883, 0),
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CH_DEVICE(0x5884, 0),
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CH_DEVICE(0x5885, 0),
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CH_DEVICE(0x5886, 0),
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CH_DEVICE(0xb000), /* PE10K FPGA */
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CH_DEVICE(0x4801), /* T420-cr */
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CH_DEVICE(0x4802), /* T422-cr */
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CH_DEVICE(0x4803), /* T440-cr */
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CH_DEVICE(0x4804), /* T420-bch */
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CH_DEVICE(0x4805), /* T440-bch */
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CH_DEVICE(0x4806), /* T460-ch */
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CH_DEVICE(0x4807), /* T420-so */
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CH_DEVICE(0x4808), /* T420-cx */
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CH_DEVICE(0x4809), /* T420-bt */
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CH_DEVICE(0x480a), /* T404-bt */
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CH_DEVICE(0x480d), /* T480-cr */
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CH_DEVICE(0x480e), /* T440-lp-cr */
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4880),
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CH_DEVICE(0x5801), /* T520-cr */
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CH_DEVICE(0x5802), /* T522-cr */
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CH_DEVICE(0x5803), /* T540-cr */
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CH_DEVICE(0x5804), /* T520-bch */
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CH_DEVICE(0x5805), /* T540-bch */
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CH_DEVICE(0x5806), /* T540-ch */
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CH_DEVICE(0x5807), /* T520-so */
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CH_DEVICE(0x5808), /* T520-cx */
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CH_DEVICE(0x5809), /* T520-bt */
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CH_DEVICE(0x580a), /* T504-bt */
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CH_DEVICE(0x580b), /* T520-sr */
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CH_DEVICE(0x580c), /* T504-bt */
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CH_DEVICE(0x580d), /* T580-cr */
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CH_DEVICE(0x580e), /* T540-lp-cr */
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CH_DEVICE(0x580f), /* Amsterdam */
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CH_DEVICE(0x5810), /* T580-lp-cr */
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CH_DEVICE(0x5811), /* T520-lp-cr */
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CH_DEVICE(0x5812), /* T560-cr */
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CH_DEVICE(0x5813), /* T580-cr */
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CH_DEVICE(0x5814), /* T580-so-cr */
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CH_DEVICE(0x5815), /* T502-bt */
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CH_DEVICE(0x5880),
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CH_DEVICE(0x5881),
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CH_DEVICE(0x5882),
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CH_DEVICE(0x5883),
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CH_DEVICE(0x5884),
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CH_DEVICE(0x5885),
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CH_DEVICE(0x5886),
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{ 0, }
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};
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