staging: nvec: Allow TX buffers only in the upper 75% of the pool
Allow TX buffers to be allocated only in the upper 75% of the pool to avoid a completely filled buffer preventing the driver from processing responses. This also improves performance, as RX allocations do not require checking buffers allocated for TX unless there are more than 16 incoming messages -- which is highly unlikely. An earlier version used the lower 75% for TX messages, but that was considered to be not that effective due to the overlaps of RX and TX buffers mentioned above. Signed-off-by: Julian Andres Klode <jak@jak-linux.org> Acked-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -62,6 +62,16 @@
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#define I2C_SL_ADDR2 0x30
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#define I2C_SL_DELAY_COUNT 0x3c
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/**
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* enum nvec_msg_category - Message categories for nvec_msg_alloc()
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* @NVEC_MSG_RX: The message is an incoming message (from EC)
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* @NVEC_MSG_TX: The message is an outgoing message (to EC)
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*/
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enum nvec_msg_category {
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NVEC_MSG_RX,
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NVEC_MSG_TX,
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};
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static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00";
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static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01";
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static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15";
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@ -131,23 +141,31 @@ static int nvec_status_notifier(struct notifier_block *nb,
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/**
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* nvec_msg_alloc:
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* @nvec: A &struct nvec_chip
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* @category: Pool category, see &enum nvec_msg_category
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*
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* Allocate a single &struct nvec_msg object from the message pool of
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* @nvec. The result shall be passed to nvec_msg_free() if no longer
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* used.
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*
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* Outgoing messages are placed in the upper 75% of the pool, keeping the
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* lower 25% available for RX buffers only. The reason is to prevent a
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* situation where all buffers are full and a message is thus endlessly
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* retried because the response could never be processed.
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*/
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static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec)
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static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec,
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enum nvec_msg_category category)
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{
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int i;
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int i = (category == NVEC_MSG_TX) ? (NVEC_POOL_SIZE / 4) : 0;
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for (i = 0; i < NVEC_POOL_SIZE; i++) {
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for (; i < NVEC_POOL_SIZE; i++) {
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if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) {
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dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i);
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return &nvec->msg_pool[i];
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}
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}
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dev_err(nvec->dev, "could not allocate buffer\n");
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dev_err(nvec->dev, "could not allocate %s buffer\n",
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(category == NVEC_MSG_TX) ? "TX" : "RX");
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return NULL;
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}
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@ -230,7 +248,8 @@ int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data,
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struct nvec_msg *msg;
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unsigned long flags;
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msg = nvec_msg_alloc(nvec);
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msg = nvec_msg_alloc(nvec, NVEC_MSG_TX);
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if (msg == NULL)
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return -ENOMEM;
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@ -534,7 +553,7 @@ static irqreturn_t nvec_interrupt(int irq, void *dev)
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if (status != I2C_SL_IRQ) {
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nvec_invalid_flags(nvec, status, true);
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} else {
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nvec->rx = nvec_msg_alloc(nvec);
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nvec->rx = nvec_msg_alloc(nvec, NVEC_MSG_RX);
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nvec->rx->data[0] = received;
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nvec->rx->pos = 1;
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nvec->state = 2;
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