ixgbe: Allow Priority Flow Control settings to survive a device reset
When changing DCB parameters, ixgbe needs to have the MAC reset. The way the flow control code is setup today, PFC will be disabled on a reset. This patch adds a new flow control type for PFC, and then has the netlink layer take care of toggling which type of flow control to enable. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1654,9 +1654,10 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
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* 0: Flow control is completely disabled
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* 1: Rx flow control is enabled (we can receive pause frames,
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* but not send pause frames).
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* 2: Tx flow control is enabled (we can send pause frames but
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* we do not support receiving pause frames).
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* 2: Tx flow control is enabled (we can send pause frames but
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* we do not support receiving pause frames).
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* 3: Both Rx and Tx flow control (symmetric) are enabled.
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* 4: Priority Flow Control is enabled.
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* other: Invalid.
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*/
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switch (hw->fc.current_mode) {
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@ -1686,6 +1687,11 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
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mflcn_reg |= IXGBE_MFLCN_RFCE;
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fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;
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break;
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#ifdef CONFIG_DCB
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case ixgbe_fc_pfc:
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goto out;
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break;
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#endif
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default:
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hw_dbg(hw, "Flow control param set incorrectly\n");
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ret_val = -IXGBE_ERR_CONFIG;
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@ -1746,6 +1752,7 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
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* 2: Tx flow control is enabled (we can send pause frames but
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* we do not support receiving pause frames).
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* 3: Both Rx and Tx flow control (symmetric) are enabled.
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* 4: Priority Flow Control is enabled.
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* other: Invalid.
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*/
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switch (hw->fc.current_mode) {
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@ -1776,6 +1783,11 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
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/* Flow control (both Rx and Tx) is enabled by SW override. */
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reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
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break;
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#ifdef CONFIG_DCB
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case ixgbe_fc_pfc:
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goto out;
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break;
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#endif
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default:
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hw_dbg(hw, "Flow control param set incorrectly\n");
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ret_val = -IXGBE_ERR_CONFIG;
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@ -1874,6 +1886,13 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
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ixgbe_link_speed speed;
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bool link_up;
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#ifdef CONFIG_DCB
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if (hw->fc.requested_mode == ixgbe_fc_pfc) {
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hw->fc.current_mode = hw->fc.requested_mode;
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goto out;
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}
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#endif
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/* Validate the packetbuf configuration */
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if (packetbuf_num < 0 || packetbuf_num > 7) {
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hw_dbg(hw, "Invalid packet buffer number [%d], expected range "
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@ -298,7 +298,6 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
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reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
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reg &= ~IXGBE_RMCS_TFCE_802_3X;
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/* correct the reporting of our flow control status */
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hw->fc.current_mode = ixgbe_fc_none;
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reg |= IXGBE_RMCS_TFCE_PRIORITY;
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IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);
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@ -299,9 +299,6 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw,
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goto out;
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}
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/* PFC is mutually exclusive with link flow control */
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hw->fc.current_mode = ixgbe_fc_none;
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/* Configure PFC Tx thresholds per TC */
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
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/* Config and remember Tx */
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@ -130,6 +130,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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adapter->tx_ring = NULL;
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adapter->rx_ring = NULL;
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adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
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adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
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adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
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ixgbe_init_interrupt_scheme(adapter);
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@ -138,6 +139,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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} else {
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/* Turn off DCB */
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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adapter->hw.fc.requested_mode = ixgbe_fc_default;
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_reset_interrupt_capability(adapter);
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@ -1939,6 +1939,9 @@ enum ixgbe_fc_mode {
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ixgbe_fc_rx_pause,
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ixgbe_fc_tx_pause,
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ixgbe_fc_full,
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#ifdef CONFIG_DCB
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ixgbe_fc_pfc,
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#endif
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ixgbe_fc_default
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};
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