tg3: Tune 5785 clock switching
This patch tunes the timeouts the CPMU uses to decide when to switch from the clocks output by the PHY to internal clock sources. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5e7ccf2003
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@ -917,7 +917,9 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
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tw32(MAC_PHYCFG2, val);
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val = tr32(MAC_PHYCFG1);
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val &= ~MAC_PHYCFG1_RGMII_INT;
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val &= ~(MAC_PHYCFG1_RGMII_INT |
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MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK);
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val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT;
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tw32(MAC_PHYCFG1, val);
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return;
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@ -933,15 +935,18 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
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tw32(MAC_PHYCFG2, val);
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val = tr32(MAC_PHYCFG1) & ~(MAC_PHYCFG1_RGMII_EXT_RX_DEC |
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MAC_PHYCFG1_RGMII_SND_STAT_EN);
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if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE) {
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val = tr32(MAC_PHYCFG1);
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val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK |
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MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN);
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if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) {
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if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
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val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC;
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if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_TX_EN)
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val |= MAC_PHYCFG1_RGMII_SND_STAT_EN;
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}
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tw32(MAC_PHYCFG1, val | MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV);
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val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT |
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MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV;
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tw32(MAC_PHYCFG1, val);
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val = tr32(MAC_EXT_RGMII_MODE);
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val &= ~(MAC_RGMII_MODE_RX_INT_B |
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@ -524,6 +524,10 @@
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/* 0x598 --> 0x5a0 unused */
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#define MAC_PHYCFG1 0x000005a0
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#define MAC_PHYCFG1_RGMII_INT 0x00000001
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#define MAC_PHYCFG1_RXCLK_TO_MASK 0x00001ff0
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#define MAC_PHYCFG1_RXCLK_TIMEOUT 0x00001000
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#define MAC_PHYCFG1_TXCLK_TO_MASK 0x01ff0000
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#define MAC_PHYCFG1_TXCLK_TIMEOUT 0x01000000
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#define MAC_PHYCFG1_RGMII_EXT_RX_DEC 0x02000000
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#define MAC_PHYCFG1_RGMII_SND_STAT_EN 0x04000000
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#define MAC_PHYCFG1_TXC_DRV 0x20000000
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