sparc64: Handle hugepage TSB being NULL.
Accomodate the possibility that the TSB might be NULL at the point that update_mmu_cache() is invoked. This is necessary because we will sometimes need to defer the TSB allocation to the first fault that happens in the 'mm'. Seperate out the hugepage PTE test into a seperate function so that the logic is clearer. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -314,16 +314,31 @@ static void __update_mmu_tsb_insert(struct mm_struct *mm, unsigned long tsb_inde
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struct tsb *tsb = mm->context.tsb_block[tsb_index].tsb;
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unsigned long tag;
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if (unlikely(!tsb))
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return;
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tsb += ((address >> tsb_hash_shift) &
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(mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
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tag = (address >> 22UL);
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tsb_insert(tsb, tag, tte);
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}
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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static inline bool is_hugetlb_pte(pte_t pte)
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{
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if ((tlb_type == hypervisor &&
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(pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
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(tlb_type != hypervisor &&
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(pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U))
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return true;
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return false;
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}
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#endif
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
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{
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unsigned long tsb_index, tsb_hash_shift, flags;
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struct mm_struct *mm;
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unsigned long flags;
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pte_t pte = *ptep;
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if (tlb_type != hypervisor) {
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@ -335,25 +350,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
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mm = vma->vm_mm;
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tsb_index = MM_TSB_BASE;
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tsb_hash_shift = PAGE_SHIFT;
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spin_lock_irqsave(&mm->context.lock, flags);
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) {
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if ((tlb_type == hypervisor &&
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(pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
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(tlb_type != hypervisor &&
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(pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U)) {
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tsb_index = MM_TSB_HUGE;
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tsb_hash_shift = HPAGE_SHIFT;
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}
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}
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if (mm->context.huge_pte_count && is_hugetlb_pte(pte))
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__update_mmu_tsb_insert(mm, MM_TSB_HUGE, HPAGE_SHIFT,
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address, pte_val(pte));
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else
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#endif
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__update_mmu_tsb_insert(mm, tsb_index, tsb_hash_shift,
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address, pte_val(pte));
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__update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,
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address, pte_val(pte));
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spin_unlock_irqrestore(&mm->context.lock, flags);
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}
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