redonkable/remarkable-linux
redonkable/remarkable-linux
1
0
Fork 0
Code Releases Activity

ARM: dts: Adding CPU cooling binding for Exynos SoCs

Browse source 
Presented patch aims to move data necessary for correct CPU cooling device
configuration from exynos_tmu_data.c to device tree.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Lukasz Majewski 2015-01-30 08:26:02 +09:00 committed by Kukjin Kim
parent 233e274ac7
commit bf4a0bed36
7 changed files with 76 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
arch/arm/boot/dts/exynos4210-trats.dts
View file

@ -430,6 +430,21 @@
status = "okay";
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 4 4>;
};
};
};
};
camera {
pinctrl-names = "default";
pinctrl-0 = <>;

5
arch/arm/boot/dts/exynos4210.dtsi
View file

@ -35,10 +35,13 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@900 {
cpu0: cpu@900 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x900>;
cooling-min-level = <4>;
cooling-max-level = <2>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@901 {

5
arch/arm/boot/dts/exynos4212.dtsi
View file

@ -26,10 +26,13 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
cpu0: cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
cooling-min-level = <13>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@A01 {

15
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file

@ -423,6 +423,21 @@
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>;
};
};
};
};
};
&pinctrl_1 {

15
arch/arm/boot/dts/exynos4412-trats2.dts
View file

@ -927,6 +927,21 @@
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>;
};
};
};
};
};
&pmu_system_controller {

5
arch/arm/boot/dts/exynos4412.dtsi
View file

@ -26,10 +26,13 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
cpu0: cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
cooling-min-level = <13>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@A01 {

20
arch/arm/boot/dts/exynos5250.dtsi
View file

@ -58,11 +58,14 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1700000000>;
cooling-min-level = <15>;
cooling-max-level = <9>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@1 {
device_type = "cpu";
@ -243,6 +246,21 @@
clock-names = "tmu_apbif";
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 9 9>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 15 15>;
};
};
};
};
serial@12C00000 {
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";