ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible"
Fixed code indent tabs in respetcive imx6qdl dtsi files. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -153,9 +153,9 @@
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ecspi3 {
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@ -154,9 +154,9 @@
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&fec {
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@ -144,9 +144,9 @@
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&fec {
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@ -291,7 +291,7 @@
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MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
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MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
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>;
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};
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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@ -427,10 +427,10 @@
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3
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&pinctrl_usdhc3_cdwp>;
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cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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status = "disabled";
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};
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@ -283,7 +283,7 @@
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VD-supply = <®_audio>;
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VLS-supply = <®_audio>;
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VLC-supply = <®_audio>;
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};
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};
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};
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@ -129,8 +129,8 @@
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pinctrl-0 = <&pinctrl_gpio_leds>;
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red {
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gpios = <&gpio1 2 0>;
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default-state = "on";
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gpios = <&gpio1 2 0>;
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default-state = "on";
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};
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};
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@ -204,9 +204,9 @@
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
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<&clks IMX6QDL_CLK_LVDS1_GATE>,
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<&clks IMX6QDL_CLK_PCIE_REF_125M>;
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