Merge 3.18-rc7 into usb-next
We need the xhci fixes here and this resolves a merge issue with drivers/usb/dwc3/ep0.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
commit
c00552ebaf
|
@ -3,8 +3,10 @@
|
|||
Required properties:
|
||||
- compatible : should contain one of the following:
|
||||
- "renesas,sata-r8a7779" for R-Car H1
|
||||
- "renesas,sata-r8a7790" for R-Car H2
|
||||
- "renesas,sata-r8a7791" for R-Car M2
|
||||
- "renesas,sata-r8a7790-es1" for R-Car H2 ES1
|
||||
- "renesas,sata-r8a7790" for R-Car H2 other than ES1
|
||||
- "renesas,sata-r8a7791" for R-Car M2-W
|
||||
- "renesas,sata-r8a7793" for R-Car M2-N
|
||||
- reg : address and length of the SATA registers;
|
||||
- interrupts : must consist of one interrupt specifier.
|
||||
|
||||
|
|
|
@ -30,10 +30,6 @@ should only be used when a device has multiple interrupt parents.
|
|||
Example:
|
||||
interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
|
||||
|
||||
A device node may contain either "interrupts" or "interrupts-extended", but not
|
||||
both. If both properties are present, then the operating system should log an
|
||||
error and use only the data in "interrupts".
|
||||
|
||||
2) Interrupt controller nodes
|
||||
-----------------------------
|
||||
|
||||
|
|
|
@ -7,3 +7,14 @@ And for the interrupt mapping part:
|
|||
|
||||
Open Firmware Recommended Practice: Interrupt Mapping
|
||||
http://www.openfirmware.org/1275/practice/imap/imap0_9d.pdf
|
||||
|
||||
Additionally to the properties specified in the above standards a host bridge
|
||||
driver implementation may support the following properties:
|
||||
|
||||
- linux,pci-domain:
|
||||
If present this property assigns a fixed PCI domain number to a host bridge,
|
||||
otherwise an unstable (across boots) unique number will be assigned.
|
||||
It is required to either not set this property at all or set it for all
|
||||
host bridges in the system, otherwise potentially conflicting domain numbers
|
||||
may be assigned to root buses behind different host bridges. The domain
|
||||
number for each host bridge in the system must be unique.
|
||||
|
|
|
@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
TZ1090-PDC's pin configuration nodes act as a container for an abitrary number
|
||||
TZ1090-PDC's pin configuration nodes act as a container for an arbitrary number
|
||||
of subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
TZ1090's pin configuration nodes act as a container for an abitrary number of
|
||||
TZ1090's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Lantiq's pin configuration nodes act as a container for an abitrary number of
|
||||
Lantiq's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those group(s), and two pin configuration parameters:
|
||||
|
|
|
@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Lantiq's pin configuration nodes act as a container for an abitrary number of
|
||||
Lantiq's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those group(s), and two pin configuration parameters:
|
||||
|
|
|
@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Tegra's pin configuration nodes act as a container for an abitrary number of
|
||||
Tegra's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -13,7 +13,7 @@ Optional properties:
|
|||
Please refer to pinctrl-bindings.txt in this directory for details of the common
|
||||
pinctrl bindings used by client devices.
|
||||
|
||||
SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
|
||||
SiRFprimaII's pinmux nodes act as a container for an arbitrary number of subnodes.
|
||||
Each of these subnodes represents some desired configuration for a group of pins.
|
||||
|
||||
Required subnode-properties:
|
||||
|
|
|
@ -32,7 +32,7 @@ Required properties:
|
|||
Please refer to pinctrl-bindings.txt in this directory for details of the common
|
||||
pinctrl bindings used by client devices.
|
||||
|
||||
SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each
|
||||
SPEAr's pinmux nodes act as a container for an arbitrary number of subnodes. Each
|
||||
of these subnodes represents muxing for a pin, a group, or a list of pins or
|
||||
groups.
|
||||
|
||||
|
|
|
@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Qualcomm's pin configuration nodes act as a container for an abitrary number of
|
||||
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -47,7 +47,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
The pin configuration nodes act as a container for an abitrary number of
|
||||
The pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Qualcomm's pin configuration nodes act as a container for an abitrary number of
|
||||
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -47,7 +47,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
The pin configuration nodes act as a container for an abitrary number of
|
||||
The pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
|
|||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Qualcomm's pin configuration nodes act as a container for an abitrary number of
|
||||
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
|
|
|
@ -34,6 +34,7 @@ chipidea Chipidea, Inc
|
|||
chrp Common Hardware Reference Platform
|
||||
chunghwa Chunghwa Picture Tubes Ltd.
|
||||
cirrus Cirrus Logic, Inc.
|
||||
cnm Chips&Media, Inc.
|
||||
cortina Cortina Systems, Inc.
|
||||
crystalfontz Crystalfontz America, Inc.
|
||||
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
|
||||
|
@ -92,6 +93,7 @@ maxim Maxim Integrated Products
|
|||
mediatek MediaTek Inc.
|
||||
micrel Micrel Inc.
|
||||
microchip Microchip Technology Inc.
|
||||
micron Micron Technology Inc.
|
||||
mitsubishi Mitsubishi Electric Corporation
|
||||
mosaixtech Mosaix Technologies, Inc.
|
||||
moxa Moxa
|
||||
|
@ -127,6 +129,7 @@ renesas Renesas Electronics Corporation
|
|||
ricoh Ricoh Co. Ltd.
|
||||
rockchip Fuzhou Rockchip Electronics Co., Ltd
|
||||
samsung Samsung Semiconductor
|
||||
sandisk Sandisk Corporation
|
||||
sbs Smart Battery System
|
||||
schindler Schindler
|
||||
seagate Seagate Technology PLC
|
||||
|
@ -138,7 +141,7 @@ silergy Silergy Corp.
|
|||
sirf SiRF Technology, Inc.
|
||||
sitronix Sitronix Technology Corporation
|
||||
smsc Standard Microsystems Corporation
|
||||
snps Synopsys, Inc.
|
||||
snps Synopsys, Inc.
|
||||
solidrun SolidRun
|
||||
sony Sony Corporation
|
||||
spansion Spansion Inc.
|
||||
|
|
|
@ -64,7 +64,7 @@ is formed.
|
|||
At mount time, the two directories given as mount options "lowerdir" and
|
||||
"upperdir" are combined into a merged directory:
|
||||
|
||||
mount -t overlayfs overlayfs -olowerdir=/lower,upperdir=/upper,\
|
||||
mount -t overlay overlay -olowerdir=/lower,upperdir=/upper,\
|
||||
workdir=/work /merged
|
||||
|
||||
The "workdir" needs to be an empty directory on the same filesystem
|
||||
|
|
|
@ -38,22 +38,38 @@ Contents
|
|||
7.2.1 Status packet
|
||||
7.2.2 Head packet
|
||||
7.2.3 Motion packet
|
||||
8. Trackpoint (for Hardware version 3 and 4)
|
||||
8.1 Registers
|
||||
8.2 Native relative mode 6 byte packet format
|
||||
8.2.1 Status Packet
|
||||
|
||||
|
||||
|
||||
1. Introduction
|
||||
~~~~~~~~~~~~
|
||||
|
||||
Currently the Linux Elantech touchpad driver is aware of two different
|
||||
hardware versions unimaginatively called version 1 and version 2. Version 1
|
||||
is found in "older" laptops and uses 4 bytes per packet. Version 2 seems to
|
||||
be introduced with the EeePC and uses 6 bytes per packet, and provides
|
||||
additional features such as position of two fingers, and width of the touch.
|
||||
Currently the Linux Elantech touchpad driver is aware of four different
|
||||
hardware versions unimaginatively called version 1,version 2, version 3
|
||||
and version 4. Version 1 is found in "older" laptops and uses 4 bytes per
|
||||
packet. Version 2 seems to be introduced with the EeePC and uses 6 bytes
|
||||
per packet, and provides additional features such as position of two fingers,
|
||||
and width of the touch. Hardware version 3 uses 6 bytes per packet (and
|
||||
for 2 fingers the concatenation of two 6 bytes packets) and allows tracking
|
||||
of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
|
||||
combine a status packet with multiple head or motion packets. Hardware version
|
||||
4 allows tracking up to 5 fingers.
|
||||
|
||||
Some Hardware version 3 and version 4 also have a trackpoint which uses a
|
||||
separate packet format. It is also 6 bytes per packet.
|
||||
|
||||
The driver tries to support both hardware versions and should be compatible
|
||||
with the Xorg Synaptics touchpad driver and its graphical configuration
|
||||
utilities.
|
||||
|
||||
Note that a mouse button is also associated with either the touchpad or the
|
||||
trackpoint when a trackpoint is available. Disabling the Touchpad in xorg
|
||||
(TouchPadOff=0) will also disable the buttons associated with the touchpad.
|
||||
|
||||
Additionally the operation of the touchpad can be altered by adjusting the
|
||||
contents of some of its internal registers. These registers are represented
|
||||
by the driver as sysfs entries under /sys/bus/serio/drivers/psmouse/serio?
|
||||
|
@ -78,7 +94,7 @@ completeness sake.
|
|||
2. Extra knobs
|
||||
~~~~~~~~~~~
|
||||
|
||||
Currently the Linux Elantech touchpad driver provides two extra knobs under
|
||||
Currently the Linux Elantech touchpad driver provides three extra knobs under
|
||||
/sys/bus/serio/drivers/psmouse/serio? for the user.
|
||||
|
||||
* debug
|
||||
|
@ -112,6 +128,20 @@ Currently the Linux Elantech touchpad driver provides two extra knobs under
|
|||
data consistency checking can be done. For now checking is disabled by
|
||||
default. Currently even turning it on will do nothing.
|
||||
|
||||
* crc_enabled
|
||||
|
||||
Sets crc_enabled to 0/1. The name "crc_enabled" is the official name of
|
||||
this integrity check, even though it is not an actual cyclic redundancy
|
||||
check.
|
||||
|
||||
Depending on the state of crc_enabled, certain basic data integrity
|
||||
verification is done by the driver on hardware version 3 and 4. The
|
||||
driver will reject any packet that appears corrupted. Using this knob,
|
||||
The state of crc_enabled can be altered with this knob.
|
||||
|
||||
Reading the crc_enabled value will show the active value. Echoing
|
||||
"0" or "1" to this file will set the state to "0" or "1".
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
3. Differentiating hardware versions
|
||||
|
@ -746,3 +776,42 @@ byte 5:
|
|||
|
||||
byte 0 ~ 2 for one finger
|
||||
byte 3 ~ 5 for another
|
||||
|
||||
|
||||
8. Trackpoint (for Hardware version 3 and 4)
|
||||
=========================================
|
||||
8.1 Registers
|
||||
~~~~~~~~~
|
||||
No special registers have been identified.
|
||||
|
||||
8.2 Native relative mode 6 byte packet format
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
8.2.1 Status Packet
|
||||
~~~~~~~~~~~~~
|
||||
|
||||
byte 0:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
0 0 sx sy 0 M R L
|
||||
byte 1:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
~sx 0 0 0 0 0 0 0
|
||||
byte 2:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
~sy 0 0 0 0 0 0 0
|
||||
byte 3:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
0 0 ~sy ~sx 0 1 1 0
|
||||
byte 4:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
x7 x6 x5 x4 x3 x2 x1 x0
|
||||
byte 5:
|
||||
bit 7 6 5 4 3 2 1 0
|
||||
y7 y6 y5 y4 y3 y2 y1 y0
|
||||
|
||||
|
||||
x and y are written in two's complement spread
|
||||
over 9 bits with sx/sy the relative top bit and
|
||||
x7..x0 and y7..y0 the lower bits.
|
||||
~sx is the inverse of sx, ~sy is the inverse of sy.
|
||||
The sign of y is opposite to what the input driver
|
||||
expects for a relative movement
|
||||
|
|
|
@ -56,6 +56,13 @@ ip_forward_use_pmtu - BOOLEAN
|
|||
0 - disabled
|
||||
1 - enabled
|
||||
|
||||
fwmark_reflect - BOOLEAN
|
||||
Controls the fwmark of kernel-generated IPv4 reply packets that are not
|
||||
associated with a socket for example, TCP RSTs or ICMP echo replies).
|
||||
If unset, these packets have a fwmark of zero. If set, they have the
|
||||
fwmark of the packet they are replying to.
|
||||
Default: 0
|
||||
|
||||
route/max_size - INTEGER
|
||||
Maximum number of routes allowed in the kernel. Increase
|
||||
this when using large numbers of interfaces and/or routes.
|
||||
|
@ -1201,6 +1208,13 @@ conf/all/forwarding - BOOLEAN
|
|||
proxy_ndp - BOOLEAN
|
||||
Do proxy ndp.
|
||||
|
||||
fwmark_reflect - BOOLEAN
|
||||
Controls the fwmark of kernel-generated IPv6 reply packets that are not
|
||||
associated with a socket for example, TCP RSTs or ICMPv6 echo replies).
|
||||
If unset, these packets have a fwmark of zero. If set, they have the
|
||||
fwmark of the packet they are replying to.
|
||||
Default: 0
|
||||
|
||||
conf/interface/*:
|
||||
Change special settings per interface.
|
||||
|
||||
|
|
|
@ -136,7 +136,7 @@ SOF_TIMESTAMPING_OPT_ID:
|
|||
|
||||
This option is implemented only for transmit timestamps. There, the
|
||||
timestamp is always looped along with a struct sock_extended_err.
|
||||
The option modifies field ee_info to pass an id that is unique
|
||||
The option modifies field ee_data to pass an id that is unique
|
||||
among all possibly concurrently outstanding timestamp requests for
|
||||
that socket. In practice, it is a monotonically increasing u32
|
||||
(that wraps).
|
||||
|
|
42
MAINTAINERS
42
MAINTAINERS
|
@ -2744,6 +2744,13 @@ W: http://www.chelsio.com
|
|||
S: Supported
|
||||
F: drivers/net/ethernet/chelsio/cxgb3/
|
||||
|
||||
CXGB3 ISCSI DRIVER (CXGB3I)
|
||||
M: Karen Xie <kxie@chelsio.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.chelsio.com
|
||||
S: Supported
|
||||
F: drivers/scsi/cxgbi/cxgb3i
|
||||
|
||||
CXGB3 IWARP RNIC DRIVER (IW_CXGB3)
|
||||
M: Steve Wise <swise@chelsio.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
|
@ -2758,6 +2765,13 @@ W: http://www.chelsio.com
|
|||
S: Supported
|
||||
F: drivers/net/ethernet/chelsio/cxgb4/
|
||||
|
||||
CXGB4 ISCSI DRIVER (CXGB4I)
|
||||
M: Karen Xie <kxie@chelsio.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.chelsio.com
|
||||
S: Supported
|
||||
F: drivers/scsi/cxgbi/cxgb4i
|
||||
|
||||
CXGB4 IWARP RNIC DRIVER (IW_CXGB4)
|
||||
M: Steve Wise <swise@chelsio.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
|
@ -4716,6 +4730,7 @@ L: linux-iio@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/iio/
|
||||
F: drivers/staging/iio/
|
||||
F: include/linux/iio/
|
||||
|
||||
IKANOS/ADI EAGLE ADSL USB DRIVER
|
||||
M: Matthieu Castet <castet.matthieu@free.fr>
|
||||
|
@ -6596,6 +6611,23 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git
|
|||
S: Maintained
|
||||
F: arch/arm/*omap*/
|
||||
F: drivers/i2c/busses/i2c-omap.c
|
||||
F: drivers/irqchip/irq-omap-intc.c
|
||||
F: drivers/mfd/*omap*.c
|
||||
F: drivers/mfd/menelaus.c
|
||||
F: drivers/mfd/palmas.c
|
||||
F: drivers/mfd/tps65217.c
|
||||
F: drivers/mfd/tps65218.c
|
||||
F: drivers/mfd/tps65910.c
|
||||
F: drivers/mfd/twl-core.[ch]
|
||||
F: drivers/mfd/twl4030*.c
|
||||
F: drivers/mfd/twl6030*.c
|
||||
F: drivers/mfd/twl6040*.c
|
||||
F: drivers/regulator/palmas-regulator*.c
|
||||
F: drivers/regulator/pbias-regulator.c
|
||||
F: drivers/regulator/tps65217-regulator.c
|
||||
F: drivers/regulator/tps65218-regulator.c
|
||||
F: drivers/regulator/tps65910-regulator.c
|
||||
F: drivers/regulator/twl-regulator.c
|
||||
F: include/linux/i2c-omap.h
|
||||
|
||||
OMAP DEVICE TREE SUPPORT
|
||||
|
@ -6606,6 +6638,9 @@ L: devicetree@vger.kernel.org
|
|||
S: Maintained
|
||||
F: arch/arm/boot/dts/*omap*
|
||||
F: arch/arm/boot/dts/*am3*
|
||||
F: arch/arm/boot/dts/*am4*
|
||||
F: arch/arm/boot/dts/*am5*
|
||||
F: arch/arm/boot/dts/*dra7*
|
||||
|
||||
OMAP CLOCK FRAMEWORK SUPPORT
|
||||
M: Paul Walmsley <paul@pwsan.com>
|
||||
|
@ -6853,11 +6888,12 @@ F: drivers/scsi/osd/
|
|||
F: include/scsi/osd_*
|
||||
F: fs/exofs/
|
||||
|
||||
OVERLAYFS FILESYSTEM
|
||||
OVERLAY FILESYSTEM
|
||||
M: Miklos Szeredi <miklos@szeredi.hu>
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
L: linux-unionfs@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs.git
|
||||
S: Supported
|
||||
F: fs/overlayfs/*
|
||||
F: fs/overlayfs/
|
||||
F: Documentation/filesystems/overlayfs.txt
|
||||
|
||||
P54 WIRELESS DRIVER
|
||||
|
|
7
Makefile
7
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 18
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Diseased Newt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -297,7 +297,7 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
|
|||
|
||||
HOSTCC = gcc
|
||||
HOSTCXX = g++
|
||||
HOSTCFLAGS = -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer
|
||||
HOSTCFLAGS = -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer -std=gnu89
|
||||
HOSTCXXFLAGS = -O2
|
||||
|
||||
ifeq ($(shell $(HOSTCC) -v 2>&1 | grep -c "clang version"), 1)
|
||||
|
@ -401,7 +401,8 @@ KBUILD_CPPFLAGS := -D__KERNEL__
|
|||
KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -fno-common \
|
||||
-Werror-implicit-function-declaration \
|
||||
-Wno-format-security
|
||||
-Wno-format-security \
|
||||
-std=gnu89
|
||||
|
||||
KBUILD_AFLAGS_KERNEL :=
|
||||
KBUILD_CFLAGS_KERNEL :=
|
||||
|
|
|
@ -397,8 +397,7 @@ dtb_check_done:
|
|||
add sp, sp, r6
|
||||
#endif
|
||||
|
||||
tst r4, #1
|
||||
bleq cache_clean_flush
|
||||
bl cache_clean_flush
|
||||
|
||||
adr r0, BSYM(restart)
|
||||
add r0, r0, r6
|
||||
|
@ -1047,6 +1046,8 @@ cache_clean_flush:
|
|||
b call_cache_fn
|
||||
|
||||
__armv4_mpu_cache_flush:
|
||||
tst r4, #1
|
||||
movne pc, lr
|
||||
mov r2, #1
|
||||
mov r3, #0
|
||||
mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
|
||||
|
@ -1064,6 +1065,8 @@ __armv4_mpu_cache_flush:
|
|||
mov pc, lr
|
||||
|
||||
__fa526_cache_flush:
|
||||
tst r4, #1
|
||||
movne pc, lr
|
||||
mov r1, #0
|
||||
mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
|
||||
mcr p15, 0, r1, c7, c5, 0 @ flush I cache
|
||||
|
@ -1072,13 +1075,16 @@ __fa526_cache_flush:
|
|||
|
||||
__armv6_mmu_cache_flush:
|
||||
mov r1, #0
|
||||
mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D
|
||||
tst r4, #1
|
||||
mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
|
||||
mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
|
||||
mcr p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
|
||||
mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
|
||||
mcr p15, 0, r1, c7, c10, 4 @ drain WB
|
||||
mov pc, lr
|
||||
|
||||
__armv7_mmu_cache_flush:
|
||||
tst r4, #1
|
||||
bne iflush
|
||||
mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
|
||||
tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
|
||||
mov r10, #0
|
||||
|
@ -1139,6 +1145,8 @@ iflush:
|
|||
mov pc, lr
|
||||
|
||||
__armv5tej_mmu_cache_flush:
|
||||
tst r4, #1
|
||||
movne pc, lr
|
||||
1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
|
||||
bne 1b
|
||||
mcr p15, 0, r0, c7, c5, 0 @ flush I cache
|
||||
|
@ -1146,6 +1154,8 @@ __armv5tej_mmu_cache_flush:
|
|||
mov pc, lr
|
||||
|
||||
__armv4_mmu_cache_flush:
|
||||
tst r4, #1
|
||||
movne pc, lr
|
||||
mov r2, #64*1024 @ default: 32K dcache size (*2)
|
||||
mov r11, #32 @ default: 32 byte line size
|
||||
mrc p15, 0, r3, c0, c0, 1 @ read cache type
|
||||
|
@ -1179,6 +1189,8 @@ no_cache_id:
|
|||
|
||||
__armv3_mmu_cache_flush:
|
||||
__armv3_mpu_cache_flush:
|
||||
tst r4, #1
|
||||
movne pc, lr
|
||||
mov r1, #0
|
||||
mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
|
||||
mov pc, lr
|
||||
|
|
|
@ -489,7 +489,7 @@
|
|||
reg = <0x00060000 0x00020000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "NAND.u-boot-spl";
|
||||
label = "NAND.u-boot-spl-os";
|
||||
reg = <0x00080000 0x00040000>;
|
||||
};
|
||||
partition@5 {
|
||||
|
|
|
@ -291,8 +291,8 @@
|
|||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -363,8 +363,8 @@
|
|||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdds_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -358,8 +358,8 @@
|
|||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -624,4 +624,8 @@
|
|||
num-cs = <1>;
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
#include "cros-ec-keyboard.dtsi"
|
||||
|
|
|
@ -555,7 +555,7 @@
|
|||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dwc3 {
|
||||
usbdrd_dwc3: dwc3 {
|
||||
compatible = "synopsys,dwc3";
|
||||
reg = <0x12000000 0x10000>;
|
||||
interrupts = <0 72 0>;
|
||||
|
|
|
@ -433,7 +433,7 @@
|
|||
clocks = <&cpg_clocks R8A7740_CLK_S>,
|
||||
<&cpg_clocks R8A7740_CLK_S>, <&sub_clk>,
|
||||
<&cpg_clocks R8A7740_CLK_B>,
|
||||
<&sub_clk>, <&sub_clk>,
|
||||
<&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>,
|
||||
<&cpg_clocks R8A7740_CLK_B>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
|
|
|
@ -666,9 +666,9 @@
|
|||
#clock-cells = <0>;
|
||||
clock-output-names = "sd2";
|
||||
};
|
||||
sd3_clk: sd3_clk@e615007c {
|
||||
sd3_clk: sd3_clk@e615026c {
|
||||
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
|
||||
reg = <0 0xe615007c 0 4>;
|
||||
reg = <0 0xe615026c 0 4>;
|
||||
clocks = <&pll1_div2_clk>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "sd3";
|
||||
|
|
|
@ -12,5 +12,5 @@
|
|||
#include "sama5d3_uart.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad31", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
||||
|
|
|
@ -10,5 +10,5 @@
|
|||
#include "sama5d3_gmac.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad33", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
||||
|
|
|
@ -12,5 +12,5 @@
|
|||
#include "sama5d3_mci2.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad34", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
||||
|
|
|
@ -14,5 +14,5 @@
|
|||
#include "sama5d3_tcb1.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad35", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
||||
|
|
|
@ -16,5 +16,5 @@
|
|||
#include "sama5d3_uart.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad36", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
||||
|
|
|
@ -8,7 +8,7 @@
|
|||
*/
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5";
|
||||
compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs";
|
||||
|
|
|
@ -361,6 +361,10 @@
|
|||
clocks = <&ahb1_gates 6>;
|
||||
resets = <&ahb1_rst 6>;
|
||||
#dma-cells = <1>;
|
||||
|
||||
/* DMA controller requires AHB1 clocked from PLL6 */
|
||||
assigned-clocks = <&ahb1_mux>;
|
||||
assigned-clock-parents = <&pll6>;
|
||||
};
|
||||
|
||||
mmc0: mmc@01c0f000 {
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps65913@58";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -15,6 +15,10 @@
|
|||
linux,initrd-end = <0x82800000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
firmware {
|
||||
trusted-foundations {
|
||||
compatible = "tlm,trusted-foundations";
|
||||
|
@ -916,8 +920,6 @@
|
|||
regulator-name = "vddio-sdmmc3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb {
|
||||
|
@ -962,7 +964,7 @@
|
|||
sdhci@78000400 {
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vddio_sdmmc3>;
|
||||
vqmmc-supply = <&vddio_sdmmc3>;
|
||||
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
||||
power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
@ -971,7 +973,6 @@
|
|||
sdhci@78000600 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&vdd_1v8>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
|
|
|
@ -15,6 +15,10 @@
|
|||
linux,initrd-end = <0x82800000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
firmware {
|
||||
trusted-foundations {
|
||||
compatible = "tlm,trusted-foundations";
|
||||
|
@ -240,7 +244,6 @@
|
|||
sdhci@78000600 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&vdd_1v8>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
|
|
|
@ -9,13 +9,6 @@
|
|||
compatible = "nvidia,tegra114";
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartb;
|
||||
serial2 = &uartc;
|
||||
serial3 = &uartd;
|
||||
};
|
||||
|
||||
host1x@50000000 {
|
||||
compatible = "nvidia,tegra114-host1x", "simple-bus";
|
||||
reg = <0x50000000 0x00028000>;
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@0,7000d000/pmic@40";
|
||||
rtc1 = "/rtc@0,7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@0,7000d000/pmic@40";
|
||||
rtc1 = "/rtc@0,7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@0,7000d000/pmic@40";
|
||||
rtc1 = "/rtc@0,7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -286,7 +286,7 @@
|
|||
* the APB DMA based serial driver, the comptible is
|
||||
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
|
||||
*/
|
||||
serial@0,70006000 {
|
||||
uarta: serial@0,70006000 {
|
||||
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
|
||||
reg = <0x0 0x70006000 0x0 0x40>;
|
||||
reg-shift = <2>;
|
||||
|
@ -299,7 +299,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@0,70006040 {
|
||||
uartb: serial@0,70006040 {
|
||||
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
|
||||
reg = <0x0 0x70006040 0x0 0x40>;
|
||||
reg-shift = <2>;
|
||||
|
@ -312,7 +312,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@0,70006200 {
|
||||
uartc: serial@0,70006200 {
|
||||
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
|
||||
reg = <0x0 0x70006200 0x0 0x40>;
|
||||
reg-shift = <2>;
|
||||
|
@ -325,7 +325,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@0,70006300 {
|
||||
uartd: serial@0,70006300 {
|
||||
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
|
||||
reg = <0x0 0x70006300 0x0 0x40>;
|
||||
reg-shift = <2>;
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -6,6 +6,11 @@
|
|||
model = "Toradex Colibri T20 512MB on Iris";
|
||||
compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
|
||||
|
||||
aliases {
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartd;
|
||||
};
|
||||
|
||||
host1x@50000000 {
|
||||
hdmi@54280000 {
|
||||
status = "okay";
|
||||
|
|
|
@ -6,6 +6,10 @@
|
|||
model = "Avionic Design Medcom-Wide board";
|
||||
compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
|
||||
|
||||
aliases {
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
pwm@7000a000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -10,6 +10,8 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartc;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000c500/rtc@56";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uartd;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/max8907@3c";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -9,14 +9,6 @@
|
|||
compatible = "nvidia,tegra20";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartb;
|
||||
serial2 = &uartc;
|
||||
serial3 = &uartd;
|
||||
serial4 = &uarte;
|
||||
};
|
||||
|
||||
host1x@50000000 {
|
||||
compatible = "nvidia,tegra20-host1x", "simple-bus";
|
||||
reg = <0x50000000 0x00024000>;
|
||||
|
|
|
@ -11,6 +11,10 @@
|
|||
rtc0 = "/i2c@7000c000/rtc@68";
|
||||
rtc1 = "/i2c@7000d000/tps65911@2d";
|
||||
rtc2 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartb;
|
||||
serial2 = &uartc;
|
||||
serial3 = &uartd;
|
||||
};
|
||||
|
||||
pcie-controller@00003000 {
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps65911@2d";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -30,6 +30,8 @@
|
|||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps65911@2d";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartc;
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -10,6 +10,9 @@
|
|||
rtc0 = "/i2c@7000c000/rtc@68";
|
||||
rtc1 = "/i2c@7000d000/tps65911@2d";
|
||||
rtc2 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartb;
|
||||
serial2 = &uartd;
|
||||
};
|
||||
|
||||
host1x@50000000 {
|
||||
|
|
|
@ -9,14 +9,6 @@
|
|||
compatible = "nvidia,tegra30";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uarta;
|
||||
serial1 = &uartb;
|
||||
serial2 = &uartc;
|
||||
serial3 = &uartd;
|
||||
serial4 = &uarte;
|
||||
};
|
||||
|
||||
pcie-controller@00003000 {
|
||||
compatible = "nvidia,tegra30-pcie";
|
||||
device_type = "pci";
|
||||
|
|
|
@ -142,11 +142,13 @@ CONFIG_MMC_DW_IDMAC=y
|
|||
CONFIG_MMC_DW_EXYNOS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_MAX77686=y
|
||||
CONFIG_RTC_DRV_MAX77802=y
|
||||
CONFIG_RTC_DRV_S5M=y
|
||||
CONFIG_RTC_DRV_S3C=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_COMMON_CLK_MAX77686=y
|
||||
CONFIG_COMMON_CLK_MAX77802=y
|
||||
CONFIG_COMMON_CLK_S2MPS11=y
|
||||
CONFIG_EXYNOS_IOMMU=y
|
||||
CONFIG_IIO=y
|
||||
|
|
|
@ -217,6 +217,7 @@ CONFIG_I2C_CADENCE=y
|
|||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
CONFIG_I2C_EXYNOS5=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_I2C_S3C2410=y
|
||||
CONFIG_I2C_SIRF=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_I2C_ST=y
|
||||
|
|
|
@ -44,16 +44,6 @@ struct cpu_context_save {
|
|||
__u32 extra[2]; /* Xscale 'acc' register, etc */
|
||||
};
|
||||
|
||||
struct arm_restart_block {
|
||||
union {
|
||||
/* For user cache flushing */
|
||||
struct {
|
||||
unsigned long start;
|
||||
unsigned long end;
|
||||
} cache;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* low level task data that entry.S needs immediate access to.
|
||||
* __switch_to() assumes cpu_context follows immediately after cpu_domain.
|
||||
|
@ -79,7 +69,6 @@ struct thread_info {
|
|||
unsigned long thumbee_state; /* ThumbEE Handler Base register */
|
||||
#endif
|
||||
struct restart_block restart_block;
|
||||
struct arm_restart_block arm_restart_block;
|
||||
};
|
||||
|
||||
#define INIT_THREAD_INFO(tsk) \
|
||||
|
|
|
@ -533,8 +533,6 @@ static int bad_syscall(int n, struct pt_regs *regs)
|
|||
return regs->ARM_r0;
|
||||
}
|
||||
|
||||
static long do_cache_op_restart(struct restart_block *);
|
||||
|
||||
static inline int
|
||||
__do_cache_op(unsigned long start, unsigned long end)
|
||||
{
|
||||
|
@ -543,24 +541,8 @@ __do_cache_op(unsigned long start, unsigned long end)
|
|||
do {
|
||||
unsigned long chunk = min(PAGE_SIZE, end - start);
|
||||
|
||||
if (signal_pending(current)) {
|
||||
struct thread_info *ti = current_thread_info();
|
||||
|
||||
ti->restart_block = (struct restart_block) {
|
||||
.fn = do_cache_op_restart,
|
||||
};
|
||||
|
||||
ti->arm_restart_block = (struct arm_restart_block) {
|
||||
{
|
||||
.cache = {
|
||||
.start = start,
|
||||
.end = end,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
return -ERESTART_RESTARTBLOCK;
|
||||
}
|
||||
if (fatal_signal_pending(current))
|
||||
return 0;
|
||||
|
||||
ret = flush_cache_user_range(start, start + chunk);
|
||||
if (ret)
|
||||
|
@ -573,15 +555,6 @@ __do_cache_op(unsigned long start, unsigned long end)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static long do_cache_op_restart(struct restart_block *unused)
|
||||
{
|
||||
struct arm_restart_block *restart_block;
|
||||
|
||||
restart_block = ¤t_thread_info()->arm_restart_block;
|
||||
return __do_cache_op(restart_block->cache.start,
|
||||
restart_block->cache.end);
|
||||
}
|
||||
|
||||
static inline int
|
||||
do_cache_op(unsigned long start, unsigned long end, int flags)
|
||||
{
|
||||
|
|
|
@ -197,7 +197,8 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
|
|||
pgd = pgdp + pgd_index(addr);
|
||||
do {
|
||||
next = kvm_pgd_addr_end(addr, end);
|
||||
unmap_puds(kvm, pgd, addr, next);
|
||||
if (!pgd_none(*pgd))
|
||||
unmap_puds(kvm, pgd, addr, next);
|
||||
} while (pgd++, addr = next, addr != end);
|
||||
}
|
||||
|
||||
|
@ -834,6 +835,11 @@ static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
|
|||
return kvm_vcpu_dabt_iswrite(vcpu);
|
||||
}
|
||||
|
||||
static bool kvm_is_device_pfn(unsigned long pfn)
|
||||
{
|
||||
return !pfn_valid(pfn);
|
||||
}
|
||||
|
||||
static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
||||
struct kvm_memory_slot *memslot, unsigned long hva,
|
||||
unsigned long fault_status)
|
||||
|
@ -904,7 +910,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
|||
if (is_error_pfn(pfn))
|
||||
return -EFAULT;
|
||||
|
||||
if (kvm_is_mmio_pfn(pfn))
|
||||
if (kvm_is_device_pfn(pfn))
|
||||
mem_type = PAGE_S2_DEVICE;
|
||||
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
|
|
|
@ -188,7 +188,7 @@ static void __init thermal_quirk(void)
|
|||
|
||||
static void __init mvebu_dt_init(void)
|
||||
{
|
||||
if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
|
||||
if (of_machine_is_compatible("marvell,armadaxp"))
|
||||
i2c_quirk();
|
||||
if (of_machine_is_compatible("marvell,a375-db")) {
|
||||
external_abort_quirk();
|
||||
|
|
|
@ -400,6 +400,8 @@ int __init coherency_init(void)
|
|||
type == COHERENCY_FABRIC_TYPE_ARMADA_380)
|
||||
armada_375_380_coherency_init(np);
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -455,7 +455,7 @@ enum {
|
|||
MSTP128, MSTP127, MSTP125,
|
||||
MSTP116, MSTP111, MSTP100, MSTP117,
|
||||
|
||||
MSTP230,
|
||||
MSTP230, MSTP229,
|
||||
MSTP222,
|
||||
MSTP218, MSTP217, MSTP216, MSTP214,
|
||||
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
||||
|
@ -474,11 +474,12 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||
[MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */
|
||||
[MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
|
||||
[MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
|
||||
[MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
|
||||
[MSTP116] = SH_CLK_MSTP32(&div4_clks[DIV4_HPP], SMSTPCR1, 16, 0), /* IIC0 */
|
||||
[MSTP111] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 11, 0), /* TMU1 */
|
||||
[MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
|
||||
|
||||
[MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
|
||||
[MSTP229] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 29, 0), /* INTCA */
|
||||
[MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
|
||||
[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
|
||||
[MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
|
||||
|
@ -575,6 +576,10 @@ static struct clk_lookup lookups[] = {
|
|||
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
|
||||
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]),
|
||||
CLKDEV_DEV_ID("e6cd0000.serial", &mstp_clks[MSTP222]),
|
||||
CLKDEV_DEV_ID("renesas_intc_irqpin.0", &mstp_clks[MSTP229]),
|
||||
CLKDEV_DEV_ID("renesas_intc_irqpin.1", &mstp_clks[MSTP229]),
|
||||
CLKDEV_DEV_ID("renesas_intc_irqpin.2", &mstp_clks[MSTP229]),
|
||||
CLKDEV_DEV_ID("renesas_intc_irqpin.3", &mstp_clks[MSTP229]),
|
||||
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
|
||||
CLKDEV_DEV_ID("e6cc0000.serial", &mstp_clks[MSTP230]),
|
||||
|
||||
|
|
|
@ -68,7 +68,7 @@
|
|||
|
||||
#define SDCKCR 0xE6150074
|
||||
#define SD2CKCR 0xE6150078
|
||||
#define SD3CKCR 0xE615007C
|
||||
#define SD3CKCR 0xE615026C
|
||||
#define MMC0CKCR 0xE6150240
|
||||
#define MMC1CKCR 0xE6150244
|
||||
#define SSPCKCR 0xE6150248
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/of_platform.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/i2c/i2c-sh_mobile.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_dma.h>
|
||||
|
@ -192,11 +193,18 @@ static struct resource i2c4_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct i2c_sh_mobile_platform_data i2c_platform_data = {
|
||||
.clks_per_count = 2,
|
||||
};
|
||||
|
||||
static struct platform_device i2c0_device = {
|
||||
.name = "i2c-sh_mobile",
|
||||
.id = 0,
|
||||
.resource = i2c0_resources,
|
||||
.num_resources = ARRAY_SIZE(i2c0_resources),
|
||||
.dev = {
|
||||
.platform_data = &i2c_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c1_device = {
|
||||
|
@ -204,6 +212,9 @@ static struct platform_device i2c1_device = {
|
|||
.id = 1,
|
||||
.resource = i2c1_resources,
|
||||
.num_resources = ARRAY_SIZE(i2c1_resources),
|
||||
.dev = {
|
||||
.platform_data = &i2c_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c2_device = {
|
||||
|
@ -211,6 +222,9 @@ static struct platform_device i2c2_device = {
|
|||
.id = 2,
|
||||
.resource = i2c2_resources,
|
||||
.num_resources = ARRAY_SIZE(i2c2_resources),
|
||||
.dev = {
|
||||
.platform_data = &i2c_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c3_device = {
|
||||
|
@ -218,6 +232,9 @@ static struct platform_device i2c3_device = {
|
|||
.id = 3,
|
||||
.resource = i2c3_resources,
|
||||
.num_resources = ARRAY_SIZE(i2c3_resources),
|
||||
.dev = {
|
||||
.platform_data = &i2c_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c4_device = {
|
||||
|
@ -225,6 +242,9 @@ static struct platform_device i2c4_device = {
|
|||
.id = 4,
|
||||
.resource = i2c4_resources,
|
||||
.num_resources = ARRAY_SIZE(i2c4_resources),
|
||||
.dev = {
|
||||
.platform_data = &i2c_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = {
|
||||
|
|
|
@ -99,42 +99,42 @@ static inline void tegra_irq_write_mask(unsigned int irq, unsigned long reg)
|
|||
|
||||
static void tegra_mask(struct irq_data *d)
|
||||
{
|
||||
if (d->irq < FIRST_LEGACY_IRQ)
|
||||
if (d->hwirq < FIRST_LEGACY_IRQ)
|
||||
return;
|
||||
|
||||
tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_CLR);
|
||||
tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_CLR);
|
||||
}
|
||||
|
||||
static void tegra_unmask(struct irq_data *d)
|
||||
{
|
||||
if (d->irq < FIRST_LEGACY_IRQ)
|
||||
if (d->hwirq < FIRST_LEGACY_IRQ)
|
||||
return;
|
||||
|
||||
tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_SET);
|
||||
tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_SET);
|
||||
}
|
||||
|
||||
static void tegra_ack(struct irq_data *d)
|
||||
{
|
||||
if (d->irq < FIRST_LEGACY_IRQ)
|
||||
if (d->hwirq < FIRST_LEGACY_IRQ)
|
||||
return;
|
||||
|
||||
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR);
|
||||
tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
|
||||
}
|
||||
|
||||
static void tegra_eoi(struct irq_data *d)
|
||||
{
|
||||
if (d->irq < FIRST_LEGACY_IRQ)
|
||||
if (d->hwirq < FIRST_LEGACY_IRQ)
|
||||
return;
|
||||
|
||||
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR);
|
||||
tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
|
||||
}
|
||||
|
||||
static int tegra_retrigger(struct irq_data *d)
|
||||
{
|
||||
if (d->irq < FIRST_LEGACY_IRQ)
|
||||
if (d->hwirq < FIRST_LEGACY_IRQ)
|
||||
return 0;
|
||||
|
||||
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_SET);
|
||||
tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_SET);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
@ -142,7 +142,7 @@ static int tegra_retrigger(struct irq_data *d)
|
|||
#ifdef CONFIG_PM_SLEEP
|
||||
static int tegra_set_wake(struct irq_data *d, unsigned int enable)
|
||||
{
|
||||
u32 irq = d->irq;
|
||||
u32 irq = d->hwirq;
|
||||
u32 index, mask;
|
||||
|
||||
if (irq < FIRST_LEGACY_IRQ ||
|
||||
|
|
|
@ -798,6 +798,7 @@ config NEED_KUSER_HELPERS
|
|||
|
||||
config KUSER_HELPERS
|
||||
bool "Enable kuser helpers in vector page" if !NEED_KUSER_HELPERS
|
||||
depends on MMU
|
||||
default y
|
||||
help
|
||||
Warning: disabling this option may break user programs.
|
||||
|
|
|
@ -270,7 +270,6 @@ __v7_pj4b_setup:
|
|||
/* Auxiliary Debug Modes Control 1 Register */
|
||||
#define PJ4B_STATIC_BP (1 << 2) /* Enable Static BP */
|
||||
#define PJ4B_INTER_PARITY (1 << 8) /* Disable Internal Parity Handling */
|
||||
#define PJ4B_BCK_OFF_STREX (1 << 5) /* Enable the back off of STREX instr */
|
||||
#define PJ4B_CLEAN_LINE (1 << 16) /* Disable data transfer for clean line */
|
||||
|
||||
/* Auxiliary Debug Modes Control 2 Register */
|
||||
|
@ -293,7 +292,6 @@ __v7_pj4b_setup:
|
|||
/* Auxiliary Debug Modes Control 1 Register */
|
||||
mrc p15, 1, r0, c15, c1, 1
|
||||
orr r0, r0, #PJ4B_CLEAN_LINE
|
||||
orr r0, r0, #PJ4B_BCK_OFF_STREX
|
||||
orr r0, r0, #PJ4B_INTER_PARITY
|
||||
bic r0, r0, #PJ4B_STATIC_BP
|
||||
mcr p15, 1, r0, c15, c1, 1
|
||||
|
|
|
@ -535,7 +535,7 @@ ENTRY(cpu_xscale_do_suspend)
|
|||
mrc p15, 0, r5, c15, c1, 0 @ CP access reg
|
||||
mrc p15, 0, r6, c13, c0, 0 @ PID
|
||||
mrc p15, 0, r7, c3, c0, 0 @ domain ID
|
||||
mrc p15, 0, r8, c1, c1, 0 @ auxiliary control reg
|
||||
mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
|
||||
mrc p15, 0, r9, c1, c0, 0 @ control reg
|
||||
bic r4, r4, #2 @ clear frequency change bit
|
||||
stmia r0, {r4 - r9} @ store cp regs
|
||||
|
@ -552,7 +552,7 @@ ENTRY(cpu_xscale_do_resume)
|
|||
mcr p15, 0, r6, c13, c0, 0 @ PID
|
||||
mcr p15, 0, r7, c3, c0, 0 @ domain ID
|
||||
mcr p15, 0, r1, c2, c0, 0 @ translation table base addr
|
||||
mcr p15, 0, r8, c1, c1, 0 @ auxiliary control reg
|
||||
mcr p15, 0, r8, c1, c0, 1 @ auxiliary control reg
|
||||
mov r0, r9 @ control register
|
||||
b cpu_resume_mmu
|
||||
ENDPROC(cpu_xscale_do_resume)
|
||||
|
|
|
@ -497,6 +497,34 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
|
|||
#define orion_gpio_dbg_show NULL
|
||||
#endif
|
||||
|
||||
static void orion_gpio_unmask_irq(struct irq_data *d)
|
||||
{
|
||||
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
|
||||
struct irq_chip_type *ct = irq_data_get_chip_type(d);
|
||||
u32 reg_val;
|
||||
u32 mask = d->mask;
|
||||
|
||||
irq_gc_lock(gc);
|
||||
reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
|
||||
reg_val |= mask;
|
||||
irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
|
||||
irq_gc_unlock(gc);
|
||||
}
|
||||
|
||||
static void orion_gpio_mask_irq(struct irq_data *d)
|
||||
{
|
||||
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
|
||||
struct irq_chip_type *ct = irq_data_get_chip_type(d);
|
||||
u32 mask = d->mask;
|
||||
u32 reg_val;
|
||||
|
||||
irq_gc_lock(gc);
|
||||
reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
|
||||
reg_val &= ~mask;
|
||||
irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
|
||||
irq_gc_unlock(gc);
|
||||
}
|
||||
|
||||
void __init orion_gpio_init(struct device_node *np,
|
||||
int gpio_base, int ngpio,
|
||||
void __iomem *base, int mask_offset,
|
||||
|
@ -565,8 +593,8 @@ void __init orion_gpio_init(struct device_node *np,
|
|||
ct = gc->chip_types;
|
||||
ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
|
||||
ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
|
||||
ct->chip.irq_mask = irq_gc_mask_clr_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_mask = orion_gpio_mask_irq;
|
||||
ct->chip.irq_unmask = orion_gpio_unmask_irq;
|
||||
ct->chip.irq_set_type = gpio_irq_set_type;
|
||||
ct->chip.name = ochip->chip.label;
|
||||
|
||||
|
@ -575,8 +603,8 @@ void __init orion_gpio_init(struct device_node *np,
|
|||
ct->regs.ack = GPIO_EDGE_CAUSE_OFF;
|
||||
ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
|
||||
ct->chip.irq_ack = irq_gc_ack_clr_bit;
|
||||
ct->chip.irq_mask = irq_gc_mask_clr_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_mask = orion_gpio_mask_irq;
|
||||
ct->chip.irq_unmask = orion_gpio_unmask_irq;
|
||||
ct->chip.irq_set_type = gpio_irq_set_type;
|
||||
ct->handler = handle_edge_irq;
|
||||
ct->chip.name = ochip->chip.label;
|
||||
|
|
|
@ -599,7 +599,7 @@
|
|||
compatible = "apm,xgene-enet";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x17020000 0x0 0xd100>,
|
||||
<0x0 0X17030000 0x0 0X400>,
|
||||
<0x0 0X17030000 0x0 0Xc300>,
|
||||
<0x0 0X10000000 0x0 0X200>;
|
||||
reg-names = "enet_csr", "ring_csr", "ring_cmd";
|
||||
interrupts = <0x0 0x3c 0x4>;
|
||||
|
@ -624,9 +624,9 @@
|
|||
sgenet0: ethernet@1f210000 {
|
||||
compatible = "apm,xgene-enet";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x1f210000 0x0 0x10000>,
|
||||
<0x0 0x1f200000 0x0 0X10000>,
|
||||
<0x0 0x1B000000 0x0 0X20000>;
|
||||
reg = <0x0 0x1f210000 0x0 0xd100>,
|
||||
<0x0 0x1f200000 0x0 0Xc300>,
|
||||
<0x0 0x1B000000 0x0 0X200>;
|
||||
reg-names = "enet_csr", "ring_csr", "ring_cmd";
|
||||
interrupts = <0x0 0xA0 0x4>;
|
||||
dma-coherent;
|
||||
|
@ -639,7 +639,7 @@
|
|||
compatible = "apm,xgene-enet";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x1f610000 0x0 0xd100>,
|
||||
<0x0 0x1f600000 0x0 0X400>,
|
||||
<0x0 0x1f600000 0x0 0Xc300>,
|
||||
<0x0 0x18000000 0x0 0X200>;
|
||||
reg-names = "enet_csr", "ring_csr", "ring_cmd";
|
||||
interrupts = <0x0 0x60 0x4>;
|
||||
|
|
|
@ -142,7 +142,7 @@ static inline void *phys_to_virt(phys_addr_t x)
|
|||
* virt_to_page(k) convert a _valid_ virtual address to struct page *
|
||||
* virt_addr_valid(k) indicates whether a virtual address is valid
|
||||
*/
|
||||
#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
|
||||
#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
|
||||
|
||||
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
|
||||
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
|
||||
|
|
|
@ -54,18 +54,17 @@ ENTRY(efi_stub_entry)
|
|||
b.eq efi_load_fail
|
||||
|
||||
/*
|
||||
* efi_entry() will have relocated the kernel image if necessary
|
||||
* and we return here with device tree address in x0 and the kernel
|
||||
* entry point stored at *image_addr. Save those values in registers
|
||||
* which are callee preserved.
|
||||
* efi_entry() will have copied the kernel image if necessary and we
|
||||
* return here with device tree address in x0 and the kernel entry
|
||||
* point stored at *image_addr. Save those values in registers which
|
||||
* are callee preserved.
|
||||
*/
|
||||
mov x20, x0 // DTB address
|
||||
ldr x0, [sp, #16] // relocated _text address
|
||||
mov x21, x0
|
||||
|
||||
/*
|
||||
* Flush dcache covering current runtime addresses
|
||||
* of kernel text/data. Then flush all of icache.
|
||||
* Calculate size of the kernel Image (same for original and copy).
|
||||
*/
|
||||
adrp x1, _text
|
||||
add x1, x1, #:lo12:_text
|
||||
|
@ -73,9 +72,24 @@ ENTRY(efi_stub_entry)
|
|||
add x2, x2, #:lo12:_edata
|
||||
sub x1, x2, x1
|
||||
|
||||
/*
|
||||
* Flush the copied Image to the PoC, and ensure it is not shadowed by
|
||||
* stale icache entries from before relocation.
|
||||
*/
|
||||
bl __flush_dcache_area
|
||||
ic ialluis
|
||||
|
||||
/*
|
||||
* Ensure that the rest of this function (in the original Image) is
|
||||
* visible when the caches are disabled. The I-cache can't have stale
|
||||
* entries for the VA range of the current image, so no maintenance is
|
||||
* necessary.
|
||||
*/
|
||||
adr x0, efi_stub_entry
|
||||
adr x1, efi_stub_entry_end
|
||||
sub x1, x1, x0
|
||||
bl __flush_dcache_area
|
||||
|
||||
/* Turn off Dcache and MMU */
|
||||
mrs x0, CurrentEL
|
||||
cmp x0, #CurrentEL_EL2
|
||||
|
@ -105,4 +119,5 @@ efi_load_fail:
|
|||
ldp x29, x30, [sp], #32
|
||||
ret
|
||||
|
||||
efi_stub_entry_end:
|
||||
ENDPROC(efi_stub_entry)
|
||||
|
|
|
@ -163,9 +163,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
|
|||
* which ends with "dsb; isb" pair guaranteeing global
|
||||
* visibility.
|
||||
*/
|
||||
atomic_set(&pp->cpu_count, -1);
|
||||
/* Notify other processors with an additional increment. */
|
||||
atomic_inc(&pp->cpu_count);
|
||||
} else {
|
||||
while (atomic_read(&pp->cpu_count) != -1)
|
||||
while (atomic_read(&pp->cpu_count) <= num_online_cpus())
|
||||
cpu_relax();
|
||||
isb();
|
||||
}
|
||||
|
|
|
@ -424,6 +424,11 @@ static const struct sys_reg_desc sys_reg_descs[] = {
|
|||
/* VBAR_EL1 */
|
||||
{ Op0(0b11), Op1(0b000), CRn(0b1100), CRm(0b0000), Op2(0b000),
|
||||
NULL, reset_val, VBAR_EL1, 0 },
|
||||
|
||||
/* ICC_SRE_EL1 */
|
||||
{ Op0(0b11), Op1(0b000), CRn(0b1100), CRm(0b1100), Op2(0b101),
|
||||
trap_raz_wi },
|
||||
|
||||
/* CONTEXTIDR_EL1 */
|
||||
{ Op0(0b11), Op1(0b000), CRn(0b1101), CRm(0b0000), Op2(0b001),
|
||||
access_vm_reg, reset_val, CONTEXTIDR_EL1, 0 },
|
||||
|
@ -690,6 +695,10 @@ static const struct sys_reg_desc cp15_regs[] = {
|
|||
{ Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, c10_NMRR },
|
||||
{ Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, c10_AMAIR0 },
|
||||
{ Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 },
|
||||
|
||||
/* ICC_SRE */
|
||||
{ Op1( 0), CRn(12), CRm(12), Op2( 5), trap_raz_wi },
|
||||
|
||||
{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },
|
||||
};
|
||||
|
||||
|
|
|
@ -46,7 +46,7 @@ USER(9f, strh wzr, [x0], #2 )
|
|||
sub x1, x1, #2
|
||||
4: adds x1, x1, #1
|
||||
b.mi 5f
|
||||
strb wzr, [x0]
|
||||
USER(9f, strb wzr, [x0] )
|
||||
5: mov x0, #0
|
||||
ret
|
||||
ENDPROC(__clear_user)
|
||||
|
|
|
@ -202,7 +202,7 @@ static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
|
|||
}
|
||||
|
||||
static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
|
||||
unsigned long end, unsigned long phys,
|
||||
unsigned long end, phys_addr_t phys,
|
||||
int map_io)
|
||||
{
|
||||
pud_t *pud;
|
||||
|
|
|
@ -1563,7 +1563,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
|
||||
for (i = 0; i < npages; i++) {
|
||||
pfn = gfn_to_pfn(kvm, base_gfn + i);
|
||||
if (!kvm_is_mmio_pfn(pfn)) {
|
||||
if (!kvm_is_reserved_pfn(pfn)) {
|
||||
kvm_set_pmt_entry(kvm, base_gfn + i,
|
||||
pfn << PAGE_SHIFT,
|
||||
_PAGE_AR_RWX | _PAGE_MA_WB);
|
||||
|
|
|
@ -2101,9 +2101,17 @@ config 64BIT_PHYS_ADDR
|
|||
config ARCH_PHYS_ADDR_T_64BIT
|
||||
def_bool 64BIT_PHYS_ADDR
|
||||
|
||||
choice
|
||||
prompt "SmartMIPS or microMIPS ASE support"
|
||||
|
||||
config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
|
||||
bool "None"
|
||||
help
|
||||
Select this if you want neither microMIPS nor SmartMIPS support
|
||||
|
||||
config CPU_HAS_SMARTMIPS
|
||||
depends on SYS_SUPPORTS_SMARTMIPS
|
||||
bool "Support for the SmartMIPS ASE"
|
||||
bool "SmartMIPS"
|
||||
help
|
||||
SmartMIPS is a extension of the MIPS32 architecture aimed at
|
||||
increased security at both hardware and software level for
|
||||
|
@ -2115,11 +2123,13 @@ config CPU_HAS_SMARTMIPS
|
|||
|
||||
config CPU_MICROMIPS
|
||||
depends on SYS_SUPPORTS_MICROMIPS
|
||||
bool "Build kernel using microMIPS ISA"
|
||||
bool "microMIPS"
|
||||
help
|
||||
When this option is enabled the kernel will be built using the
|
||||
microMIPS ISA
|
||||
|
||||
endchoice
|
||||
|
||||
config CPU_HAS_MSA
|
||||
bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)"
|
||||
depends on CPU_SUPPORTS_MSA
|
||||
|
|
|
@ -20,9 +20,15 @@
|
|||
#define WORD_INSN ".word"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_MICROMIPS
|
||||
#define NOP_INSN "nop32"
|
||||
#else
|
||||
#define NOP_INSN "nop"
|
||||
#endif
|
||||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm_volatile_goto("1:\tnop\n\t"
|
||||
asm_volatile_goto("1:\t" NOP_INSN "\n\t"
|
||||
"nop\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
WORD_INSN " 1b, %l[l_yes], %0\n\t"
|
||||
|
|
|
@ -41,10 +41,8 @@
|
|||
#define cpu_has_mcheck 0
|
||||
#define cpu_has_mdmx 0
|
||||
#define cpu_has_mips16 0
|
||||
#define cpu_has_mips32r1 0
|
||||
#define cpu_has_mips32r2 0
|
||||
#define cpu_has_mips3d 0
|
||||
#define cpu_has_mips64r1 0
|
||||
#define cpu_has_mips64r2 0
|
||||
#define cpu_has_mipsmt 0
|
||||
#define cpu_has_prefetch 0
|
||||
|
|
|
@ -661,6 +661,8 @@
|
|||
#define MIPS_CONF6_SYND (_ULCAST_(1) << 13)
|
||||
/* proAptiv FTLB on/off bit */
|
||||
#define MIPS_CONF6_FTLBEN (_ULCAST_(1) << 15)
|
||||
/* FTLB probability bits */
|
||||
#define MIPS_CONF6_FTLBP_SHIFT (16)
|
||||
|
||||
#define MIPS_CONF7_WII (_ULCAST_(1) << 31)
|
||||
|
||||
|
|
|
@ -257,7 +257,11 @@ static inline void protected_flush_icache_line(unsigned long addr)
|
|||
*/
|
||||
static inline void protected_writeback_dcache_line(unsigned long addr)
|
||||
{
|
||||
#ifdef CONFIG_EVA
|
||||
protected_cachee_op(Hit_Writeback_Inv_D, addr);
|
||||
#else
|
||||
protected_cache_op(Hit_Writeback_Inv_D, addr);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void protected_writeback_scache_line(unsigned long addr)
|
||||
|
|
|
@ -301,7 +301,8 @@ do { \
|
|||
__get_kernel_common((x), size, __gu_ptr); \
|
||||
else \
|
||||
__get_user_common((x), size, __gu_ptr); \
|
||||
} \
|
||||
} else \
|
||||
(x) = 0; \
|
||||
\
|
||||
__gu_err; \
|
||||
})
|
||||
|
@ -316,6 +317,7 @@ do { \
|
|||
" .insn \n" \
|
||||
" .section .fixup,\"ax\" \n" \
|
||||
"3: li %0, %4 \n" \
|
||||
" move %1, $0 \n" \
|
||||
" j 2b \n" \
|
||||
" .previous \n" \
|
||||
" .section __ex_table,\"a\" \n" \
|
||||
|
@ -630,6 +632,7 @@ do { \
|
|||
" .insn \n" \
|
||||
" .section .fixup,\"ax\" \n" \
|
||||
"3: li %0, %4 \n" \
|
||||
" move %1, $0 \n" \
|
||||
" j 2b \n" \
|
||||
" .previous \n" \
|
||||
" .section __ex_table,\"a\" \n" \
|
||||
|
@ -773,10 +776,11 @@ extern void __put_user_unaligned_unknown(void);
|
|||
"jal\t" #destination "\n\t"
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
|
||||
#define DADDI_SCRATCH "$0"
|
||||
#else
|
||||
#if defined(CONFIG_CPU_DADDI_WORKAROUNDS) || (defined(CONFIG_EVA) && \
|
||||
defined(CONFIG_CPU_HAS_PREFETCH))
|
||||
#define DADDI_SCRATCH "$3"
|
||||
#else
|
||||
#define DADDI_SCRATCH "$0"
|
||||
#endif
|
||||
|
||||
extern size_t __copy_user(void *__to, const void *__from, size_t __n);
|
||||
|
@ -1418,7 +1422,7 @@ static inline long __strnlen_user(const char __user *s, long n)
|
|||
}
|
||||
|
||||
/*
|
||||
* strlen_user: - Get the size of a string in user space.
|
||||
* strnlen_user: - Get the size of a string in user space.
|
||||
* @str: The string to measure.
|
||||
*
|
||||
* Context: User context only. This function may sleep.
|
||||
|
@ -1427,9 +1431,7 @@ static inline long __strnlen_user(const char __user *s, long n)
|
|||
*
|
||||
* Returns the size of the string INCLUDING the terminating NUL.
|
||||
* On exception, returns 0.
|
||||
*
|
||||
* If there is a limit on the length of a valid string, you may wish to
|
||||
* consider using strnlen_user() instead.
|
||||
* If the string is too long, returns a value greater than @n.
|
||||
*/
|
||||
static inline long strnlen_user(const char __user *s, long n)
|
||||
{
|
||||
|
|
|
@ -1045,7 +1045,7 @@
|
|||
#define __NR_seccomp (__NR_Linux + 316)
|
||||
#define __NR_getrandom (__NR_Linux + 317)
|
||||
#define __NR_memfd_create (__NR_Linux + 318)
|
||||
#define __NR_memfd_create (__NR_Linux + 319)
|
||||
#define __NR_bpf (__NR_Linux + 319)
|
||||
|
||||
/*
|
||||
* Offset of the last N32 flavoured syscall
|
||||
|
|
|
@ -208,7 +208,6 @@ bmips_reset_nmi_vec_end:
|
|||
END(bmips_reset_nmi_vec)
|
||||
|
||||
.set pop
|
||||
.previous
|
||||
|
||||
/***********************************************************************
|
||||
* CPU1 warm restart vector (used for second and subsequent boots).
|
||||
|
@ -281,5 +280,3 @@ LEAF(bmips_enable_xks01)
|
|||
jr ra
|
||||
|
||||
END(bmips_enable_xks01)
|
||||
|
||||
.previous
|
||||
|
|
|
@ -229,6 +229,7 @@ LEAF(mips_cps_core_init)
|
|||
nop
|
||||
|
||||
.set push
|
||||
.set mips32r2
|
||||
.set mt
|
||||
|
||||
/* Only allow 1 TC per VPE to execute... */
|
||||
|
@ -345,6 +346,7 @@ LEAF(mips_cps_boot_vpes)
|
|||
nop
|
||||
|
||||
.set push
|
||||
.set mips32r2
|
||||
.set mt
|
||||
|
||||
1: /* Enter VPE configuration state */
|
||||
|
|
|
@ -193,6 +193,32 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
|
|||
static char unknown_isa[] = KERN_ERR \
|
||||
"Unsupported ISA type, c0.config0: %d.";
|
||||
|
||||
static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c)
|
||||
{
|
||||
|
||||
unsigned int probability = c->tlbsize / c->tlbsizevtlb;
|
||||
|
||||
/*
|
||||
* 0 = All TLBWR instructions go to FTLB
|
||||
* 1 = 15:1: For every 16 TBLWR instructions, 15 go to the
|
||||
* FTLB and 1 goes to the VTLB.
|
||||
* 2 = 7:1: As above with 7:1 ratio.
|
||||
* 3 = 3:1: As above with 3:1 ratio.
|
||||
*
|
||||
* Use the linear midpoint as the probability threshold.
|
||||
*/
|
||||
if (probability >= 12)
|
||||
return 1;
|
||||
else if (probability >= 6)
|
||||
return 2;
|
||||
else
|
||||
/*
|
||||
* So FTLB is less than 4 times bigger than VTLB.
|
||||
* A 3:1 ratio can still be useful though.
|
||||
*/
|
||||
return 3;
|
||||
}
|
||||
|
||||
static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
|
||||
{
|
||||
unsigned int config6;
|
||||
|
@ -203,9 +229,14 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
|
|||
case CPU_P5600:
|
||||
/* proAptiv & related cores use Config6 to enable the FTLB */
|
||||
config6 = read_c0_config6();
|
||||
/* Clear the old probability value */
|
||||
config6 &= ~(3 << MIPS_CONF6_FTLBP_SHIFT);
|
||||
if (enable)
|
||||
/* Enable FTLB */
|
||||
write_c0_config6(config6 | MIPS_CONF6_FTLBEN);
|
||||
write_c0_config6(config6 |
|
||||
(calculate_ftlb_probability(c)
|
||||
<< MIPS_CONF6_FTLBP_SHIFT)
|
||||
| MIPS_CONF6_FTLBEN);
|
||||
else
|
||||
/* Disable FTLB */
|
||||
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
|
||||
|
@ -757,31 +788,34 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
|
|||
c->cputype = CPU_LOONGSON2;
|
||||
__cpu_name[cpu] = "ICT Loongson-2";
|
||||
set_elf_platform(cpu, "loongson2e");
|
||||
set_isa(c, MIPS_CPU_ISA_III);
|
||||
break;
|
||||
case PRID_REV_LOONGSON2F:
|
||||
c->cputype = CPU_LOONGSON2;
|
||||
__cpu_name[cpu] = "ICT Loongson-2";
|
||||
set_elf_platform(cpu, "loongson2f");
|
||||
set_isa(c, MIPS_CPU_ISA_III);
|
||||
break;
|
||||
case PRID_REV_LOONGSON3A:
|
||||
c->cputype = CPU_LOONGSON3;
|
||||
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
|
||||
__cpu_name[cpu] = "ICT Loongson-3";
|
||||
set_elf_platform(cpu, "loongson3a");
|
||||
set_isa(c, MIPS_CPU_ISA_M64R1);
|
||||
break;
|
||||
case PRID_REV_LOONGSON3B_R1:
|
||||
case PRID_REV_LOONGSON3B_R2:
|
||||
c->cputype = CPU_LOONGSON3;
|
||||
__cpu_name[cpu] = "ICT Loongson-3";
|
||||
set_elf_platform(cpu, "loongson3b");
|
||||
set_isa(c, MIPS_CPU_ISA_M64R1);
|
||||
break;
|
||||
}
|
||||
|
||||
set_isa(c, MIPS_CPU_ISA_III);
|
||||
c->options = R4K_OPTS |
|
||||
MIPS_CPU_FPU | MIPS_CPU_LLSC |
|
||||
MIPS_CPU_32FPR;
|
||||
c->tlbsize = 64;
|
||||
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
|
||||
break;
|
||||
case PRID_IMP_LOONGSON_32: /* Loongson-1 */
|
||||
decode_configs(c);
|
||||
|
|
|
@ -18,31 +18,53 @@
|
|||
|
||||
#ifdef HAVE_JUMP_LABEL
|
||||
|
||||
#define J_RANGE_MASK ((1ul << 28) - 1)
|
||||
/*
|
||||
* Define parameters for the standard MIPS and the microMIPS jump
|
||||
* instruction encoding respectively:
|
||||
*
|
||||
* - the ISA bit of the target, either 0 or 1 respectively,
|
||||
*
|
||||
* - the amount the jump target address is shifted right to fit in the
|
||||
* immediate field of the machine instruction, either 2 or 1,
|
||||
*
|
||||
* - the mask determining the size of the jump region relative to the
|
||||
* delay-slot instruction, either 256MB or 128MB,
|
||||
*
|
||||
* - the jump target alignment, either 4 or 2 bytes.
|
||||
*/
|
||||
#define J_ISA_BIT IS_ENABLED(CONFIG_CPU_MICROMIPS)
|
||||
#define J_RANGE_SHIFT (2 - J_ISA_BIT)
|
||||
#define J_RANGE_MASK ((1ul << (26 + J_RANGE_SHIFT)) - 1)
|
||||
#define J_ALIGN_MASK ((1ul << J_RANGE_SHIFT) - 1)
|
||||
|
||||
void arch_jump_label_transform(struct jump_entry *e,
|
||||
enum jump_label_type type)
|
||||
{
|
||||
union mips_instruction *insn_p;
|
||||
union mips_instruction insn;
|
||||
union mips_instruction *insn_p =
|
||||
(union mips_instruction *)(unsigned long)e->code;
|
||||
|
||||
/* Jump only works within a 256MB aligned region. */
|
||||
BUG_ON((e->target & ~J_RANGE_MASK) != (e->code & ~J_RANGE_MASK));
|
||||
insn_p = (union mips_instruction *)msk_isa16_mode(e->code);
|
||||
|
||||
/* Target must have 4 byte alignment. */
|
||||
BUG_ON((e->target & 3) != 0);
|
||||
/* Jump only works within an aligned region its delay slot is in. */
|
||||
BUG_ON((e->target & ~J_RANGE_MASK) != ((e->code + 4) & ~J_RANGE_MASK));
|
||||
|
||||
/* Target must have the right alignment and ISA must be preserved. */
|
||||
BUG_ON((e->target & J_ALIGN_MASK) != J_ISA_BIT);
|
||||
|
||||
if (type == JUMP_LABEL_ENABLE) {
|
||||
insn.j_format.opcode = j_op;
|
||||
insn.j_format.target = (e->target & J_RANGE_MASK) >> 2;
|
||||
insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op;
|
||||
insn.j_format.target = e->target >> J_RANGE_SHIFT;
|
||||
} else {
|
||||
insn.word = 0; /* nop */
|
||||
}
|
||||
|
||||
get_online_cpus();
|
||||
mutex_lock(&text_mutex);
|
||||
*insn_p = insn;
|
||||
if (IS_ENABLED(CONFIG_CPU_MICROMIPS)) {
|
||||
insn_p->halfword[0] = insn.word >> 16;
|
||||
insn_p->halfword[1] = insn.word;
|
||||
} else
|
||||
*insn_p = insn;
|
||||
|
||||
flush_icache_range((unsigned long)insn_p,
|
||||
(unsigned long)insn_p + sizeof(*insn_p));
|
||||
|
|
|
@ -94,12 +94,12 @@ int rtlx_open(int index, int can_sleep)
|
|||
int ret = 0;
|
||||
|
||||
if (index >= RTLX_CHANNELS) {
|
||||
pr_debug(KERN_DEBUG "rtlx_open index out of range\n");
|
||||
pr_debug("rtlx_open index out of range\n");
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
if (atomic_inc_return(&channel_wqs[index].in_open) > 1) {
|
||||
pr_debug(KERN_DEBUG "rtlx_open channel %d already opened\n", index);
|
||||
pr_debug("rtlx_open channel %d already opened\n", index);
|
||||
ret = -EBUSY;
|
||||
goto out_fail;
|
||||
}
|
||||
|
|
|
@ -485,7 +485,7 @@ static void __init bootmem_init(void)
|
|||
* NOTE: historically plat_mem_setup did the entire platform initialization.
|
||||
* This was rather impractical because it meant plat_mem_setup had to
|
||||
* get away without any kind of memory allocator. To keep old code from
|
||||
* breaking plat_setup was just renamed to plat_setup and a second platform
|
||||
* breaking plat_setup was just renamed to plat_mem_setup and a second platform
|
||||
* initialization hook for anything else was introduced.
|
||||
*/
|
||||
|
||||
|
@ -493,7 +493,7 @@ static int usermem __initdata;
|
|||
|
||||
static int __init early_parse_mem(char *p)
|
||||
{
|
||||
unsigned long start, size;
|
||||
phys_t start, size;
|
||||
|
||||
/*
|
||||
* If a user specifies memory size, we
|
||||
|
|
|
@ -658,13 +658,13 @@ static int signal_setup(void)
|
|||
save_fp_context = _save_fp_context;
|
||||
restore_fp_context = _restore_fp_context;
|
||||
} else {
|
||||
save_fp_context = copy_fp_from_sigcontext;
|
||||
restore_fp_context = copy_fp_to_sigcontext;
|
||||
save_fp_context = copy_fp_to_sigcontext;
|
||||
restore_fp_context = copy_fp_from_sigcontext;
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
#else
|
||||
save_fp_context = copy_fp_from_sigcontext;;
|
||||
restore_fp_context = copy_fp_to_sigcontext;
|
||||
save_fp_context = copy_fp_to_sigcontext;
|
||||
restore_fp_context = copy_fp_from_sigcontext;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -503,6 +503,7 @@
|
|||
STOREB(t0, NBYTES-2(dst), .Ls_exc_p1\@)
|
||||
.Ldone\@:
|
||||
jr ra
|
||||
nop
|
||||
.if __memcpy == 1
|
||||
END(memcpy)
|
||||
.set __memcpy, 0
|
||||
|
|
|
@ -11,7 +11,8 @@ obj-$(CONFIG_PCI) += pci.o
|
|||
# Serial port support
|
||||
#
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
obj-$(CONFIG_SERIAL_8250) += serial.o
|
||||
loongson-serial-$(CONFIG_SERIAL_8250) := serial.o
|
||||
obj-y += $(loongson-serial-m) $(loongson-serial-y)
|
||||
obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
|
||||
obj-$(CONFIG_LOONGSON_MC146818) += rtc.o
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue