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i386: Clear MCE flag on AMD K6

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It reports machine check capability in CPUID, but doesn't actually
implement all the necessary MSRs of the standard Intel machine
check architecture.

This fixes a boot failure on K6s recently introduced.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Andi Kleen 2007-05-21 14:31:47 +02:00 committed by Linus Torvalds
parent 21124a82bb
commit c12ceb766e
2 changed files with 7 additions and 3 deletions
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4
arch/i386/kernel/cpu/amd.c
View file

@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
if (c->x86 == 0x10 && !force_mwait)
clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
/* K6s reports MCEs but don't actually have all the MSRs */
if (c->x86 < 6)
clear_bit(X86_FEATURE_MCE, c->x86_capability);
}
static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)

6
arch/i386/kernel/cpu/mcheck/k7.c
View file

@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
u32 l, h;
int i;
machine_check_vector = k7_machine_check;
wmb();
if (!cpu_has(c, X86_FEATURE_MCE))
return;
machine_check_vector = k7_machine_check;
wmb();
printk (KERN_INFO "Intel machine check architecture supported.\n");
rdmsr (MSR_IA32_MCG_CAP, l, h);
if (l & (1<<8)) /* Control register present ? */