x86/bugs: Expose /sys/../spec_store_bypass
Add the sysfs file for the new vulerability. It does not do much except show the words 'Vulnerable' for recent x86 cores. Intel cores prior to family 6 are known not to be vulnerable, and so are some Atoms and some Xeon Phi. It assumes that older Cyrix, Centaur, etc. cores are immune. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Reviewed-by: Ingo Molnar <mingo@kernel.org>
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@ -478,6 +478,7 @@ What: /sys/devices/system/cpu/vulnerabilities
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/sys/devices/system/cpu/vulnerabilities/meltdown
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/sys/devices/system/cpu/vulnerabilities/spectre_v1
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/sys/devices/system/cpu/vulnerabilities/spectre_v2
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/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
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Date: January 2018
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: Information about CPU vulnerabilities
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@ -363,5 +363,6 @@
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#define X86_BUG_CPU_MELTDOWN X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */
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#define X86_BUG_SPECTRE_V1 X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditional branches */
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#define X86_BUG_SPECTRE_V2 X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirect branches */
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#define X86_BUG_SPEC_STORE_BYPASS X86_BUG(17) /* CPU is affected by speculative store bypass attack */
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#endif /* _ASM_X86_CPUFEATURES_H */
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@ -404,4 +404,9 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
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{
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return cpu_show_common(dev, attr, buf, X86_BUG_SPECTRE_V2);
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}
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ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
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{
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return cpu_show_common(dev, attr, buf, X86_BUG_SPEC_STORE_BYPASS);
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}
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#endif
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@ -927,10 +927,33 @@ static const __initconst struct x86_cpu_id cpu_no_meltdown[] = {
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{}
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};
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static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT2 },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_MERRIFIELD },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_CORE_YONAH },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNL },
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNM },
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{ X86_VENDOR_CENTAUR, 5, },
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{ X86_VENDOR_INTEL, 5, },
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{ X86_VENDOR_NSC, 5, },
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{ X86_VENDOR_ANY, 4, },
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{}
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};
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static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
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{
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u64 ia32_cap = 0;
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if (!x86_match_cpu(cpu_no_spec_store_bypass))
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setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
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if (x86_match_cpu(cpu_no_speculation))
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return;
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@ -534,14 +534,22 @@ ssize_t __weak cpu_show_spectre_v2(struct device *dev,
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return sprintf(buf, "Not affected\n");
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}
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ssize_t __weak cpu_show_spec_store_bypass(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "Not affected\n");
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}
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static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
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static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
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static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL);
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static DEVICE_ATTR(spec_store_bypass, 0444, cpu_show_spec_store_bypass, NULL);
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static struct attribute *cpu_root_vulnerabilities_attrs[] = {
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&dev_attr_meltdown.attr,
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&dev_attr_spectre_v1.attr,
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&dev_attr_spectre_v2.attr,
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&dev_attr_spec_store_bypass.attr,
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NULL
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};
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@ -53,6 +53,8 @@ extern ssize_t cpu_show_spectre_v1(struct device *dev,
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struct device_attribute *attr, char *buf);
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extern ssize_t cpu_show_spectre_v2(struct device *dev,
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struct device_attribute *attr, char *buf);
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extern ssize_t cpu_show_spec_store_bypass(struct device *dev,
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struct device_attribute *attr, char *buf);
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extern __printf(4, 5)
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struct device *cpu_device_create(struct device *parent, void *drvdata,
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