dmaengine: PL08x: move DMA signal muxing into slave prepare code
Move the DMA request muxing into the slave prepare code and txd release/completion code. This means we only hold the DMA request mux while there are descriptors waiting to be started or are in progress. This leaves txd->direction as a write-only variable; remove it. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>wifi-calibration
Russell King
parent
a936e79313
commit
c48d496329
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@ -168,7 +168,6 @@ struct pl08x_sg {
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* @tx: async tx descriptor
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* @node: node for txd list for channels
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* @dsg_list: list of children sg's
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* @direction: direction of transfer
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* @llis_bus: DMA memory address (physical) start for the LLIs
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* @llis_va: virtual memory address start for the LLIs
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* @cctl: control reg values for current txd
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@ -178,7 +177,6 @@ struct pl08x_txd {
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struct dma_async_tx_descriptor tx;
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struct list_head node;
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struct list_head dsg_list;
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enum dma_transfer_direction direction;
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dma_addr_t llis_bus;
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struct pl08x_lli *llis_va;
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/* Default cctl value for LLIs */
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@ -997,6 +995,7 @@ static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x,
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if (!list_empty(&plchan->pend_list)) {
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list_for_each_entry_safe(txdi,
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next, &plchan->pend_list, node) {
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pl08x_release_mux(plchan);
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list_del(&txdi->node);
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pl08x_free_txd(pl08x, txdi);
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}
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@ -1018,12 +1017,10 @@ static void pl08x_free_chan_resources(struct dma_chan *chan)
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/*
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* This should be called with the channel plchan->lock held
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*/
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static int prep_phy_channel(struct pl08x_dma_chan *plchan,
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struct pl08x_txd *txd)
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static int prep_phy_channel(struct pl08x_dma_chan *plchan)
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{
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struct pl08x_driver_data *pl08x = plchan->host;
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struct pl08x_phy_chan *ch;
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int ret;
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/* Check if we already have a channel */
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if (plchan->phychan) {
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@ -1038,36 +1035,11 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan,
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return -EBUSY;
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}
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/*
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* OK we have a physical channel: for memcpy() this is all we
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* need, but for slaves the physical signals may be muxed!
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* Can the platform allow us to use this channel?
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*/
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if (plchan->slave) {
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ret = pl08x_request_mux(plchan);
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if (ret < 0) {
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dev_dbg(&pl08x->adev->dev,
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"unable to use physical channel %d for transfer on %s due to platform restrictions\n",
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ch->id, plchan->name);
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/* Release physical channel & return */
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pl08x_put_phy_channel(pl08x, ch);
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return -EBUSY;
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}
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}
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plchan->phychan = ch;
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dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n",
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ch->id,
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plchan->signal,
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plchan->name);
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dev_dbg(&pl08x->adev->dev, "allocated physical channel %d for xfer on %s\n",
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ch->id, plchan->name);
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got_channel:
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/* Assign the flow control signal to this channel */
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if (txd->direction == DMA_MEM_TO_DEV)
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txd->ccfg |= plchan->signal << PL080_CONFIG_DST_SEL_SHIFT;
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else if (txd->direction == DMA_DEV_TO_MEM)
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txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT;
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plchan->phychan_hold++;
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return 0;
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@ -1077,7 +1049,6 @@ static void release_phy_channel(struct pl08x_dma_chan *plchan)
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{
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struct pl08x_driver_data *pl08x = plchan->host;
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pl08x_release_mux(plchan);
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pl08x_put_phy_channel(pl08x, plchan->phychan);
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plchan->phychan = NULL;
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}
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@ -1340,19 +1311,12 @@ static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan,
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* See if we already have a physical channel allocated,
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* else this is the time to try to get one.
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*/
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ret = prep_phy_channel(plchan, txd);
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ret = prep_phy_channel(plchan);
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if (ret) {
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/*
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* No physical channel was available.
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*
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* memcpy transfers can be sorted out at submission time.
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*
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* Slave transfers may have been denied due to platform
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* channel muxing restrictions. Since there is no guarantee
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* that this will ever be resolved, and the signal must be
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* acquired AFTER acquiring the physical channel, we will let
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* them be NACK:ed with -EBUSY here. The drivers can retry
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* the prep() call if they are eager on doing this using DMA.
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*/
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if (plchan->slave) {
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pl08x_free_txd_list(pl08x, plchan);
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@ -1423,7 +1387,6 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
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}
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list_add_tail(&dsg->node, &txd->dsg_list);
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txd->direction = DMA_MEM_TO_MEM;
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dsg->src_addr = src;
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dsg->dst_addr = dest;
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dsg->len = len;
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@ -1477,8 +1440,6 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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* will take precedence since this may configure the
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* channel target address dynamically at runtime.
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*/
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txd->direction = direction;
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if (direction == DMA_MEM_TO_DEV) {
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cctl = PL080_CONTROL_SRC_INCR;
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slave_addr = plchan->cfg.dst_addr;
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@ -1519,9 +1480,28 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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txd->ccfg |= tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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ret = pl08x_request_mux(plchan);
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if (ret < 0) {
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pl08x_free_txd(pl08x, txd);
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dev_dbg(&pl08x->adev->dev,
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"unable to mux for transfer on %s due to platform restrictions\n",
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plchan->name);
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return NULL;
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}
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dev_dbg(&pl08x->adev->dev, "allocated DMA request signal %d for xfer on %s\n",
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plchan->signal, plchan->name);
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/* Assign the flow control signal to this channel */
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if (direction == DMA_MEM_TO_DEV)
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txd->ccfg |= plchan->signal << PL080_CONFIG_DST_SEL_SHIFT;
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else
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txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT;
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for_each_sg(sgl, sg, sg_len, tmp) {
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dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT);
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if (!dsg) {
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pl08x_release_mux(plchan);
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pl08x_free_txd(pl08x, txd);
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dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n",
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__func__);
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@ -1586,6 +1566,8 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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}
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/* Dequeue jobs and free LLIs */
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if (plchan->at) {
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/* Killing this one off, release its mux */
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pl08x_release_mux(plchan);
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pl08x_free_txd(pl08x, plchan->at);
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plchan->at = NULL;
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}
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@ -1702,7 +1684,6 @@ static void pl08x_tasklet(unsigned long data)
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/*
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* No more jobs, so free up the physical channel
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* Free any allocated signal on slave transfers too
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*/
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release_phy_channel(plchan);
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plchan->state = PL08X_CHAN_IDLE;
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@ -1720,8 +1701,7 @@ static void pl08x_tasklet(unsigned long data)
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int ret;
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/* This should REALLY not fail now */
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ret = prep_phy_channel(waiting,
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waiting->waiting);
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ret = prep_phy_channel(waiting);
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BUG_ON(ret);
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waiting->phychan_hold--;
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waiting->state = PL08X_CHAN_RUNNING;
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@ -1794,6 +1774,11 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
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tx = plchan->at;
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if (tx) {
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plchan->at = NULL;
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/*
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* This descriptor is done, release its mux
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* reservation.
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*/
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pl08x_release_mux(plchan);
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dma_cookie_complete(&tx->tx);
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list_add_tail(&tx->node, &plchan->done_list);
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}
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