dma/imx-sdma: use readl_relaxed/writel_relaxed and use writel when necessary
use readl_relaxed/writel_relaxed in most places, and use writel when enable channel, because it needs memory barrier. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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@ -368,9 +368,9 @@ static int sdma_config_ownership(struct sdma_channel *sdmac,
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if (event_override && mcu_override && dsp_override)
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if (event_override && mcu_override && dsp_override)
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return -EINVAL;
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return -EINVAL;
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evt = __raw_readl(sdma->regs + SDMA_H_EVTOVR);
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evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR);
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mcu = __raw_readl(sdma->regs + SDMA_H_HOSTOVR);
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mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR);
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dsp = __raw_readl(sdma->regs + SDMA_H_DSPOVR);
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dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR);
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if (dsp_override)
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if (dsp_override)
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dsp &= ~(1 << channel);
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dsp &= ~(1 << channel);
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@ -387,16 +387,16 @@ static int sdma_config_ownership(struct sdma_channel *sdmac,
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else
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else
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mcu |= (1 << channel);
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mcu |= (1 << channel);
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__raw_writel(evt, sdma->regs + SDMA_H_EVTOVR);
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writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR);
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__raw_writel(mcu, sdma->regs + SDMA_H_HOSTOVR);
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writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR);
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__raw_writel(dsp, sdma->regs + SDMA_H_DSPOVR);
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writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR);
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return 0;
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return 0;
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}
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}
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static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
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static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
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{
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{
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__raw_writel(1 << channel, sdma->regs + SDMA_H_START);
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writel(1 << channel, sdma->regs + SDMA_H_START);
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}
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}
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/*
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/*
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@ -460,9 +460,9 @@ static void sdma_event_enable(struct sdma_channel *sdmac, unsigned int event)
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u32 val;
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u32 val;
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u32 chnenbl = chnenbl_ofs(sdma, event);
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u32 chnenbl = chnenbl_ofs(sdma, event);
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val = __raw_readl(sdma->regs + chnenbl);
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val = readl_relaxed(sdma->regs + chnenbl);
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val |= (1 << channel);
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val |= (1 << channel);
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__raw_writel(val, sdma->regs + chnenbl);
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writel_relaxed(val, sdma->regs + chnenbl);
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}
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}
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static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event)
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static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event)
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@ -472,9 +472,9 @@ static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event)
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u32 chnenbl = chnenbl_ofs(sdma, event);
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u32 chnenbl = chnenbl_ofs(sdma, event);
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u32 val;
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u32 val;
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val = __raw_readl(sdma->regs + chnenbl);
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val = readl_relaxed(sdma->regs + chnenbl);
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val &= ~(1 << channel);
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val &= ~(1 << channel);
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__raw_writel(val, sdma->regs + chnenbl);
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writel_relaxed(val, sdma->regs + chnenbl);
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}
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}
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static void sdma_handle_channel_loop(struct sdma_channel *sdmac)
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static void sdma_handle_channel_loop(struct sdma_channel *sdmac)
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@ -552,8 +552,8 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id)
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struct sdma_engine *sdma = dev_id;
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struct sdma_engine *sdma = dev_id;
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u32 stat;
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u32 stat;
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stat = __raw_readl(sdma->regs + SDMA_H_INTR);
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stat = readl_relaxed(sdma->regs + SDMA_H_INTR);
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__raw_writel(stat, sdma->regs + SDMA_H_INTR);
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writel_relaxed(stat, sdma->regs + SDMA_H_INTR);
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while (stat) {
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while (stat) {
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int channel = fls(stat) - 1;
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int channel = fls(stat) - 1;
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@ -707,7 +707,7 @@ static void sdma_disable_channel(struct sdma_channel *sdmac)
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struct sdma_engine *sdma = sdmac->sdma;
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struct sdma_engine *sdma = sdmac->sdma;
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int channel = sdmac->channel;
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int channel = sdmac->channel;
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__raw_writel(1 << channel, sdma->regs + SDMA_H_STATSTOP);
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writel_relaxed(1 << channel, sdma->regs + SDMA_H_STATSTOP);
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sdmac->status = DMA_ERROR;
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sdmac->status = DMA_ERROR;
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}
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}
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@ -780,7 +780,7 @@ static int sdma_set_channel_priority(struct sdma_channel *sdmac,
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return -EINVAL;
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return -EINVAL;
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}
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}
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__raw_writel(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel);
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writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel);
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return 0;
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return 0;
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}
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}
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@ -1228,7 +1228,7 @@ static int __init sdma_init(struct sdma_engine *sdma)
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clk_enable(sdma->clk);
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clk_enable(sdma->clk);
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/* Be sure SDMA has not started yet */
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/* Be sure SDMA has not started yet */
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__raw_writel(0, sdma->regs + SDMA_H_C0PTR);
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writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
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sdma->channel_control = dma_alloc_coherent(NULL,
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sdma->channel_control = dma_alloc_coherent(NULL,
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MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
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MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
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@ -1251,11 +1251,11 @@ static int __init sdma_init(struct sdma_engine *sdma)
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/* disable all channels */
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/* disable all channels */
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for (i = 0; i < sdma->num_events; i++)
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for (i = 0; i < sdma->num_events; i++)
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__raw_writel(0, sdma->regs + chnenbl_ofs(sdma, i));
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writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i));
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/* All channels have priority 0 */
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/* All channels have priority 0 */
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for (i = 0; i < MAX_DMA_CHANNELS; i++)
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for (i = 0; i < MAX_DMA_CHANNELS; i++)
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__raw_writel(0, sdma->regs + SDMA_CHNPRI_0 + i * 4);
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writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4);
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ret = sdma_request_channel(&sdma->channel[0]);
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ret = sdma_request_channel(&sdma->channel[0]);
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if (ret)
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if (ret)
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@ -1264,16 +1264,16 @@ static int __init sdma_init(struct sdma_engine *sdma)
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sdma_config_ownership(&sdma->channel[0], false, true, false);
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sdma_config_ownership(&sdma->channel[0], false, true, false);
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/* Set Command Channel (Channel Zero) */
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/* Set Command Channel (Channel Zero) */
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__raw_writel(0x4050, sdma->regs + SDMA_CHN0ADDR);
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writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
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/* Set bits of CONFIG register but with static context switching */
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/* Set bits of CONFIG register but with static context switching */
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/* FIXME: Check whether to set ACR bit depending on clock ratios */
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/* FIXME: Check whether to set ACR bit depending on clock ratios */
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__raw_writel(0, sdma->regs + SDMA_H_CONFIG);
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writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
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__raw_writel(ccb_phys, sdma->regs + SDMA_H_C0PTR);
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writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
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/* Set bits of CONFIG register with given context switching mode */
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/* Set bits of CONFIG register with given context switching mode */
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__raw_writel(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
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writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
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/* Initializes channel's priorities */
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/* Initializes channel's priorities */
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sdma_set_channel_priority(&sdma->channel[0], 7);
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sdma_set_channel_priority(&sdma->channel[0], 7);
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