clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.
Fixes setting low-resolution video modes on HDMI. Now the PLLH_PIX divider adjusts itself until the PLLH is within bounds. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -502,8 +502,12 @@ static long bcm2835_pll_rate_from_divisors(unsigned long parent_rate,
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static long bcm2835_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
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const struct bcm2835_pll_data *data = pll->data;
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u32 ndiv, fdiv;
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rate = clamp(rate, data->min_rate, data->max_rate);
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bcm2835_pll_choose_ndiv_and_fdiv(rate, *parent_rate, &ndiv, &fdiv);
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return bcm2835_pll_rate_from_divisors(*parent_rate, ndiv, fdiv, 1);
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@ -608,13 +612,6 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
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u32 ana[4];
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int i;
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if (rate < data->min_rate || rate > data->max_rate) {
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dev_err(cprman->dev, "%s: rate out of spec: %lu vs (%lu, %lu)\n",
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clk_hw_get_name(hw), rate,
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data->min_rate, data->max_rate);
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return -EINVAL;
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}
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if (rate > data->max_fb_rate) {
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use_fb_prediv = true;
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rate /= 2;
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