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ARM: l2c: ux500: don't try to change the L2 cache auxiliary control register

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ux500 can't change the auxiliary control register, so there's no point
passing values to try and modify it to the l2x0 init functions.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2014-03-19 12:47:58 +00:00
parent c4a202c8ae
commit c59917f877
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mach-ux500/cache-l2x0.c
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@ -57,9 +57,9 @@ static int __init ux500_l2x0_init(void)
outer_cache.write_sec = ux500_l2c310_write_sec;
if (of_have_populated_dt())
l2x0_of_init(0x3e000000, 0xc00f0fff);
l2x0_of_init(0, ~0);
else
l2x0_init(l2x0_base, 0x3e000000, 0xc00f0fff);
l2x0_init(l2x0_base, 0, ~0);
return 0;
}