ARM: l2c: ux500: don't try to change the L2 cache auxiliary control register
ux500 can't change the auxiliary control register, so there's no point passing values to try and modify it to the l2x0 init functions. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -57,9 +57,9 @@ static int __init ux500_l2x0_init(void)
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outer_cache.write_sec = ux500_l2c310_write_sec;
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if (of_have_populated_dt())
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l2x0_of_init(0x3e000000, 0xc00f0fff);
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l2x0_of_init(0, ~0);
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else
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l2x0_init(l2x0_base, 0x3e000000, 0xc00f0fff);
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l2x0_init(l2x0_base, 0, ~0);
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return 0;
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}
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