mmc: omap_hsmmc: add DMA engine support
Add DMA engine support to the OMAP HSMMC driver. This supplements the private DMA API implementation contained within this driver, and the driver can be switched at build time between using DMA engine and the private DMA API. Tested-by: Grazvydas Ignotas <notasas@gmail.com> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -19,6 +19,7 @@
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/debugfs.h>
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#include <linux/dmaengine.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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@ -165,7 +166,9 @@ struct omap_hsmmc_host {
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u32 bytesleft;
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int suspended;
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int irq;
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int use_dma, dma_ch;
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int use_dma, dma_ch, dma2;
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struct dma_chan *tx_chan;
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struct dma_chan *rx_chan;
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int dma_line_tx, dma_line_rx;
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int slot_id;
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int response_busy;
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@ -797,19 +800,26 @@ omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data)
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return DMA_FROM_DEVICE;
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}
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static struct dma_chan *omap_hsmmc_get_dma_chan(struct omap_hsmmc_host *host,
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struct mmc_data *data)
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{
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return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan;
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}
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static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq)
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{
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int dma_ch;
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int dma_ch, dma2;
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unsigned long flags;
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spin_lock_irqsave(&host->irq_lock, flags);
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host->req_in_progress = 0;
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dma_ch = host->dma_ch;
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dma2 = host->dma2;
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spin_unlock_irqrestore(&host->irq_lock, flags);
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omap_hsmmc_disable_irq(host);
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/* Do not complete the request if DMA is still in progress */
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if (mrq->data && host->use_dma && dma_ch != -1)
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if (mrq->data && host->use_dma && (dma_ch != -1 || dma2 != -1))
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return;
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host->mrq = NULL;
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mmc_request_done(host->mmc, mrq);
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@ -878,7 +888,7 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd)
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*/
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static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno)
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{
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int dma_ch;
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int dma_ch, dma2;
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unsigned long flags;
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host->data->error = errno;
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@ -886,8 +896,20 @@ static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno)
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spin_lock_irqsave(&host->irq_lock, flags);
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dma_ch = host->dma_ch;
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host->dma_ch = -1;
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dma2 = host->dma2;
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host->dma2 = -1;
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spin_unlock_irqrestore(&host->irq_lock, flags);
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if (host->use_dma && dma2 != -1) {
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struct dma_chan *chan = omap_hsmmc_get_dma_chan(host, host->data);
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dmaengine_terminate_all(chan);
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dma_unmap_sg(chan->device->dev,
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host->data->sg, host->data->sg_len,
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omap_hsmmc_get_dma_dir(host, host->data));
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host->data->host_cookie = 0;
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}
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if (host->use_dma && dma_ch != -1) {
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dma_unmap_sg(mmc_dev(host->mmc), host->data->sg,
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host->data->sg_len,
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@ -1284,9 +1306,43 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)
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}
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}
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static void omap_hsmmc_dma_callback(void *param)
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{
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struct omap_hsmmc_host *host = param;
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struct dma_chan *chan;
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struct mmc_data *data;
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int req_in_progress;
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spin_lock_irq(&host->irq_lock);
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if (host->dma2 < 0) {
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spin_unlock_irq(&host->irq_lock);
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return;
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}
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data = host->mrq->data;
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chan = omap_hsmmc_get_dma_chan(host, data);
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if (!data->host_cookie)
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dma_unmap_sg(chan->device->dev,
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data->sg, data->sg_len,
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omap_hsmmc_get_dma_dir(host, data));
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req_in_progress = host->req_in_progress;
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host->dma2 = -1;
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spin_unlock_irq(&host->irq_lock);
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/* If DMA has finished after TC, complete the request */
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if (!req_in_progress) {
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struct mmc_request *mrq = host->mrq;
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host->mrq = NULL;
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mmc_request_done(host->mmc, mrq);
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}
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}
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static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host,
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struct mmc_data *data,
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struct omap_hsmmc_next *next)
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struct omap_hsmmc_next *next,
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struct device *dev)
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{
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int dma_len;
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@ -1301,8 +1357,7 @@ static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host,
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/* Check if next job is already prepared */
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if (next ||
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(!next && data->host_cookie != host->next_data.cookie)) {
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dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
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data->sg_len,
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dma_len = dma_map_sg(dev, data->sg, data->sg_len,
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omap_hsmmc_get_dma_dir(host, data));
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} else {
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@ -1331,6 +1386,7 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
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{
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int dma_ch = 0, ret = 0, i;
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struct mmc_data *data = req->data;
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struct dma_chan *chan;
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/* Sanity check: all the SG entries must be aligned by block size. */
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for (i = 0; i < data->sg_len; i++) {
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@ -1346,24 +1402,66 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
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*/
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return -EINVAL;
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BUG_ON(host->dma_ch != -1);
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BUG_ON(host->dma_ch != -1 || host->dma2 != -1);
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ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data),
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"MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch);
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if (ret != 0) {
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dev_err(mmc_dev(host->mmc),
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"%s: omap_request_dma() failed with %d\n",
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mmc_hostname(host->mmc), ret);
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return ret;
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chan = omap_hsmmc_get_dma_chan(host, data);
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if (!chan) {
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ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data),
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"MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch);
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if (ret != 0) {
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dev_err(mmc_dev(host->mmc),
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"%s: omap_request_dma() failed with %d\n",
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mmc_hostname(host->mmc), ret);
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return ret;
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}
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ret = omap_hsmmc_pre_dma_transfer(host, data, NULL,
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mmc_dev(host->mmc));
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if (ret)
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return ret;
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host->dma_ch = dma_ch;
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host->dma_sg_idx = 0;
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omap_hsmmc_config_dma_params(host, data, data->sg);
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} else {
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struct dma_slave_config cfg;
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struct dma_async_tx_descriptor *tx;
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cfg.src_addr = host->mapbase + OMAP_HSMMC_DATA;
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cfg.dst_addr = host->mapbase + OMAP_HSMMC_DATA;
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cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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cfg.src_maxburst = data->blksz / 4;
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cfg.dst_maxburst = data->blksz / 4;
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ret = dmaengine_slave_config(chan, &cfg);
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if (ret)
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return ret;
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ret = omap_hsmmc_pre_dma_transfer(host, data, NULL,
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chan->device->dev);
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if (ret)
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return ret;
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tx = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len,
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data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!tx) {
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dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
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/* FIXME: cleanup */
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return -1;
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}
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tx->callback = omap_hsmmc_dma_callback;
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tx->callback_param = host;
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/* Does not fail */
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dmaengine_submit(tx);
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host->dma2 = 1;
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dma_async_issue_pending(chan);
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}
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ret = omap_hsmmc_pre_dma_transfer(host, data, NULL);
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if (ret)
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return ret;
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host->dma_ch = dma_ch;
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host->dma_sg_idx = 0;
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omap_hsmmc_config_dma_params(host, data, data->sg);
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return 0;
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}
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@ -1446,9 +1544,12 @@ static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq,
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struct mmc_data *data = mrq->data;
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if (host->use_dma) {
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struct dma_chan *c = omap_hsmmc_get_dma_chan(host, data);
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struct device *dev = c ? c->device->dev : mmc_dev(mmc);
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if (data->host_cookie)
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dma_unmap_sg(mmc_dev(host->mmc), data->sg,
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data->sg_len,
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dma_unmap_sg(dev,
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data->sg, data->sg_len,
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omap_hsmmc_get_dma_dir(host, data));
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data->host_cookie = 0;
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}
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@ -1464,10 +1565,14 @@ static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq,
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return ;
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}
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if (host->use_dma)
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if (host->use_dma) {
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struct dma_chan *c = omap_hsmmc_get_dma_chan(host, mrq->data);
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struct device *dev = c ? c->device->dev : mmc_dev(mmc);
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if (omap_hsmmc_pre_dma_transfer(host, mrq->data,
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&host->next_data))
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&host->next_data, dev))
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mrq->data->host_cookie = 0;
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}
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}
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/*
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@ -1479,7 +1584,7 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req)
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int err;
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BUG_ON(host->req_in_progress);
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BUG_ON(host->dma_ch != -1);
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BUG_ON(host->dma_ch != -1 || host->dma2 != -1);
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if (host->protect_card) {
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if (host->reqs_blocked < 3) {
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/*
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@ -1846,6 +1951,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
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host->use_dma = 1;
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host->dev->dma_mask = &pdata->dma_mask;
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host->dma_ch = -1;
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host->dma2 = -1;
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host->irq = irq;
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host->slot_id = 0;
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host->mapbase = res->start + pdata->reg_offset;
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}
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host->dma_line_rx = res->start;
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{
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dma_cap_mask_t mask;
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unsigned sig;
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extern bool omap_dma_filter_fn(struct dma_chan *chan, void *param);
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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#if 1
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sig = host->dma_line_rx;
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host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &sig);
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if (!host->rx_chan) {
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dev_warn(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", sig);
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}
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#endif
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#if 1
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sig = host->dma_line_tx;
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host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &sig);
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if (!host->tx_chan) {
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dev_warn(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", sig);
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}
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#endif
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}
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/* Request IRQ for MMC operations */
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ret = request_irq(host->irq, omap_hsmmc_irq, 0,
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mmc_hostname(mmc), host);
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@ -2019,6 +2148,10 @@ err_reg:
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err_irq_cd_init:
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free_irq(host->irq, host);
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err_irq:
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if (host->tx_chan)
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dma_release_channel(host->tx_chan);
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if (host->rx_chan)
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dma_release_channel(host->rx_chan);
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pm_runtime_put_sync(host->dev);
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pm_runtime_disable(host->dev);
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clk_put(host->fclk);
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if (mmc_slot(host).card_detect_irq)
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free_irq(mmc_slot(host).card_detect_irq, host);
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if (host->tx_chan)
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dma_release_channel(host->tx_chan);
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if (host->rx_chan)
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dma_release_channel(host->rx_chan);
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pm_runtime_put_sync(host->dev);
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pm_runtime_disable(host->dev);
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clk_put(host->fclk);
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