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ARM: SoC fixes for 4.4-rc 

There is a small backlog of at91 patches here, the most significant is
 the addition of some sama5d2 Xplained nodes that were waiting on an MFD include
 file to get merged through another tree. We normally try to sort those out
 before the merge window opens, but the maintainer wasn't aware of that here
 and I decided to merge the changes this time as an exception.
 
 On OMAP a series of audio changes for dra7 missed the merge window but turned
 out to be necessary to fix a boot time imprecise external abort error and to
 get audio working.
 
 The other changes are the usual simple changes, here is a list sorted by
 platform:
 
 at91:
 	removal of a useless defconfig option
 	removal of some legacy DT pieces
 	use of the proper watchdog compatible string
 	update of the MAINTAINERS entries for some Atmel drivers
 drivers/scpi:
 	hide get_scpi_ops in module from built-in code
 imx:
 	add missing .irq_set_type for i.MX GPC irq_chip.
 	fix the wrong spi-num-chipselects settings for Vybrid DSPI devices.
 	fix a merge error in Vybrid dts regarding to ADC device property
 keystone:
         fix the optional PDSP firmware loading
         fix linking RAM setup for QMs
         fix crash with clk_ignore_unused
 mediatek:
 	Enable SCPSYS power domain driver by default
 mvebu:
 	fix QNAP TS219 power-off in dts
 	fix legacy get_irqnr_and_base for dove and orion5x
 omap:
 	fix l4 related boot time errors for dm81xx
 	use lockless cldm/pwrdm api in omap4_boot_secondary
 	remove t410 abort handler to avoid hiding other critical errors
 	mark cpuidle tracepoints as _rcuidle
 	fix module alias for omap-ocp2scp
 pxa:
 	palm: Fix typos in PWM lookup table code
 renesas:
 	missing __initconst annotation for r8a7793_boards_compat_dt
 rockchip:
 	disable mmc-tuning on the veyron-minnie board
 	adding the init state for the over-temperature-protection
 zx:
 	only build power domain code when CONFIG_PM=y
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVljO8GCrR//JCVInAQJiuw//SajRIsmVRbsAKip0ujaiZnO32X2NqGL1
 r2r+GJfF0giLO+ln8A1nN+IPzA6jOdTOUY9tPYr21yof/5v92VtvpAn/e6hW3VjY
 nA+4VQm6PbcXJPaugJMp5wEyr74LJWpb13dA6u0KXAuc3/iASfKwRAIUCEvzS6tp
 dPr/d4qCGzt+XGoUq5ZqFDt0krmMSRs1AU9OAuDVmnCtZGnZaYw8jPQkqNUCv0D0
 UL4IMtIJEKU1gWaiISrFuKFM+FYuiOzU+1NFcW+dUT4d4ZCzzL7YyNlX5lPxe0BU
 rlkmScGYrz7PblCJnCXOTWqkPq+5YZ9z61uAWwbHeOmJ6Mbkv3a39A1ZzRdAS4on
 OwrPk3y57CpUI1AD1TcMkiaPEN80NIcM6RyU1QielPofbCvPqRKwBXHSnBKJBOiN
 YbSxkDOeQ4redxbFZbwuHnH+sLN+E52DSbK2oeqqmRAFc2idY+39pEXHZzieGq1f
 TuF9EYsHhTeYtnqOCG/+AhnSoLJskarkfqUa8C8If52rYnk6QXruolXbRMw3aKWY
 56l2zo96O4wmnMLvEGC6yFtI+k9L53QK75aIilPOhsiC86oAvjjurz4CZ1zhhQFA
 PZFxf/XJMWauxG0HZIbKxPKPsXTCrBd7GWU7KKBIEi7o9unUMWwtuxYxnHoxZh66
 zGqpNt3NliE=
 =auFT
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "There is a small backlog of at91 patches here, the most significant is
  the addition of some sama5d2 Xplained nodes that were waiting on an
  MFD include file to get merged through another tree.

  We normally try to sort those out before the merge window opens, but
  the maintainer wasn't aware of that here and I decided to merge the
  changes this time as an exception.

  On OMAP a series of audio changes for dra7 missed the merge window but
  turned out to be necessary to fix a boot time imprecise external abort
  error and to get audio working.

  The other changes are the usual simple changes, here is a list sorted
  by platform:

  at91:
	removal of a useless defconfig option
	removal of some legacy DT pieces
	use of the proper watchdog compatible string
	update of the MAINTAINERS entries for some Atmel drivers

  drivers/scpi:
	hide get_scpi_ops in module from built-in code

  imx:
	add missing .irq_set_type for i.MX GPC irq_chip.
	fix the wrong spi-num-chipselects settings for Vybrid DSPI devices.
	fix a merge error in Vybrid dts regarding to ADC device property

  keystone:
        fix the optional PDSP firmware loading
        fix linking RAM setup for QMs
        fix crash with clk_ignore_unused

  mediatek:
	Enable SCPSYS power domain driver by default

  mvebu:
	fix QNAP TS219 power-off in dts
	fix legacy get_irqnr_and_base for dove and orion5x

  omap:
	fix l4 related boot time errors for dm81xx
	use lockless cldm/pwrdm api in omap4_boot_secondary
	remove t410 abort handler to avoid hiding other critical errors
	mark cpuidle tracepoints as _rcuidle
	fix module alias for omap-ocp2scp

  pxa:
	palm: Fix typos in PWM lookup table code

  renesas:
	missing __initconst annotation for r8a7793_boards_compat_dt

  rockchip:
	disable mmc-tuning on the veyron-minnie board
	adding the init state for the over-temperature-protection

  zx:
	only build power domain code when CONFIG_PM=y"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
  ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary
  arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data
  ARM: orion5x: Fix legacy get_irqnr_and_base
  ARM: dove: Fix legacy get_irqnr_and_base
  soc: Mediatek: Enable SCPSYS power domain driver by default
  ARM: dts: vfxxx: Fix dspi[01] spi-num-chipselects.
  ARM: dts: keystone: k2l: fix kernel crash when clk_ignore_unused is not in bootargs
  soc: ti: knav_qmss_queue: Fix linking RAM setup for queue managers
  soc: ti: use request_firmware_direct() as acc firmware is optional
  ARM: imx: add platform irq type setting in gpc
  ARM: dts: vfxxx: Fix erroneous property in esdhc0 node
  ARM: shmobile: r8a7793: proper constness with __initconst
  scpi: hide get_scpi_ops in module from built-in code
  ARM: zx: only build power domain code when CONFIG_PM=y
  ARM: pxa: palm: Fix typos in PWM lookup table code
  ARM: dts: Kirkwood: Fix QNAP TS219 power-off
  ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
  ARM: dts: rockchip: temporarily remove emmc hs200 speed from rk3288 minnie
  MAINTAINERS: Atmel drivers: change NAND and ISI entries
  ARM: at91/dt: sama5d2 Xplained: add several devices
  ...
steinar/wifi_calib_4_9_kernel
Linus Torvalds 2015-11-27 14:22:03 -08:00
parent a3b11c79ad a405fd1b1f
commit c64410f3ec
50 changed files with 280 additions and 254 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
Documentation/arm/keystone/Overview.txt
View File

@ -49,24 +49,6 @@ specified through DTS. Following are the DTS used:-
The device tree documentation for the keystone machines are located at
Documentation/devicetree/bindings/arm/keystone/keystone.txt
Known issues & workaround
-------------------------
Some of the device drivers used on keystone are re-used from that from
DaVinci and other TI SoCs. These device drivers may use clock APIs directly.
Some of the keystone specific drivers such as netcp uses run time power
management API instead to enable clock. As this API has limitations on
keystone, following workaround is needed to boot Linux.
Add 'clk_ignore_unused' to the bootargs env variable in u-boot. Otherwise
clock frameworks will try to disable clocks that are unused and disable
the hardware. This is because netcp related power domain and clock
domains are enabled in u-boot as run time power management API currently
doesn't enable clocks for netcp due to a limitation. This workaround is
expected to be removed in the future when proper API support becomes
available. Until then, this work around is needed.
Document Author
---------------
Murali Karicheri <m-karicheri2@ti.com>

5
MAINTAINERS
View File

@ -1931,7 +1931,7 @@ S: Supported
F: drivers/i2c/busses/i2c-at91.c
ATMEL ISI DRIVER
M: Josh Wu <josh.wu@atmel.com>
M: Ludovic Desroches <ludovic.desroches@atmel.com>
L: linux-media@vger.kernel.org
S: Supported
F: drivers/media/platform/soc_camera/atmel-isi.c
@ -1950,7 +1950,8 @@ S: Supported
F: drivers/net/ethernet/cadence/
ATMEL NAND DRIVER
M: Josh Wu <josh.wu@atmel.com>
M: Wenyou Yang <wenyou.yang@atmel.com>
M: Josh Wu <rainyfeeling@outlook.com>
L: linux-mtd@lists.infradead.org
S: Supported
F: drivers/mtd/nand/atmel_nand*

6
arch/arm/boot/dts/animeo_ip.dts
View File

@ -155,21 +155,21 @@
label = "keyswitch_in";
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
linux,code = <28>;
gpio-key,wakeup;
wakeup-source;
};
error_in {
label = "error_in";
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
linux,code = <29>;
gpio-key,wakeup;
wakeup-source;
};
btn {
label = "btn";
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
linux,code = <31>;
gpio-key,wakeup;
wakeup-source;
};
};
};

2
arch/arm/boot/dts/at91-foxg20.dts
View File

@ -159,7 +159,7 @@
label = "Button";
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
gpio-key,wakeup;
wakeup-source;
};
};
};

13
arch/arm/boot/dts/at91-kizbox.dts
View File

@ -24,15 +24,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
main_xtal {
clock-frequency = <18432000>;
};
@ -94,14 +85,14 @@
label = "PB_RST";
gpios = <&pioB 30 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
user {
label = "PB_USER";
gpios = <&pioB 31 GPIO_ACTIVE_HIGH>;
linux,code = <0x101>;
gpio-key,wakeup;
wakeup-source;
};
};

6
arch/arm/boot/dts/at91-kizbox2.dts
View File

@ -171,21 +171,21 @@
label = "PB_PROG";
gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
linux,code = <0x102>;
gpio-key,wakeup;
wakeup-source;
};
reset {
label = "PB_RST";
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
user {
label = "PB_USER";
gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
linux,code = <0x101>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/at91-kizboxmini.dts
View File

@ -98,14 +98,14 @@
label = "PB_PROG";
gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
linux,code = <0x102>;
gpio-key,wakeup;
wakeup-source;
};
reset {
label = "PB_RST";
gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
};

2
arch/arm/boot/dts/at91-qil_a9260.dts
View File

@ -183,7 +183,7 @@
label = "user_pb";
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
wakeup-source;
};
};

115
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View File

@ -45,6 +45,7 @@
/dts-v1/;
#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"
#include <dt-bindings/mfd/atmel-flexcom.h>
/ {
model = "Atmel SAMA5D2 Xplained";
@ -59,15 +60,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -91,6 +83,22 @@
status = "okay";
};
sdmmc0: sdio-host@a0000000 {
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
non-removable;
mmc-ddr-1_8v;
status = "okay";
};
sdmmc1: sdio-host@b0000000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
};
apb {
spi0: spi@f8000000 {
pinctrl-names = "default";
@ -181,12 +189,49 @@
};
};
flx0: flexcom@f8034000 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
uart5: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx0_clk>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
atmel,fifo-size = <32>;
status = "okay";
};
};
uart3: serial@fc008000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_default>;
status = "okay";
};
flx4: flexcom@fc018000 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c2: i2c@600 {
compatible = "atmel,sama5d2-i2c";
reg = <0x600 0x200>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <0>, <0>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx4_clk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;
status = "okay";
};
};
i2c1: i2c@fc028000 {
dmas = <0>, <0>;
pinctrl-names = "default";
@ -201,6 +246,18 @@
};
pinctrl@fc038000 {
pinctrl_flx0_default: flx0_default {
pinmux = <PIN_PB28__FLEXCOM0_IO0>,
<PIN_PB29__FLEXCOM0_IO1>;
bias-disable;
};
pinctrl_flx4_default: flx4_default {
pinmux = <PIN_PD12__FLEXCOM4_IO0>,
<PIN_PD13__FLEXCOM4_IO1>;
bias-disable;
};
pinctrl_i2c0_default: i2c0_default {
pinmux = <PIN_PD21__TWD0>,
<PIN_PD22__TWCK0>;
@ -227,6 +284,46 @@
bias-disable;
};
pinctrl_sdmmc0_default: sdmmc0_default {
cmd_data {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
<PIN_PA3__SDMMC0_DAT1>,
<PIN_PA4__SDMMC0_DAT2>,
<PIN_PA5__SDMMC0_DAT3>,
<PIN_PA6__SDMMC0_DAT4>,
<PIN_PA7__SDMMC0_DAT5>,
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
};
ck_cd_rstn_vddsel {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA10__SDMMC0_RSTN>,
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
};
pinctrl_sdmmc1_default: sdmmc1_default {
cmd_data {
pinmux = <PIN_PA28__SDMMC1_CMD>,
<PIN_PA18__SDMMC1_DAT0>,
<PIN_PA19__SDMMC1_DAT1>,
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
};
conf-ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
};
};
pinctrl_spi0_default: spi0_default {
pinmux = <PIN_PA14__SPI0_SPCK>,
<PIN_PA15__SPI0_MOSI>,

2
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View File

@ -315,7 +315,7 @@
label = "PB_USER";
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
gpio-key,wakeup;
wakeup-source;
};
};

12
arch/arm/boot/dts/at91-sama5d4_xplained.dts
View File

@ -50,7 +50,6 @@
compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
chosen {
bootargs = "ignore_loglevel earlyprintk";
stdout-path = "serial0:115200n8";
};
@ -59,15 +58,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -235,7 +225,7 @@
label = "pb_user1";
gpios = <&pioE 8 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
};

12
arch/arm/boot/dts/at91-sama5d4ek.dts
View File

@ -50,7 +50,6 @@
compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5";
chosen {
bootargs = "ignore_loglevel earlyprintk";
stdout-path = "serial0:115200n8";
};
@ -59,15 +58,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -304,7 +294,7 @@
label = "pb_user1";
gpios = <&pioE 13 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
};

9
arch/arm/boot/dts/at91rm9200ek.dts
View File

@ -21,15 +21,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
slow_xtal {
clock-frequency = <32768>;
};

19
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -22,15 +22,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -149,7 +140,7 @@
ti,debounce-tol = /bits/ 16 <65535>;
ti,debounce-max = /bits/ 16 <1>;
linux,wakeup;
wakeup-source;
};
};
@ -193,28 +184,28 @@
label = "button_0";
gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
linux,code = <256>;
gpio-key,wakeup;
wakeup-source;
};
button_1 {
label = "button_1";
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
linux,code = <257>;
gpio-key,wakeup;
wakeup-source;
};
button_2 {
label = "button_2";
gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
linux,code = <258>;
gpio-key,wakeup;
wakeup-source;
};
button_3 {
label = "button_3";
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
linux,code = <259>;
gpio-key,wakeup;
wakeup-source;
};
};
};

13
arch/arm/boot/dts/at91sam9263ek.dts
View File

@ -22,15 +22,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <16367660>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -213,14 +204,14 @@
label = "left_click";
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
wakeup-source;
};
right_click {
label = "right_click";
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
wakeup-source;
};
};

13
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View File

@ -19,15 +19,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -206,14 +197,14 @@
label = "Button 3";
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
gpio-key,wakeup;
wakeup-source;
};
btn4 {
label = "Button 4";
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
gpio-key,wakeup;
wakeup-source;
};
};

13
arch/arm/boot/dts/at91sam9m10g45ek.dts
View File

@ -24,15 +24,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -323,14 +314,14 @@
label = "left_click";
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
wakeup-source;
};
right_click {
label = "right_click";
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
wakeup-source;
};
left {

11
arch/arm/boot/dts/at91sam9n12ek.dts
View File

@ -23,15 +23,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <16000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -219,7 +210,7 @@
label = "Enter";
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
wakeup-source;
};
};

13
arch/arm/boot/dts/at91sam9rlek.dts
View File

@ -22,15 +22,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
@ -225,14 +216,14 @@
label = "right_click";
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
wakeup-source;
};
left_click {
label = "left_click";
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
wakeup-source;
};
};

11
arch/arm/boot/dts/at91sam9x5cm.dtsi
View File

@ -12,17 +12,6 @@
reg = <0x20000000 0x8000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
clocks {
slow_xtal {
clock-frequency = <32768>;

4
arch/arm/boot/dts/dra7.dtsi
View File

@ -1459,8 +1459,8 @@
interrupt-names = "tx", "rx";
dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
dma-names = "tx", "rx";
clocks = <&mcasp3_ahclkx_mux>;
clock-names = "fck";
clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
clock-names = "fck", "ahclkx";
status = "disabled";
};

2
arch/arm/boot/dts/k2l-netcp.dtsi
View File

@ -137,7 +137,7 @@ netcp: netcp@26000000 {
/* NetCP address range */
ranges = <0 0x26000000 0x1000000>;
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,

2
arch/arm/boot/dts/kirkwood-ts219.dtsi
View File

@ -40,7 +40,7 @@
};
poweroff@12100 {
compatible = "qnap,power-off";
reg = <0x12000 0x100>;
reg = <0x12100 0x100>;
clocks = <&gate_clk 7>;
};
spi@10600 {

4
arch/arm/boot/dts/rk3288-veyron-minnie.dts
View File

@ -86,6 +86,10 @@
};
};
&emmc {
/delete-property/mmc-hs200-1_8v;
};
&gpio_keys {
pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;

10
arch/arm/boot/dts/rk3288.dtsi
View File

@ -452,8 +452,10 @@
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
pinctrl-names = "default";
pinctrl-0 = <&otp_out>;
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&otp_gpio>;
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
status = "disabled";
@ -1395,6 +1397,10 @@
};
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
};

2
arch/arm/boot/dts/sama5d35ek.dts
View File

@ -49,7 +49,7 @@
label = "pb_user1";
gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
};
};

2
arch/arm/boot/dts/sama5d4.dtsi
View File

@ -1300,7 +1300,7 @@
};
watchdog@fc068640 {
compatible = "atmel,at91sam9260-wdt";
compatible = "atmel,sama5d4-wdt";
reg = <0xfc068640 0x10>;
clocks = <&clk32k>;
status = "disabled";

2
arch/arm/boot/dts/usb_a9260_common.dtsi
View File

@ -115,7 +115,7 @@
label = "user_pb";
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
wakeup-source;
};
};

2
arch/arm/boot/dts/usb_a9263.dts
View File

@ -143,7 +143,7 @@
label = "user_pb";
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
wakeup-source;
};
};

8
arch/arm/boot/dts/vfxxx.dtsi
View File

@ -158,7 +158,7 @@
interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi";
spi-num-chipselects = <5>;
spi-num-chipselects = <6>;
status = "disabled";
};
@ -170,7 +170,7 @@
interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_DSPI1>;
clock-names = "dspi";
spi-num-chipselects = <5>;
spi-num-chipselects = <4>;
status = "disabled";
};
@ -461,6 +461,8 @@
clock-names = "adc";
#io-channel-cells = <1>;
status = "disabled";
fsl,adck-max-frequency = <30000000>, <40000000>,
<20000000>;
};
esdhc0: esdhc@400b1000 {
@ -472,8 +474,6 @@
<&clks VF610_CLK_ESDHC0>;
clock-names = "ipg", "ahb", "per";
status = "disabled";
fsl,adck-max-frequency = <30000000>, <40000000>,
<20000000>;
};
esdhc1: esdhc@400b2000 {

1
arch/arm/configs/at91_dt_defconfig
View File

@ -125,7 +125,6 @@ CONFIG_POWER_RESET=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_MFD_ATMEL_HLCDC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

1
arch/arm/configs/sama5_defconfig
View File

@ -129,7 +129,6 @@ CONFIG_GPIO_SYSFS=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_RESET=y
# CONFIG_HWMON is not set
CONFIG_SSB=m
CONFIG_MFD_ATMEL_FLEXCOM=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

4
arch/arm/mach-dove/include/mach/entry-macro.S
View File

@ -18,13 +18,13 @@
@ check low interrupts
ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
mov \irqnr, #31
mov \irqnr, #32
ands \irqstat, \irqstat, \tmp
@ if no low interrupts set, check high interrupts
ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF]
moveq \irqnr, #63
moveq \irqnr, #64
andeqs \irqstat, \irqstat, \tmp
@ find first active interrupt source

1
arch/arm/mach-imx/gpc.c
View File

@ -177,6 +177,7 @@ static struct irq_chip imx_gpc_chip = {
.irq_unmask = imx_gpc_irq_unmask,
.irq_retrigger = irq_chip_retrigger_hierarchy,
.irq_set_wake = imx_gpc_irq_set_wake,
.irq_set_type = irq_chip_set_type_parent,
#ifdef CONFIG_SMP
.irq_set_affinity = irq_chip_set_affinity_parent,
#endif

6
arch/arm/mach-omap2/omap-smp.c
View File

@ -143,9 +143,9 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
* Ensure that CPU power state is set to ON to avoid CPU
* powerdomain transition on wfi
*/
clkdm_wakeup(cpu1_clkdm);
omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON);
clkdm_allow_idle(cpu1_clkdm);
clkdm_wakeup_nolock(cpu1_clkdm);
pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
clkdm_allow_idle_nolock(cpu1_clkdm);
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
while (gic_dist_disabled()) {

66
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh)
return ret;
}
static void _enable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_enable(oc->_clk);
}
}
static void _disable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_disable(oc->_clk);
}
}
/**
* _enable_clocks - enable hwmod main clock and interface clocks
* @oh: struct omap_hwmod *
@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
clk_enable(os->_clk);
}
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
_enable_optional_clocks(oh);
/* The opt clocks are controlled by the device driver. */
return 0;
@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh)
clk_disable(os->_clk);
}
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
_disable_optional_clocks(oh);
/* The opt clocks are controlled by the device driver. */
return 0;
}
static void _enable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_enable(oc->_clk);
}
}
static void _disable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_disable(oc->_clk);
}
}
/**
* _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
* @oh: struct omap_hwmod *

3
arch/arm/mach-omap2/omap_hwmod.h
View File

@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
* events by calling _reconfigure_io_chain() when a device is enabled
* or idled.
* HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
* operate and they need to be handled at the same time as the main_clk.
*/
#define HWMOD_SWSUP_SIDLE (1 << 0)
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_FORCE_MSTANDBY (1 << 11)
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
/*
* omap_hwmod._int_flags definitions

56
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
View File

@ -1297,6 +1297,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
.dev_attr = &mcspi4_dev_attr,
};
/*
* 'mcasp' class
*
*/
static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
.sysc_offs = 0x0004,
.sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type3,
};
static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
.name = "mcasp",
.sysc = &dra7xx_mcasp_sysc,
};
/* mcasp3 */
static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
};
static struct omap_hwmod dra7xx_mcasp3_hwmod = {
.name = "mcasp3",
.class = &dra7xx_mcasp_hwmod_class,
.clkdm_name = "l4per2_clkdm",
.main_clk = "mcasp3_aux_gfclk_mux",
.flags = HWMOD_OPT_CLKS_NEEDED,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
.modulemode = MODULEMODE_SWCTRL,
},
},
.opt_clks = mcasp3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcasp3_opt_clks),
};
/*
* 'mmc' class
*
@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per2 -> mcasp3 */
static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
.master = &dra7xx_l4_per2_hwmod,
.slave = &dra7xx_mcasp3_hwmod,
.clk = "l4_root_clk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> mcasp3 */
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
.master = &dra7xx_l3_main_1_hwmod,
.slave = &dra7xx_mcasp3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per1 -> elm */
static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
.master = &dra7xx_l4_per1_hwmod,
@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_wkup__dcan1,
&dra7xx_l4_per2__dcan2,
&dra7xx_l4_per2__cpgmac0,
&dra7xx_l4_per2__mcasp3,
&dra7xx_l3_main_1__mcasp3,
&dra7xx_gmac__mdio,
&dra7xx_l4_cfg__dma_system,
&dra7xx_l3_main_1__dss,

3
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
View File

@ -144,6 +144,7 @@ static struct omap_hwmod dm81xx_l4_ls_hwmod = {
.name = "l4_ls",
.clkdm_name = "alwon_l3s_clkdm",
.class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
};
/*
@ -155,6 +156,7 @@ static struct omap_hwmod dm81xx_l4_hs_hwmod = {
.name = "l4_hs",
.clkdm_name = "alwon_l3_med_clkdm",
.class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
};
/* L3 slow -> L4 ls peripheral interface running at 125MHz */
@ -850,6 +852,7 @@ static struct omap_hwmod dm816x_emac0_hwmod = {
.name = "emac0",
.clkdm_name = "alwon_ethernet_clkdm",
.class = &dm816x_emac_hwmod_class,
.flags = HWMOD_NO_IDLEST,
};
static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {

29
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -24,9 +24,6 @@
#include <linux/platform_data/iommu-omap.h>
#include <linux/platform_data/wkup_m3.h>
#include <asm/siginfo.h>
#include <asm/signal.h>
#include "common.h"
#include "common-board-devices.h"
#include "dss-common.h"
@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void)
}
#endif /* CONFIG_ARCH_OMAP3 */
#ifdef CONFIG_SOC_TI81XX
static int fault_fixed_up;
static int t410_abort_handler(unsigned long addr, unsigned int fsr,
struct pt_regs *regs)
{
if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
addr, fsr);
fault_fixed_up = 1;
return 0;
}
return 1;
}
static void __init t410_abort_init(void)
{
hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
"imprecise external abort");
}
#endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
static struct iommu_platform_data omap4_iommu_pdata = {
.reset_name = "mmu_cache",
@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = {
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
#endif
#ifdef CONFIG_SOC_TI81XX
{ "hp,t410", t410_abort_init, },
#endif
#ifdef CONFIG_SOC_OMAP5
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
#endif

4
arch/arm/mach-omap2/pm34xx.c
View File

@ -301,11 +301,11 @@ static void omap3_pm_idle(void)
if (omap_irq_pending())
return;
trace_cpu_idle(1, smp_processor_id());
trace_cpu_idle_rcuidle(1, smp_processor_id());
omap_sram_idle();
trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
}
#ifdef CONFIG_SUSPEND

2
arch/arm/mach-orion5x/include/mach/entry-macro.S
View File

@ -21,5 +21,5 @@
@ find cause bits that are unmasked
ands \irqstat, \irqstat, \tmp @ clear Z flag if any
clzne \irqnr, \irqstat @ calc irqnr
rsbne \irqnr, \irqnr, #31
rsbne \irqnr, \irqnr, #32
.endm

2
arch/arm/mach-pxa/palm27x.c
View File

@ -344,7 +344,7 @@ void __init palm27x_pwm_init(int bl, int lcd)
{
palm_bl_power = bl;
palm_lcd_power = lcd;
pwm_add_lookup(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup));
pwm_add_table(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup));
platform_device_register(&palm27x_backlight);
}
#endif

2
arch/arm/mach-pxa/palmtc.c
View File

@ -169,7 +169,7 @@ static inline void palmtc_keys_init(void) {}
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct pwm_lookup palmtc_pwm_lookup[] = {
PWM_LOOKUP("pxa25x-pwm.1", 0, "pwm-backlight.0", NULL, PALMTC_PERIOD_NS,
PWM_PERIOD_NORMAL),
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data palmtc_backlight_data = {

2
arch/arm/mach-shmobile/setup-r8a7793.c
View File

@ -19,7 +19,7 @@
#include "common.h"
#include "rcar-gen2.h"
static const char *r8a7793_boards_compat_dt[] __initconst = {
static const char * const r8a7793_boards_compat_dt[] __initconst = {
"renesas,r8a7793",
NULL,
};

2
arch/arm/mach-zx/Kconfig
View File

@ -13,7 +13,7 @@ config SOC_ZX296702
select ARM_GLOBAL_TIMER
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select PM_GENERIC_DOMAINS
select PM_GENERIC_DOMAINS if PM
help
Support for ZTE ZX296702 SoC which is a dual core CortexA9MP
endif

2
drivers/bus/omap-ocp2scp.c
View File

@ -117,7 +117,7 @@ static struct platform_driver omap_ocp2scp_driver = {
module_platform_driver(omap_ocp2scp_driver);
MODULE_ALIAS("platform: omap-ocp2scp");
MODULE_ALIAS("platform:omap-ocp2scp");
MODULE_AUTHOR("Texas Instruments Inc.");
MODULE_DESCRIPTION("OMAP OCP2SCP driver");
MODULE_LICENSE("GPL v2");

1
drivers/soc/mediatek/Kconfig
View File

@ -23,6 +23,7 @@ config MTK_PMIC_WRAP
config MTK_SCPSYS
bool "MediaTek SCPSYS Support"
depends on ARCH_MEDIATEK || COMPILE_TEST
default ARM64 && ARCH_MEDIATEK
select REGMAP
select MTK_INFRACFG
select PM_GENERIC_DOMAINS if PM

8
drivers/soc/ti/knav_qmss_queue.c
View File

@ -1179,7 +1179,7 @@ static int knav_queue_setup_link_ram(struct knav_device *kdev)
block++;
if (!block->size)
return 0;
continue;
dev_dbg(kdev->dev, "linkram1: phys:%x, virt:%p, size:%x\n",
block->phys, block->virt, block->size);
@ -1519,9 +1519,9 @@ static int knav_queue_load_pdsp(struct knav_device *kdev,
for (i = 0; i < ARRAY_SIZE(knav_acc_firmwares); i++) {
if (knav_acc_firmwares[i]) {
ret = request_firmware(&fw,
knav_acc_firmwares[i],
kdev->dev);
ret = request_firmware_direct(&fw,
knav_acc_firmwares[i],
kdev->dev);
if (!ret) {
found = true;
break;

2
include/linux/scpi_protocol.h
View File

@ -71,7 +71,7 @@ struct scpi_ops {
int (*sensor_get_value)(u16, u32 *);
};
#if IS_ENABLED(CONFIG_ARM_SCPI_PROTOCOL)
#if IS_REACHABLE(CONFIG_ARM_SCPI_PROTOCOL)
struct scpi_ops *get_scpi_ops(void);
#else
static inline struct scpi_ops *get_scpi_ops(void) { return NULL; }