MIPS: Alchemy: Fix db1200 PSC clock enablement
Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch restores functionality to both Audio and I2C/SPI. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7544/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
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pr_warn("DB1200: cant get I2C close to 50MHz\n");
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else
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clk_set_rate(c, pfc);
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clk_prepare_enable(c);
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clk_put(c);
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}
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@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
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}
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/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
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c = clk_get(NULL, "psc1_intclk");
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if (!IS_ERR(c)) {
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clk_prepare_enable(c);
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clk_put(c);
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}
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__raw_writel(PSC_SEL_CLK_SERCLK,
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(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
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wmb();
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