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[S390] fix clock comparator save area usage

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The lowcore clock comparator save area on 64 bit machines is defined to
contain only the seven most significant bits of the register.
That's also why it starts at an uneven address (0x1331).
The current code however writes eight bytes to the address and
therefore overwrites the first byte of the access register save area.
Fix this and write only seven bytes to the save area.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Heiko Carstens 2009-03-26 15:24:57 +01:00 committed by Martin Schwidefsky
parent 488253ce49
commit c70d0fef1d
1 changed files with 4 additions and 7 deletions
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11
arch/s390/kernel/reipl64.S
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@ -1,10 +1,7 @@
/*
* arch/s390/kernel/reipl.S
*
* S390 version
* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
* Copyright IBM Corp 2000,2009
* Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
* Denis Joseph Barrow,
*/
#include <asm/lowcore.h>
@ -30,7 +27,7 @@ do_reipl_asm: basr %r13,0
mvc __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),0(%r10)
stfpc __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
stckc .Lclkcmp-.Lpg0(%r13)
mvc __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
mvc __LC_CLOCK_COMP_SAVE_AREA-0x1000(7,%r1),.Lclkcmp-.Lpg0(%r13)
stpt __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
stg %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)