Merge branch 'for-linus' into for-next
* for-linus: (778 commits) ALSA: usb-audio - Fix invalid volume resolution on Logitech HD webcam c270 ALSA: usb-audio - Apply Logitech QuickCam Pro 9000 quirk only to audio iface ALSA: hda/via - Clean up duplicated codes ALSA: hda/via - Fix wrongly cleared pins after suspend on VT1802 ALSA: hda - Add keep_eapd_on flag to generic parser ALSA: hda - Allow setting automute/automic hooks after parsing ALSA: hda/via - Disable broken dynamic power control ALSA: usb-audio: fix Roland/Cakewalk UM-3G support ALSA: hda - Add headset quirk for two Dell machines ALSA: hda - add dock support for Thinkpad T431s ALSA: sis7019: fix error return code in sis_chip_create() ASoC: cs42l52: fix default value for MASTERA_VOL. ASoC: wm8994: check for array index returned ASoC: wm8994: Fix reporting of accessory removal on WM8958 ASoC: wm8994: use the correct pointer to get the control value Linux 3.10-rc3 ipc/sem.c: Fix missing wakeups in do_smart_update_queue() score: remove redundant kcore_list entries ASoC: wm5110: Correct DSP4R Mixer control name ARC: lazy dcache flush broke gdb in non-aliasing configs ...
This commit is contained in:
commit
c9e34d1525
|
@ -4,7 +4,7 @@ Required properties:
|
|||
- compatible: Should be "cdns,[<chip>-]{macb|gem}"
|
||||
Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs.
|
||||
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
|
||||
Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on
|
||||
Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
|
||||
the Cadence GEM, or the generic form: "cdns,gem".
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain macb interrupt
|
||||
|
|
|
@ -0,0 +1,25 @@
|
|||
Simple Framebuffer
|
||||
|
||||
A simple frame-buffer describes a raw memory region that may be rendered to,
|
||||
with the assumption that the display hardware has already been set up to scan
|
||||
out from that buffer.
|
||||
|
||||
Required properties:
|
||||
- compatible: "simple-framebuffer"
|
||||
- reg: Should contain the location and size of the framebuffer memory.
|
||||
- width: The width of the framebuffer in pixels.
|
||||
- height: The height of the framebuffer in pixels.
|
||||
- stride: The number of bytes in each line of the framebuffer.
|
||||
- format: The format of the framebuffer surface. Valid values are:
|
||||
- r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
|
||||
|
||||
Example:
|
||||
|
||||
framebuffer {
|
||||
compatible = "simple-framebuffer";
|
||||
reg = <0x1d385000 (1600 * 1200 * 2)>;
|
||||
width = <1600>;
|
||||
height = <1200>;
|
||||
stride = <(1600 * 2)>;
|
||||
format = "r5g6b5";
|
||||
};
|
|
@ -191,9 +191,11 @@ Linux it will look something like this:
|
|||
};
|
||||
|
||||
The bootargs property contains the kernel arguments, and the initrd-*
|
||||
properties define the address and size of an initrd blob. The
|
||||
chosen node may also optionally contain an arbitrary number of
|
||||
additional properties for platform-specific configuration data.
|
||||
properties define the address and size of an initrd blob. Note that
|
||||
initrd-end is the first address after the initrd image, so this doesn't
|
||||
match the usual semantic of struct resource. The chosen node may also
|
||||
optionally contain an arbitrary number of additional properties for
|
||||
platform-specific configuration data.
|
||||
|
||||
During early boot, the architecture setup code calls of_scan_flat_dt()
|
||||
several times with different helper callbacks to parse device tree
|
||||
|
|
|
@ -3005,6 +3005,27 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
Force threading of all interrupt handlers except those
|
||||
marked explicitly IRQF_NO_THREAD.
|
||||
|
||||
tmem [KNL,XEN]
|
||||
Enable the Transcendent memory driver if built-in.
|
||||
|
||||
tmem.cleancache=0|1 [KNL, XEN]
|
||||
Default is on (1). Disable the usage of the cleancache
|
||||
API to send anonymous pages to the hypervisor.
|
||||
|
||||
tmem.frontswap=0|1 [KNL, XEN]
|
||||
Default is on (1). Disable the usage of the frontswap
|
||||
API to send swap pages to the hypervisor. If disabled
|
||||
the selfballooning and selfshrinking are force disabled.
|
||||
|
||||
tmem.selfballooning=0|1 [KNL, XEN]
|
||||
Default is on (1). Disable the driving of swap pages
|
||||
to the hypervisor.
|
||||
|
||||
tmem.selfshrinking=0|1 [KNL, XEN]
|
||||
Default is on (1). Partial swapoff that immediately
|
||||
transfers pages from Xen hypervisor back to the
|
||||
kernel based on different criteria.
|
||||
|
||||
topology= [S390]
|
||||
Format: {off | on}
|
||||
Specify if the kernel should make use of the cpu
|
||||
|
|
202
Documentation/kernel-per-CPU-kthreads.txt
Normal file
202
Documentation/kernel-per-CPU-kthreads.txt
Normal file
|
@ -0,0 +1,202 @@
|
|||
REDUCING OS JITTER DUE TO PER-CPU KTHREADS
|
||||
|
||||
This document lists per-CPU kthreads in the Linux kernel and presents
|
||||
options to control their OS jitter. Note that non-per-CPU kthreads are
|
||||
not listed here. To reduce OS jitter from non-per-CPU kthreads, bind
|
||||
them to a "housekeeping" CPU dedicated to such work.
|
||||
|
||||
|
||||
REFERENCES
|
||||
|
||||
o Documentation/IRQ-affinity.txt: Binding interrupts to sets of CPUs.
|
||||
|
||||
o Documentation/cgroups: Using cgroups to bind tasks to sets of CPUs.
|
||||
|
||||
o man taskset: Using the taskset command to bind tasks to sets
|
||||
of CPUs.
|
||||
|
||||
o man sched_setaffinity: Using the sched_setaffinity() system
|
||||
call to bind tasks to sets of CPUs.
|
||||
|
||||
o /sys/devices/system/cpu/cpuN/online: Control CPU N's hotplug state,
|
||||
writing "0" to offline and "1" to online.
|
||||
|
||||
o In order to locate kernel-generated OS jitter on CPU N:
|
||||
|
||||
cd /sys/kernel/debug/tracing
|
||||
echo 1 > max_graph_depth # Increase the "1" for more detail
|
||||
echo function_graph > current_tracer
|
||||
# run workload
|
||||
cat per_cpu/cpuN/trace
|
||||
|
||||
|
||||
KTHREADS
|
||||
|
||||
Name: ehca_comp/%u
|
||||
Purpose: Periodically process Infiniband-related work.
|
||||
To reduce its OS jitter, do any of the following:
|
||||
1. Don't use eHCA Infiniband hardware, instead choosing hardware
|
||||
that does not require per-CPU kthreads. This will prevent these
|
||||
kthreads from being created in the first place. (This will
|
||||
work for most people, as this hardware, though important, is
|
||||
relatively old and is produced in relatively low unit volumes.)
|
||||
2. Do all eHCA-Infiniband-related work on other CPUs, including
|
||||
interrupts.
|
||||
3. Rework the eHCA driver so that its per-CPU kthreads are
|
||||
provisioned only on selected CPUs.
|
||||
|
||||
|
||||
Name: irq/%d-%s
|
||||
Purpose: Handle threaded interrupts.
|
||||
To reduce its OS jitter, do the following:
|
||||
1. Use irq affinity to force the irq threads to execute on
|
||||
some other CPU.
|
||||
|
||||
Name: kcmtpd_ctr_%d
|
||||
Purpose: Handle Bluetooth work.
|
||||
To reduce its OS jitter, do one of the following:
|
||||
1. Don't use Bluetooth, in which case these kthreads won't be
|
||||
created in the first place.
|
||||
2. Use irq affinity to force Bluetooth-related interrupts to
|
||||
occur on some other CPU and furthermore initiate all
|
||||
Bluetooth activity on some other CPU.
|
||||
|
||||
Name: ksoftirqd/%u
|
||||
Purpose: Execute softirq handlers when threaded or when under heavy load.
|
||||
To reduce its OS jitter, each softirq vector must be handled
|
||||
separately as follows:
|
||||
TIMER_SOFTIRQ: Do all of the following:
|
||||
1. To the extent possible, keep the CPU out of the kernel when it
|
||||
is non-idle, for example, by avoiding system calls and by forcing
|
||||
both kernel threads and interrupts to execute elsewhere.
|
||||
2. Build with CONFIG_HOTPLUG_CPU=y. After boot completes, force
|
||||
the CPU offline, then bring it back online. This forces
|
||||
recurring timers to migrate elsewhere. If you are concerned
|
||||
with multiple CPUs, force them all offline before bringing the
|
||||
first one back online. Once you have onlined the CPUs in question,
|
||||
do not offline any other CPUs, because doing so could force the
|
||||
timer back onto one of the CPUs in question.
|
||||
NET_TX_SOFTIRQ and NET_RX_SOFTIRQ: Do all of the following:
|
||||
1. Force networking interrupts onto other CPUs.
|
||||
2. Initiate any network I/O on other CPUs.
|
||||
3. Once your application has started, prevent CPU-hotplug operations
|
||||
from being initiated from tasks that might run on the CPU to
|
||||
be de-jittered. (It is OK to force this CPU offline and then
|
||||
bring it back online before you start your application.)
|
||||
BLOCK_SOFTIRQ: Do all of the following:
|
||||
1. Force block-device interrupts onto some other CPU.
|
||||
2. Initiate any block I/O on other CPUs.
|
||||
3. Once your application has started, prevent CPU-hotplug operations
|
||||
from being initiated from tasks that might run on the CPU to
|
||||
be de-jittered. (It is OK to force this CPU offline and then
|
||||
bring it back online before you start your application.)
|
||||
BLOCK_IOPOLL_SOFTIRQ: Do all of the following:
|
||||
1. Force block-device interrupts onto some other CPU.
|
||||
2. Initiate any block I/O and block-I/O polling on other CPUs.
|
||||
3. Once your application has started, prevent CPU-hotplug operations
|
||||
from being initiated from tasks that might run on the CPU to
|
||||
be de-jittered. (It is OK to force this CPU offline and then
|
||||
bring it back online before you start your application.)
|
||||
TASKLET_SOFTIRQ: Do one or more of the following:
|
||||
1. Avoid use of drivers that use tasklets. (Such drivers will contain
|
||||
calls to things like tasklet_schedule().)
|
||||
2. Convert all drivers that you must use from tasklets to workqueues.
|
||||
3. Force interrupts for drivers using tasklets onto other CPUs,
|
||||
and also do I/O involving these drivers on other CPUs.
|
||||
SCHED_SOFTIRQ: Do all of the following:
|
||||
1. Avoid sending scheduler IPIs to the CPU to be de-jittered,
|
||||
for example, ensure that at most one runnable kthread is present
|
||||
on that CPU. If a thread that expects to run on the de-jittered
|
||||
CPU awakens, the scheduler will send an IPI that can result in
|
||||
a subsequent SCHED_SOFTIRQ.
|
||||
2. Build with CONFIG_RCU_NOCB_CPU=y, CONFIG_RCU_NOCB_CPU_ALL=y,
|
||||
CONFIG_NO_HZ_FULL=y, and, in addition, ensure that the CPU
|
||||
to be de-jittered is marked as an adaptive-ticks CPU using the
|
||||
"nohz_full=" boot parameter. This reduces the number of
|
||||
scheduler-clock interrupts that the de-jittered CPU receives,
|
||||
minimizing its chances of being selected to do the load balancing
|
||||
work that runs in SCHED_SOFTIRQ context.
|
||||
3. To the extent possible, keep the CPU out of the kernel when it
|
||||
is non-idle, for example, by avoiding system calls and by
|
||||
forcing both kernel threads and interrupts to execute elsewhere.
|
||||
This further reduces the number of scheduler-clock interrupts
|
||||
received by the de-jittered CPU.
|
||||
HRTIMER_SOFTIRQ: Do all of the following:
|
||||
1. To the extent possible, keep the CPU out of the kernel when it
|
||||
is non-idle. For example, avoid system calls and force both
|
||||
kernel threads and interrupts to execute elsewhere.
|
||||
2. Build with CONFIG_HOTPLUG_CPU=y. Once boot completes, force the
|
||||
CPU offline, then bring it back online. This forces recurring
|
||||
timers to migrate elsewhere. If you are concerned with multiple
|
||||
CPUs, force them all offline before bringing the first one
|
||||
back online. Once you have onlined the CPUs in question, do not
|
||||
offline any other CPUs, because doing so could force the timer
|
||||
back onto one of the CPUs in question.
|
||||
RCU_SOFTIRQ: Do at least one of the following:
|
||||
1. Offload callbacks and keep the CPU in either dyntick-idle or
|
||||
adaptive-ticks state by doing all of the following:
|
||||
a. Build with CONFIG_RCU_NOCB_CPU=y, CONFIG_RCU_NOCB_CPU_ALL=y,
|
||||
CONFIG_NO_HZ_FULL=y, and, in addition ensure that the CPU
|
||||
to be de-jittered is marked as an adaptive-ticks CPU using
|
||||
the "nohz_full=" boot parameter. Bind the rcuo kthreads
|
||||
to housekeeping CPUs, which can tolerate OS jitter.
|
||||
b. To the extent possible, keep the CPU out of the kernel
|
||||
when it is non-idle, for example, by avoiding system
|
||||
calls and by forcing both kernel threads and interrupts
|
||||
to execute elsewhere.
|
||||
2. Enable RCU to do its processing remotely via dyntick-idle by
|
||||
doing all of the following:
|
||||
a. Build with CONFIG_NO_HZ=y and CONFIG_RCU_FAST_NO_HZ=y.
|
||||
b. Ensure that the CPU goes idle frequently, allowing other
|
||||
CPUs to detect that it has passed through an RCU quiescent
|
||||
state. If the kernel is built with CONFIG_NO_HZ_FULL=y,
|
||||
userspace execution also allows other CPUs to detect that
|
||||
the CPU in question has passed through a quiescent state.
|
||||
c. To the extent possible, keep the CPU out of the kernel
|
||||
when it is non-idle, for example, by avoiding system
|
||||
calls and by forcing both kernel threads and interrupts
|
||||
to execute elsewhere.
|
||||
|
||||
Name: rcuc/%u
|
||||
Purpose: Execute RCU callbacks in CONFIG_RCU_BOOST=y kernels.
|
||||
To reduce its OS jitter, do at least one of the following:
|
||||
1. Build the kernel with CONFIG_PREEMPT=n. This prevents these
|
||||
kthreads from being created in the first place, and also obviates
|
||||
the need for RCU priority boosting. This approach is feasible
|
||||
for workloads that do not require high degrees of responsiveness.
|
||||
2. Build the kernel with CONFIG_RCU_BOOST=n. This prevents these
|
||||
kthreads from being created in the first place. This approach
|
||||
is feasible only if your workload never requires RCU priority
|
||||
boosting, for example, if you ensure frequent idle time on all
|
||||
CPUs that might execute within the kernel.
|
||||
3. Build with CONFIG_RCU_NOCB_CPU=y and CONFIG_RCU_NOCB_CPU_ALL=y,
|
||||
which offloads all RCU callbacks to kthreads that can be moved
|
||||
off of CPUs susceptible to OS jitter. This approach prevents the
|
||||
rcuc/%u kthreads from having any work to do, so that they are
|
||||
never awakened.
|
||||
4. Ensure that the CPU never enters the kernel, and, in particular,
|
||||
avoid initiating any CPU hotplug operations on this CPU. This is
|
||||
another way of preventing any callbacks from being queued on the
|
||||
CPU, again preventing the rcuc/%u kthreads from having any work
|
||||
to do.
|
||||
|
||||
Name: rcuob/%d, rcuop/%d, and rcuos/%d
|
||||
Purpose: Offload RCU callbacks from the corresponding CPU.
|
||||
To reduce its OS jitter, do at least one of the following:
|
||||
1. Use affinity, cgroups, or other mechanism to force these kthreads
|
||||
to execute on some other CPU.
|
||||
2. Build with CONFIG_RCU_NOCB_CPUS=n, which will prevent these
|
||||
kthreads from being created in the first place. However, please
|
||||
note that this will not eliminate OS jitter, but will instead
|
||||
shift it to RCU_SOFTIRQ.
|
||||
|
||||
Name: watchdog/%u
|
||||
Purpose: Detect software lockups on each CPU.
|
||||
To reduce its OS jitter, do at least one of the following:
|
||||
1. Build with CONFIG_LOCKUP_DETECTOR=n, which will prevent these
|
||||
kthreads from being created in the first place.
|
||||
2. Echo a zero to /proc/sys/kernel/watchdog to disable the
|
||||
watchdog timer.
|
||||
3. Echo a large number of /proc/sys/kernel/watchdog_thresh in
|
||||
order to reduce the frequency of OS jitter due to the watchdog
|
||||
timer down to a level that is acceptable for your workload.
|
|
@ -268,7 +268,7 @@ situations.
|
|||
System Power Management Phases
|
||||
------------------------------
|
||||
Suspending or resuming the system is done in several phases. Different phases
|
||||
are used for standby or memory sleep states ("suspend-to-RAM") and the
|
||||
are used for freeze, standby, and memory sleep states ("suspend-to-RAM") and the
|
||||
hibernation state ("suspend-to-disk"). Each phase involves executing callbacks
|
||||
for every device before the next phase begins. Not all busses or classes
|
||||
support all these callbacks and not all drivers use all the callbacks. The
|
||||
|
@ -309,7 +309,8 @@ execute the corresponding method from dev->driver->pm instead if there is one.
|
|||
|
||||
Entering System Suspend
|
||||
-----------------------
|
||||
When the system goes into the standby or memory sleep state, the phases are:
|
||||
When the system goes into the freeze, standby or memory sleep state,
|
||||
the phases are:
|
||||
|
||||
prepare, suspend, suspend_late, suspend_noirq.
|
||||
|
||||
|
@ -368,7 +369,7 @@ the devices that were suspended.
|
|||
|
||||
Leaving System Suspend
|
||||
----------------------
|
||||
When resuming from standby or memory sleep, the phases are:
|
||||
When resuming from freeze, standby or memory sleep, the phases are:
|
||||
|
||||
resume_noirq, resume_early, resume, complete.
|
||||
|
||||
|
@ -433,8 +434,8 @@ the system log.
|
|||
|
||||
Entering Hibernation
|
||||
--------------------
|
||||
Hibernating the system is more complicated than putting it into the standby or
|
||||
memory sleep state, because it involves creating and saving a system image.
|
||||
Hibernating the system is more complicated than putting it into the other
|
||||
sleep states, because it involves creating and saving a system image.
|
||||
Therefore there are more phases for hibernation, with a different set of
|
||||
callbacks. These phases always run after tasks have been frozen and memory has
|
||||
been freed.
|
||||
|
@ -485,8 +486,8 @@ image forms an atomic snapshot of the system state.
|
|||
|
||||
At this point the system image is saved, and the devices then need to be
|
||||
prepared for the upcoming system shutdown. This is much like suspending them
|
||||
before putting the system into the standby or memory sleep state, and the phases
|
||||
are similar.
|
||||
before putting the system into the freeze, standby or memory sleep state,
|
||||
and the phases are similar.
|
||||
|
||||
9. The prepare phase is discussed above.
|
||||
|
||||
|
|
|
@ -7,8 +7,8 @@ running. The interface exists in /sys/power/ directory (assuming sysfs
|
|||
is mounted at /sys).
|
||||
|
||||
/sys/power/state controls system power state. Reading from this file
|
||||
returns what states are supported, which is hard-coded to 'standby'
|
||||
(Power-On Suspend), 'mem' (Suspend-to-RAM), and 'disk'
|
||||
returns what states are supported, which is hard-coded to 'freeze',
|
||||
'standby' (Power-On Suspend), 'mem' (Suspend-to-RAM), and 'disk'
|
||||
(Suspend-to-Disk).
|
||||
|
||||
Writing to this file one of those strings causes the system to
|
||||
|
|
|
@ -15,8 +15,10 @@ A suspend/hibernation notifier may be used for this purpose.
|
|||
The subsystems or drivers having such needs can register suspend notifiers that
|
||||
will be called upon the following events by the PM core:
|
||||
|
||||
PM_HIBERNATION_PREPARE The system is going to hibernate or suspend, tasks will
|
||||
be frozen immediately.
|
||||
PM_HIBERNATION_PREPARE The system is going to hibernate, tasks will be frozen
|
||||
immediately. This is different from PM_SUSPEND_PREPARE
|
||||
below because here we do additional work between notifiers
|
||||
and drivers freezing.
|
||||
|
||||
PM_POST_HIBERNATION The system memory state has been restored from a
|
||||
hibernation image or an error occurred during
|
||||
|
|
|
@ -2,12 +2,26 @@
|
|||
System Power Management States
|
||||
|
||||
|
||||
The kernel supports three power management states generically, though
|
||||
each is dependent on platform support code to implement the low-level
|
||||
details for each state. This file describes each state, what they are
|
||||
The kernel supports four power management states generically, though
|
||||
one is generic and the other three are dependent on platform support
|
||||
code to implement the low-level details for each state.
|
||||
This file describes each state, what they are
|
||||
commonly called, what ACPI state they map to, and what string to write
|
||||
to /sys/power/state to enter that state
|
||||
|
||||
state: Freeze / Low-Power Idle
|
||||
ACPI state: S0
|
||||
String: "freeze"
|
||||
|
||||
This state is a generic, pure software, light-weight, low-power state.
|
||||
It allows more energy to be saved relative to idle by freezing user
|
||||
space and putting all I/O devices into low-power states (possibly
|
||||
lower-power than available at run time), such that the processors can
|
||||
spend more time in their idle states.
|
||||
This state can be used for platforms without Standby/Suspend-to-RAM
|
||||
support, or it can be used in addition to Suspend-to-RAM (memory sleep)
|
||||
to provide reduced resume latency.
|
||||
|
||||
|
||||
State: Standby / Power-On Suspend
|
||||
ACPI State: S1
|
||||
|
@ -22,9 +36,6 @@ We try to put devices in a low-power state equivalent to D1, which
|
|||
also offers low power savings, but low resume latency. Not all devices
|
||||
support D1, and those that don't are left on.
|
||||
|
||||
A transition from Standby to the On state should take about 1-2
|
||||
seconds.
|
||||
|
||||
|
||||
State: Suspend-to-RAM
|
||||
ACPI State: S3
|
||||
|
@ -42,9 +53,6 @@ transition back to the On state.
|
|||
For at least ACPI, STR requires some minimal boot-strapping code to
|
||||
resume the system from STR. This may be true on other platforms.
|
||||
|
||||
A transition from Suspend-to-RAM to the On state should take about
|
||||
3-5 seconds.
|
||||
|
||||
|
||||
State: Suspend-to-disk
|
||||
ACPI State: S4
|
||||
|
@ -74,7 +82,3 @@ low-power state (like ACPI S4), or it may simply power down. Powering
|
|||
down offers greater savings, and allows this mechanism to work on any
|
||||
system. However, entering a real low-power state allows the user to
|
||||
trigger wake up events (e.g. pressing a key or opening a laptop lid).
|
||||
|
||||
A transition from Suspend-to-Disk to the On state should take about 30
|
||||
seconds, though it's typically a bit more with the current
|
||||
implementation.
|
||||
|
|
|
@ -79,20 +79,63 @@ master port that is used to communicate with devices within the network.
|
|||
In order to initialize the RapidIO subsystem, a platform must initialize and
|
||||
register at least one master port within the RapidIO network. To register mport
|
||||
within the subsystem controller driver initialization code calls function
|
||||
rio_register_mport() for each available master port. After all active master
|
||||
ports are registered with a RapidIO subsystem, the rio_init_mports() routine
|
||||
is called to perform enumeration and discovery.
|
||||
rio_register_mport() for each available master port.
|
||||
|
||||
In the current PowerPC-based implementation a subsys_initcall() is specified to
|
||||
perform controller initialization and mport registration. At the end it directly
|
||||
calls rio_init_mports() to execute RapidIO enumeration and discovery.
|
||||
RapidIO subsystem uses subsys_initcall() or device_initcall() to perform
|
||||
controller initialization (depending on controller device type).
|
||||
|
||||
After all active master ports are registered with a RapidIO subsystem,
|
||||
an enumeration and/or discovery routine may be called automatically or
|
||||
by user-space command.
|
||||
|
||||
4. Enumeration and Discovery
|
||||
----------------------------
|
||||
|
||||
When rio_init_mports() is called it scans a list of registered master ports and
|
||||
calls an enumeration or discovery routine depending on the configured role of a
|
||||
master port: host or agent.
|
||||
4.1 Overview
|
||||
------------
|
||||
|
||||
RapidIO subsystem configuration options allow users to specify enumeration and
|
||||
discovery methods as statically linked components or loadable modules.
|
||||
An enumeration/discovery method implementation and available input parameters
|
||||
define how any given method can be attached to available RapidIO mports:
|
||||
simply to all available mports OR individually to the specified mport device.
|
||||
|
||||
Depending on selected enumeration/discovery build configuration, there are
|
||||
several methods to initiate an enumeration and/or discovery process:
|
||||
|
||||
(a) Statically linked enumeration and discovery process can be started
|
||||
automatically during kernel initialization time using corresponding module
|
||||
parameters. This was the original method used since introduction of RapidIO
|
||||
subsystem. Now this method relies on enumerator module parameter which is
|
||||
'rio-scan.scan' for existing basic enumeration/discovery method.
|
||||
When automatic start of enumeration/discovery is used a user has to ensure
|
||||
that all discovering endpoints are started before the enumerating endpoint
|
||||
and are waiting for enumeration to be completed.
|
||||
Configuration option CONFIG_RAPIDIO_DISC_TIMEOUT defines time that discovering
|
||||
endpoint waits for enumeration to be completed. If the specified timeout
|
||||
expires the discovery process is terminated without obtaining RapidIO network
|
||||
information. NOTE: a timed out discovery process may be restarted later using
|
||||
a user-space command as it is described later if the given endpoint was
|
||||
enumerated successfully.
|
||||
|
||||
(b) Statically linked enumeration and discovery process can be started by
|
||||
a command from user space. This initiation method provides more flexibility
|
||||
for a system startup compared to the option (a) above. After all participating
|
||||
endpoints have been successfully booted, an enumeration process shall be
|
||||
started first by issuing a user-space command, after an enumeration is
|
||||
completed a discovery process can be started on all remaining endpoints.
|
||||
|
||||
(c) Modular enumeration and discovery process can be started by a command from
|
||||
user space. After an enumeration/discovery module is loaded, a network scan
|
||||
process can be started by issuing a user-space command.
|
||||
Similar to the option (b) above, an enumerator has to be started first.
|
||||
|
||||
(d) Modular enumeration and discovery process can be started by a module
|
||||
initialization routine. In this case an enumerating module shall be loaded
|
||||
first.
|
||||
|
||||
When a network scan process is started it calls an enumeration or discovery
|
||||
routine depending on the configured role of a master port: host or agent.
|
||||
|
||||
Enumeration is performed by a master port if it is configured as a host port by
|
||||
assigning a host device ID greater than or equal to zero. A host device ID is
|
||||
|
@ -104,8 +147,58 @@ for it.
|
|||
The enumeration and discovery routines use RapidIO maintenance transactions
|
||||
to access the configuration space of devices.
|
||||
|
||||
The enumeration process is implemented according to the enumeration algorithm
|
||||
outlined in the RapidIO Interconnect Specification: Annex I [1].
|
||||
4.2 Automatic Start of Enumeration and Discovery
|
||||
------------------------------------------------
|
||||
|
||||
Automatic enumeration/discovery start method is applicable only to built-in
|
||||
enumeration/discovery RapidIO configuration selection. To enable automatic
|
||||
enumeration/discovery start by existing basic enumerator method set use boot
|
||||
command line parameter "rio-scan.scan=1".
|
||||
|
||||
This configuration requires synchronized start of all RapidIO endpoints that
|
||||
form a network which will be enumerated/discovered. Discovering endpoints have
|
||||
to be started before an enumeration starts to ensure that all RapidIO
|
||||
controllers have been initialized and are ready to be discovered. Configuration
|
||||
parameter CONFIG_RAPIDIO_DISC_TIMEOUT defines time (in seconds) which
|
||||
a discovering endpoint will wait for enumeration to be completed.
|
||||
|
||||
When automatic enumeration/discovery start is selected, basic method's
|
||||
initialization routine calls rio_init_mports() to perform enumeration or
|
||||
discovery for all known mport devices.
|
||||
|
||||
Depending on RapidIO network size and configuration this automatic
|
||||
enumeration/discovery start method may be difficult to use due to the
|
||||
requirement for synchronized start of all endpoints.
|
||||
|
||||
4.3 User-space Start of Enumeration and Discovery
|
||||
-------------------------------------------------
|
||||
|
||||
User-space start of enumeration and discovery can be used with built-in and
|
||||
modular build configurations. For user-space controlled start RapidIO subsystem
|
||||
creates the sysfs write-only attribute file '/sys/bus/rapidio/scan'. To initiate
|
||||
an enumeration or discovery process on specific mport device, a user needs to
|
||||
write mport_ID (not RapidIO destination ID) into that file. The mport_ID is a
|
||||
sequential number (0 ... RIO_MAX_MPORTS) assigned during mport device
|
||||
registration. For example for machine with single RapidIO controller, mport_ID
|
||||
for that controller always will be 0.
|
||||
|
||||
To initiate RapidIO enumeration/discovery on all available mports a user may
|
||||
write '-1' (or RIO_MPORT_ANY) into the scan attribute file.
|
||||
|
||||
4.4 Basic Enumeration Method
|
||||
----------------------------
|
||||
|
||||
This is an original enumeration/discovery method which is available since
|
||||
first release of RapidIO subsystem code. The enumeration process is
|
||||
implemented according to the enumeration algorithm outlined in the RapidIO
|
||||
Interconnect Specification: Annex I [1].
|
||||
|
||||
This method can be configured as statically linked or loadable module.
|
||||
The method's single parameter "scan" allows to trigger the enumeration/discovery
|
||||
process from module initialization routine.
|
||||
|
||||
This enumeration/discovery method can be started only once and does not support
|
||||
unloading if it is built as a module.
|
||||
|
||||
The enumeration process traverses the network using a recursive depth-first
|
||||
algorithm. When a new device is found, the enumerator takes ownership of that
|
||||
|
@ -160,6 +253,19 @@ time period. If this wait time period expires before enumeration is completed,
|
|||
an agent skips RapidIO discovery and continues with remaining kernel
|
||||
initialization.
|
||||
|
||||
4.5 Adding New Enumeration/Discovery Method
|
||||
-------------------------------------------
|
||||
|
||||
RapidIO subsystem code organization allows addition of new enumeration/discovery
|
||||
methods as new configuration options without significant impact to to the core
|
||||
RapidIO code.
|
||||
|
||||
A new enumeration/discovery method has to be attached to one or more mport
|
||||
devices before an enumeration/discovery process can be started. Normally,
|
||||
method's module initialization routine calls rio_register_scan() to attach
|
||||
an enumerator to a specified mport device (or devices). The basic enumerator
|
||||
implementation demonstrates this process.
|
||||
|
||||
5. References
|
||||
-------------
|
||||
|
||||
|
|
|
@ -88,3 +88,20 @@ that exports additional attributes.
|
|||
|
||||
IDT_GEN2:
|
||||
errlog - reads contents of device error log until it is empty.
|
||||
|
||||
|
||||
5. RapidIO Bus Attributes
|
||||
-------------------------
|
||||
|
||||
RapidIO bus subdirectory /sys/bus/rapidio implements the following bus-specific
|
||||
attribute:
|
||||
|
||||
scan - allows to trigger enumeration discovery process from user space. This
|
||||
is a write-only attribute. To initiate an enumeration or discovery
|
||||
process on specific mport device, a user needs to write mport_ID (not
|
||||
RapidIO destination ID) into this file. The mport_ID is a sequential
|
||||
number (0 ... RIO_MAX_MPORTS) assigned to the mport device.
|
||||
For example, for a machine with a single RapidIO controller, mport_ID
|
||||
for that controller always will be 0.
|
||||
To initiate RapidIO enumeration/discovery on all available mports
|
||||
a user must write '-1' (or RIO_MPORT_ANY) into this attribute file.
|
||||
|
|
43
MAINTAINERS
43
MAINTAINERS
|
@ -3865,9 +3865,16 @@ M: K. Y. Srinivasan <kys@microsoft.com>
|
|||
M: Haiyang Zhang <haiyangz@microsoft.com>
|
||||
L: devel@linuxdriverproject.org
|
||||
S: Maintained
|
||||
F: drivers/hv/
|
||||
F: arch/x86/include/asm/mshyperv.h
|
||||
F: arch/x86/include/uapi/asm/hyperv.h
|
||||
F: arch/x86/kernel/cpu/mshyperv.c
|
||||
F: drivers/hid/hid-hyperv.c
|
||||
F: drivers/hv/
|
||||
F: drivers/net/hyperv/
|
||||
F: drivers/scsi/storvsc_drv.c
|
||||
F: drivers/video/hyperv_fb.c
|
||||
F: include/linux/hyperv.h
|
||||
F: tools/hv/
|
||||
|
||||
I2C OVER PARALLEL PORT
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
|
@ -4641,12 +4648,13 @@ F: include/linux/sunrpc/
|
|||
F: include/uapi/linux/sunrpc/
|
||||
|
||||
KERNEL VIRTUAL MACHINE (KVM)
|
||||
M: Marcelo Tosatti <mtosatti@redhat.com>
|
||||
M: Gleb Natapov <gleb@redhat.com>
|
||||
M: Paolo Bonzini <pbonzini@redhat.com>
|
||||
L: kvm@vger.kernel.org
|
||||
W: http://kvm.qumranet.com
|
||||
W: http://linux-kvm.org
|
||||
S: Supported
|
||||
F: Documentation/*/kvm.txt
|
||||
F: Documentation/*/kvm*.txt
|
||||
F: Documentation/virtual/kvm/
|
||||
F: arch/*/kvm/
|
||||
F: arch/*/include/asm/kvm*
|
||||
F: include/linux/kvm*
|
||||
|
@ -4976,6 +4984,13 @@ S: Maintained
|
|||
F: Documentation/hwmon/lm90
|
||||
F: drivers/hwmon/lm90.c
|
||||
|
||||
LM95234 HARDWARE MONITOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/lm95234
|
||||
F: drivers/hwmon/lm95234.c
|
||||
|
||||
LME2510 MEDIA DRIVER
|
||||
M: Malcolm Priestley <tvboxspy@gmail.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
@ -5509,18 +5524,18 @@ F: Documentation/networking/s2io.txt
|
|||
F: Documentation/networking/vxge.txt
|
||||
F: drivers/net/ethernet/neterion/
|
||||
|
||||
NETFILTER/IPTABLES/IPCHAINS
|
||||
P: Harald Welte
|
||||
P: Jozsef Kadlecsik
|
||||
NETFILTER/IPTABLES
|
||||
M: Pablo Neira Ayuso <pablo@netfilter.org>
|
||||
M: Patrick McHardy <kaber@trash.net>
|
||||
M: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
|
||||
L: netfilter-devel@vger.kernel.org
|
||||
L: netfilter@vger.kernel.org
|
||||
L: coreteam@netfilter.org
|
||||
W: http://www.netfilter.org/
|
||||
W: http://www.iptables.org/
|
||||
T: git git://1984.lsi.us.es/nf
|
||||
T: git git://1984.lsi.us.es/nf-next
|
||||
Q: http://patchwork.ozlabs.org/project/netfilter-devel/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf-next.git
|
||||
S: Supported
|
||||
F: include/linux/netfilter*
|
||||
F: include/linux/netfilter/
|
||||
|
@ -6069,6 +6084,7 @@ L: linux-parisc@vger.kernel.org
|
|||
W: http://www.parisc-linux.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-parisc/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
|
||||
S: Maintained
|
||||
F: arch/parisc/
|
||||
F: drivers/parisc/
|
||||
|
@ -7854,7 +7870,7 @@ L: linux-scsi@vger.kernel.org
|
|||
L: target-devel@vger.kernel.org
|
||||
L: http://groups.google.com/group/linux-iscsi-target-dev
|
||||
W: http://www.linux-iscsi.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/lio-core.git master
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
|
||||
S: Supported
|
||||
F: drivers/target/
|
||||
F: include/target/
|
||||
|
@ -8182,6 +8198,13 @@ F: drivers/mmc/host/sh_mobile_sdhi.c
|
|||
F: include/linux/mmc/tmio.h
|
||||
F: include/linux/mmc/sh_mobile_sdhi.h
|
||||
|
||||
TMP401 HARDWARE MONITOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/tmp401
|
||||
F: drivers/hwmon/tmp401.c
|
||||
|
||||
TMPFS (SHMEM FILESYSTEM)
|
||||
M: Hugh Dickins <hughd@google.com>
|
||||
L: linux-mm@kvack.org
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 10
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Unicycling Gorilla
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -213,6 +213,9 @@ config USE_GENERIC_SMP_HELPERS
|
|||
config GENERIC_SMP_IDLE_THREAD
|
||||
bool
|
||||
|
||||
config GENERIC_IDLE_POLL_SETUP
|
||||
bool
|
||||
|
||||
# Select if arch init_task initializer is different to init/init_task.c
|
||||
config ARCH_INIT_TASK
|
||||
bool
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
pinctrl-names = "abilis,simple-default";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
pinctrl-names = "abilis,simple-default";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
|
|
|
@ -88,8 +88,7 @@
|
|||
};
|
||||
|
||||
uart@FF100000 {
|
||||
compatible = "snps,dw-apb-uart",
|
||||
"abilis,simple-pinctrl";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xFF100000 0x100>;
|
||||
clock-frequency = <166666666>;
|
||||
interrupts = <25 1>;
|
||||
|
@ -184,8 +183,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "abilis,tb100-spi",
|
||||
"abilis,simple-pinctrl";
|
||||
compatible = "abilis,tb100-spi";
|
||||
num-cs = <2>;
|
||||
reg = <0xFE011000 0x20>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
|
|
|
@ -93,14 +93,16 @@ static inline int cache_is_vipt_aliasing(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3)
|
||||
#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1)
|
||||
|
||||
/*
|
||||
* checks if two addresses (after page aligning) index into same cache set
|
||||
*/
|
||||
#define addr_not_cache_congruent(addr1, addr2) \
|
||||
({ \
|
||||
cache_is_vipt_aliasing() ? \
|
||||
(CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0 \
|
||||
(CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \
|
||||
})
|
||||
|
||||
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
|
||||
do { \
|
||||
|
|
|
@ -19,13 +19,6 @@
|
|||
#define clear_page(paddr) memset((paddr), 0, PAGE_SIZE)
|
||||
#define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
|
||||
|
||||
#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
|
||||
|
||||
#define clear_user_page(addr, vaddr, pg) clear_page(addr)
|
||||
#define copy_user_page(vto, vfrom, vaddr, pg) copy_page(vto, vfrom)
|
||||
|
||||
#else /* VIPT aliasing dcache */
|
||||
|
||||
struct vm_area_struct;
|
||||
struct page;
|
||||
|
||||
|
@ -35,8 +28,6 @@ void copy_user_highpage(struct page *to, struct page *from,
|
|||
unsigned long u_vaddr, struct vm_area_struct *vma);
|
||||
void clear_user_page(void *to, unsigned long u_vaddr, struct page *page);
|
||||
|
||||
#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
|
||||
|
||||
#undef STRICT_MM_TYPECHECKS
|
||||
|
||||
#ifdef STRICT_MM_TYPECHECKS
|
||||
|
|
|
@ -57,9 +57,9 @@
|
|||
|
||||
#define _PAGE_ACCESSED (1<<1) /* Page is accessed (S) */
|
||||
#define _PAGE_CACHEABLE (1<<2) /* Page is cached (H) */
|
||||
#define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */
|
||||
#define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */
|
||||
#define _PAGE_READ (1<<5) /* Page has user read perm (H) */
|
||||
#define _PAGE_U_EXECUTE (1<<3) /* Page has user execute perm (H) */
|
||||
#define _PAGE_U_WRITE (1<<4) /* Page has user write perm (H) */
|
||||
#define _PAGE_U_READ (1<<5) /* Page has user read perm (H) */
|
||||
#define _PAGE_K_EXECUTE (1<<6) /* Page has kernel execute perm (H) */
|
||||
#define _PAGE_K_WRITE (1<<7) /* Page has kernel write perm (H) */
|
||||
#define _PAGE_K_READ (1<<8) /* Page has kernel perm (H) */
|
||||
|
@ -72,9 +72,9 @@
|
|||
|
||||
/* PD1 */
|
||||
#define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */
|
||||
#define _PAGE_EXECUTE (1<<1) /* Page has user execute perm (H) */
|
||||
#define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */
|
||||
#define _PAGE_READ (1<<3) /* Page has user read perm (H) */
|
||||
#define _PAGE_U_EXECUTE (1<<1) /* Page has user execute perm (H) */
|
||||
#define _PAGE_U_WRITE (1<<2) /* Page has user write perm (H) */
|
||||
#define _PAGE_U_READ (1<<3) /* Page has user read perm (H) */
|
||||
#define _PAGE_K_EXECUTE (1<<4) /* Page has kernel execute perm (H) */
|
||||
#define _PAGE_K_WRITE (1<<5) /* Page has kernel write perm (H) */
|
||||
#define _PAGE_K_READ (1<<6) /* Page has kernel perm (H) */
|
||||
|
@ -93,7 +93,8 @@
|
|||
#endif
|
||||
|
||||
/* Kernel allowed all permissions for all pages */
|
||||
#define _K_PAGE_PERMS (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
|
||||
#define _K_PAGE_PERMS (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ | \
|
||||
_PAGE_GLOBAL | _PAGE_PRESENT)
|
||||
|
||||
#ifdef CONFIG_ARC_CACHE_PAGES
|
||||
#define _PAGE_DEF_CACHEABLE _PAGE_CACHEABLE
|
||||
|
@ -106,7 +107,11 @@
|
|||
* -by default cached, unless config otherwise
|
||||
* -present in memory
|
||||
*/
|
||||
#define ___DEF (_PAGE_PRESENT | _K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
|
||||
#define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE)
|
||||
|
||||
#define _PAGE_READ (_PAGE_U_READ | _PAGE_K_READ)
|
||||
#define _PAGE_WRITE (_PAGE_U_WRITE | _PAGE_K_WRITE)
|
||||
#define _PAGE_EXECUTE (_PAGE_U_EXECUTE | _PAGE_K_EXECUTE)
|
||||
|
||||
/* Set of bits not changed in pte_modify */
|
||||
#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
|
||||
|
@ -125,11 +130,10 @@
|
|||
* kernel vaddr space - visible in all addr spaces, but kernel mode only
|
||||
* Thus Global, all-kernel-access, no-user-access, cached
|
||||
*/
|
||||
#define PAGE_KERNEL __pgprot(___DEF | _PAGE_GLOBAL)
|
||||
#define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
|
||||
|
||||
/* ioremap */
|
||||
#define PAGE_KERNEL_NO_CACHE __pgprot(_PAGE_PRESENT | _K_PAGE_PERMS | \
|
||||
_PAGE_GLOBAL)
|
||||
#define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS)
|
||||
|
||||
/**************************************************************************
|
||||
* Mapping of vm_flags (Generic VM) to PTE flags (arch specific)
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
/* Masks for actual TLB "PD"s */
|
||||
#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT)
|
||||
#define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \
|
||||
_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ | \
|
||||
_PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \
|
||||
_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -610,7 +610,7 @@ void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
|
|||
|
||||
local_irq_save(flags);
|
||||
__ic_line_inv_vaddr(paddr, vaddr, len);
|
||||
__dc_line_op(paddr, vaddr, len, OP_FLUSH);
|
||||
__dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
@ -676,6 +676,17 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
|
|||
flush_cache_all();
|
||||
}
|
||||
|
||||
void flush_anon_page(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long u_vaddr)
|
||||
{
|
||||
/* TBD: do we really need to clear the kernel mapping */
|
||||
__flush_dcache_page(page_address(page), u_vaddr);
|
||||
__flush_dcache_page(page_address(page), page_address(page));
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void copy_user_highpage(struct page *to, struct page *from,
|
||||
unsigned long u_vaddr, struct vm_area_struct *vma)
|
||||
{
|
||||
|
@ -725,16 +736,6 @@ void clear_user_page(void *to, unsigned long u_vaddr, struct page *page)
|
|||
set_bit(PG_arch_1, &page->flags);
|
||||
}
|
||||
|
||||
void flush_anon_page(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long u_vaddr)
|
||||
{
|
||||
/* TBD: do we really need to clear the kernel mapping */
|
||||
__flush_dcache_page(page_address(page), u_vaddr);
|
||||
__flush_dcache_page(page_address(page), page_address(page));
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/**********************************************************************
|
||||
* Explicit Cache flush request from user space via syscall
|
||||
|
|
|
@ -444,7 +444,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
|
|||
* so userspace sees the right data.
|
||||
* (Avoids the flush for Non-exec + congruent mapping case)
|
||||
*/
|
||||
if (vma->vm_flags & VM_EXEC || addr_not_cache_congruent(paddr, vaddr)) {
|
||||
if ((vma->vm_flags & VM_EXEC) ||
|
||||
addr_not_cache_congruent(paddr, vaddr)) {
|
||||
struct page *page = pfn_to_page(pte_pfn(*ptep));
|
||||
|
||||
int dirty = test_and_clear_bit(PG_arch_1, &page->flags);
|
||||
|
|
|
@ -277,7 +277,7 @@ ARC_ENTRY EV_TLBMissI
|
|||
;----------------------------------------------------------------
|
||||
; VERIFY_PTE: Check if PTE permissions approp for executing code
|
||||
cmp_s r2, VMALLOC_START
|
||||
mov.lo r2, (_PAGE_PRESENT | _PAGE_READ | _PAGE_EXECUTE)
|
||||
mov.lo r2, (_PAGE_PRESENT | _PAGE_U_READ | _PAGE_U_EXECUTE)
|
||||
mov.hs r2, (_PAGE_PRESENT | _PAGE_K_READ | _PAGE_K_EXECUTE)
|
||||
|
||||
and r3, r0, r2 ; Mask out NON Flag bits from PTE
|
||||
|
@ -320,9 +320,9 @@ ARC_ENTRY EV_TLBMissD
|
|||
mov_s r2, 0
|
||||
lr r3, [ecr]
|
||||
btst_s r3, ECR_C_BIT_DTLB_LD_MISS ; Read Access
|
||||
or.nz r2, r2, _PAGE_READ ; chk for Read flag in PTE
|
||||
or.nz r2, r2, _PAGE_U_READ ; chk for Read flag in PTE
|
||||
btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; Write Access
|
||||
or.nz r2, r2, _PAGE_WRITE ; chk for Write flag in PTE
|
||||
or.nz r2, r2, _PAGE_U_WRITE ; chk for Write flag in PTE
|
||||
; Above laddering takes care of XCHG access
|
||||
; which is both Read and Write
|
||||
|
||||
|
|
|
@ -34,31 +34,6 @@ static void __init tb10x_platform_init(void)
|
|||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
static void __init tb10x_platform_late_init(void)
|
||||
{
|
||||
struct device_node *dn;
|
||||
|
||||
/*
|
||||
* Pinctrl documentation recommends setting up the iomux here for
|
||||
* all modules which don't require control over the pins themselves.
|
||||
* Modules which need this kind of assistance are compatible with
|
||||
* "abilis,simple-pinctrl", i.e. we can easily iterate over them.
|
||||
* TODO: Does this recommended method work cleanly with pins required
|
||||
* by modules?
|
||||
*/
|
||||
for_each_compatible_node(dn, NULL, "abilis,simple-pinctrl") {
|
||||
struct platform_device *pd = of_find_device_by_node(dn);
|
||||
struct pinctrl *pctl;
|
||||
|
||||
pctl = pinctrl_get_select(&pd->dev, "abilis,simple-default");
|
||||
if (IS_ERR(pctl)) {
|
||||
int ret = PTR_ERR(pctl);
|
||||
dev_err(&pd->dev, "Could not set up pinctrl: %d\n",
|
||||
ret);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static const char *tb10x_compat[] __initdata = {
|
||||
"abilis,arc-tb10x",
|
||||
NULL,
|
||||
|
@ -67,5 +42,4 @@ static const char *tb10x_compat[] __initdata = {
|
|||
MACHINE_START(TB10x, "tb10x")
|
||||
.dt_compat = tb10x_compat,
|
||||
.init_machine = tb10x_platform_init,
|
||||
.init_late = tb10x_platform_late_init,
|
||||
MACHINE_END
|
||||
|
|
|
@ -38,6 +38,7 @@ config ARM
|
|||
select HAVE_GENERIC_HARDIRQS
|
||||
select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
|
||||
select HAVE_IDE if PCI || ISA || PCMCIA
|
||||
select HAVE_IRQ_TIME_ACCOUNTING
|
||||
select HAVE_KERNEL_GZIP
|
||||
select HAVE_KERNEL_LZMA
|
||||
select HAVE_KERNEL_LZO
|
||||
|
@ -488,7 +489,7 @@ config ARCH_IXP4XX
|
|||
config ARCH_DOVE
|
||||
bool "Marvell Dove"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select CPU_V7
|
||||
select CPU_PJ4
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select MIGHT_HAVE_PCI
|
||||
select PINCTRL
|
||||
|
|
|
@ -309,7 +309,7 @@ define archhelp
|
|||
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
|
||||
echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)'
|
||||
echo ' uImage - U-Boot wrapped zImage'
|
||||
echo ' bootpImage - Combined zImage and initial RAM disk'
|
||||
echo ' bootpImage - Combined zImage and initial RAM disk'
|
||||
echo ' (supply initrd image via make variable INITRD=<path>)'
|
||||
echo '* dtbs - Build device tree blobs for enabled boards'
|
||||
echo ' install - Install uncompressed kernel'
|
||||
|
|
|
@ -177,7 +177,9 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
|
|||
spear320-evb.dtb \
|
||||
spear320-hmi.dtb
|
||||
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += \
|
||||
sun4i-a10-cubieboard.dtb \
|
||||
sun4i-a10-mini-xplus.dtb \
|
||||
sun4i-a10-hackberry.dtb \
|
||||
sun5i-a13-olinuxino.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
|
||||
|
|
|
@ -33,7 +33,8 @@
|
|||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&mpic>;
|
||||
ranges = <0 0 0xd0000000 0x100000>;
|
||||
ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
|
||||
0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
|
||||
|
||||
internal-regs {
|
||||
compatible = "simple-bus";
|
||||
|
|
|
@ -29,7 +29,8 @@
|
|||
};
|
||||
|
||||
soc {
|
||||
ranges = <0 0xd0000000 0x100000>;
|
||||
ranges = <0 0xd0000000 0x0100000 /* internal registers */
|
||||
0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
|
||||
internal-regs {
|
||||
system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
|
@ -38,12 +39,12 @@
|
|||
|
||||
L2: l2-cache {
|
||||
compatible = "marvell,aurora-outer-cache";
|
||||
reg = <0xd0008000 0x1000>;
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
wt-override;
|
||||
};
|
||||
|
||||
mpic: interrupt-controller@20000 {
|
||||
interrupt-controller@20000 {
|
||||
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
|
||||
};
|
||||
|
||||
|
|
|
@ -39,6 +39,9 @@
|
|||
};
|
||||
|
||||
soc {
|
||||
ranges = <0 0 0xd0000000 0x100000
|
||||
0xf0000000 0 0xf0000000 0x1000000>;
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
clock-frequency = <250000000>;
|
||||
|
|
|
@ -27,6 +27,9 @@
|
|||
};
|
||||
|
||||
soc {
|
||||
ranges = <0 0 0xd0000000 0x100000
|
||||
0xf0000000 0 0xf0000000 0x8000000>;
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
clock-frequency = <250000000>;
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
wt-override;
|
||||
};
|
||||
|
||||
mpic: interrupt-controller@20000 {
|
||||
interrupt-controller@20000 {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
|
|
|
@ -264,7 +264,7 @@
|
|||
atmel,pins =
|
||||
<0 10 0x2 0x0 /* PA10 periph B */
|
||||
0 11 0x2 0x0 /* PA11 periph B */
|
||||
0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 22 0x2 0x0 /* PA22 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0 /* PA26 periph B */
|
||||
0 27 0x2 0x0 /* PA27 periph B */
|
||||
|
|
|
@ -57,6 +57,7 @@
|
|||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe800 {
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
model = "Atmel AT91SAM9X25-EK";
|
||||
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
|
|
|
@ -516,7 +516,7 @@
|
|||
usb_otg_hs: usb_otg_hs@480ab000 {
|
||||
compatible = "ti,omap3-musb";
|
||||
reg = <0x480ab000 0x1000>;
|
||||
interrupts = <0 92 0x4>, <0 93 0x4>;
|
||||
interrupts = <92>, <93>;
|
||||
interrupt-names = "mc", "dma";
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
multipoint = <1>;
|
||||
|
|
|
@ -75,11 +75,6 @@
|
|||
compatible = "atmel,at91sam9x5-spi";
|
||||
reg = <0xf0004000 0x100>;
|
||||
interrupts = <24 4 3>;
|
||||
cs-gpios = <&pioD 13 0
|
||||
&pioD 14 0 /* conflicts with SCK0 and CANRX0 */
|
||||
&pioD 15 0 /* conflicts with CTS0 and CANTX0 */
|
||||
&pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
|
||||
>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
|
@ -156,7 +151,7 @@
|
|||
};
|
||||
|
||||
macb0: ethernet@f0028000 {
|
||||
compatible = "cnds,pc302-gem", "cdns,gem";
|
||||
compatible = "cdns,pc302-gem", "cdns,gem";
|
||||
reg = <0xf0028000 0x100>;
|
||||
interrupts = <34 4 3>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -203,11 +198,6 @@
|
|||
compatible = "atmel,at91sam9x5-spi";
|
||||
reg = <0xf8008000 0x100>;
|
||||
interrupts = <25 4 3>;
|
||||
cs-gpios = <&pioC 25 0
|
||||
&pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
|
||||
&pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
|
||||
&pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
|
||||
>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
|
|
|
@ -32,6 +32,10 @@
|
|||
|
||||
ahb {
|
||||
apb {
|
||||
spi0: spi@f0004000 {
|
||||
cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
|
||||
};
|
||||
|
||||
macb0: ethernet@f0028000 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
|
|
@ -14,13 +14,19 @@
|
|||
bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
|
||||
};
|
||||
|
||||
/* This is where the interrupt is routed on the S8815 board */
|
||||
external-bus@34000000 {
|
||||
ethernet@300 {
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <8 0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Custom board node with GPIO pins to active etc */
|
||||
usb-s8815 {
|
||||
/* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
|
||||
ethernet-gpio {
|
||||
gpios = <&gpio3 19 0x1>;
|
||||
interrupts = <19 0x1>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
gpios = <&gpio3 8 0x1>;
|
||||
};
|
||||
/* This will bias the MMC/SD card detect line */
|
||||
mmcsd-gpio {
|
||||
|
|
|
@ -22,8 +22,8 @@
|
|||
bootargs = "earlyprintk console=ttyS0,115200";
|
||||
};
|
||||
|
||||
soc {
|
||||
uart0: uart@01c28000 {
|
||||
soc@01c20000 {
|
||||
uart0: serial@01c28000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins_a>;
|
||||
status = "okay";
|
||||
|
|
|
@ -15,8 +15,6 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
|
||||
#include <asm/mcpm.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
@ -49,7 +47,6 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
|
|||
static void __cpuinit mcpm_secondary_init(unsigned int cpu)
|
||||
{
|
||||
mcpm_cpu_powered_up();
|
||||
gic_secondary_init(0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
|
|
|
@ -199,7 +199,6 @@ CONFIG_USB_PHY=y
|
|||
CONFIG_USB_DEBUG=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
CONFIG_USB_SUSPEND=y
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
|
|
@ -20,6 +20,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
|||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_MULTI_V6=y
|
||||
CONFIG_ARCH_OMAP2PLUS=y
|
||||
CONFIG_OMAP_RESET_CLOCKS=y
|
||||
CONFIG_OMAP_MUX_DEBUG=y
|
||||
|
@ -204,7 +205,6 @@ CONFIG_USB=y
|
|||
CONFIG_USB_DEBUG=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
CONFIG_USB_SUSPEND=y
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_WDM=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
|
|
@ -153,6 +153,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
|
|||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_TEGRA_HOST1X=y
|
||||
CONFIG_DRM_TEGRA=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
|
@ -202,7 +203,7 @@ CONFIG_TEGRA20_APB_DMA=y
|
|||
CONFIG_STAGING=y
|
||||
CONFIG_SENSORS_ISL29018=y
|
||||
CONFIG_SENSORS_ISL29028=y
|
||||
CONFIG_SENSORS_AK8975=y
|
||||
CONFIG_AK8975=y
|
||||
CONFIG_MFD_NVEC=y
|
||||
CONFIG_KEYBOARD_NVEC=y
|
||||
CONFIG_SERIO_NVEC_PS2=y
|
||||
|
|
|
@ -195,6 +195,7 @@ ENTRY(sha1_block_data_order)
|
|||
add r3,r3,r10 @ E+=F_00_19(B,C,D)
|
||||
cmp r14,sp
|
||||
bne .L_00_15 @ [((11+4)*5+2)*3]
|
||||
sub sp,sp,#25*4
|
||||
#if __ARM_ARCH__<7
|
||||
ldrb r10,[r1,#2]
|
||||
ldrb r9,[r1,#3]
|
||||
|
@ -290,7 +291,6 @@ ENTRY(sha1_block_data_order)
|
|||
add r3,r3,r10 @ E+=F_00_19(B,C,D)
|
||||
|
||||
ldr r8,.LK_20_39 @ [+15+16*4]
|
||||
sub sp,sp,#25*4
|
||||
cmn sp,#0 @ [+3], clear carry to denote 20_39
|
||||
.L_20_39_or_60_79:
|
||||
ldr r9,[r14,#15*4]
|
||||
|
|
|
@ -233,15 +233,15 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
|
|||
((__typeof__(*(ptr)))atomic64_cmpxchg(container_of((ptr), \
|
||||
atomic64_t, \
|
||||
counter), \
|
||||
(unsigned long)(o), \
|
||||
(unsigned long)(n)))
|
||||
(unsigned long long)(o), \
|
||||
(unsigned long long)(n)))
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))local64_cmpxchg(container_of((ptr), \
|
||||
local64_t, \
|
||||
a), \
|
||||
(unsigned long)(o), \
|
||||
(unsigned long)(n)))
|
||||
(unsigned long long)(o), \
|
||||
(unsigned long long)(n)))
|
||||
|
||||
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||
|
||||
|
|
|
@ -24,9 +24,9 @@
|
|||
#define U8500_UART0_PHYS_BASE (0x80120000)
|
||||
#define U8500_UART1_PHYS_BASE (0x80121000)
|
||||
#define U8500_UART2_PHYS_BASE (0x80007000)
|
||||
#define U8500_UART0_VIRT_BASE (0xa8120000)
|
||||
#define U8500_UART1_VIRT_BASE (0xa8121000)
|
||||
#define U8500_UART2_VIRT_BASE (0xa8007000)
|
||||
#define U8500_UART0_VIRT_BASE (0xf8120000)
|
||||
#define U8500_UART1_VIRT_BASE (0xf8121000)
|
||||
#define U8500_UART2_VIRT_BASE (0xf8007000)
|
||||
#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE
|
||||
#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE
|
||||
#endif
|
||||
|
|
|
@ -411,7 +411,6 @@ static struct vm_area_struct gate_vma = {
|
|||
.vm_start = 0xffff0000,
|
||||
.vm_end = 0xffff0000 + PAGE_SIZE,
|
||||
.vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC,
|
||||
.vm_mm = &init_mm,
|
||||
};
|
||||
|
||||
static int __init gate_vma_init(void)
|
||||
|
|
|
@ -251,7 +251,7 @@ void __ref cpu_die(void)
|
|||
* this returns, power and/or clocks can be removed at any point
|
||||
* from this CPU and its cache by platform_cpu_kill().
|
||||
*/
|
||||
RCU_NONIDLE(complete(&cpu_died));
|
||||
complete(&cpu_died);
|
||||
|
||||
/*
|
||||
* Ensure that the cache lines associated with that completion are
|
||||
|
|
|
@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
|
|||
static struct clock_event_device clkevt = {
|
||||
.name = "at91_tick",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.shift = 32,
|
||||
.rating = 150,
|
||||
.set_next_event = clkevt32k_next_event,
|
||||
.set_mode = clkevt32k_mode,
|
||||
|
@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
|
|||
at91_st_write(AT91_ST_RTMR, 1);
|
||||
|
||||
/* Setup timer clockevent, with minimum of two ticks (important!!) */
|
||||
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
|
||||
clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
|
||||
clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
|
||||
clkevt.cpumask = cpumask_of(0);
|
||||
clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
|
||||
2, AT91_ST_ALMV);
|
||||
clockevents_register_device(&clkevt);
|
||||
|
||||
/* register clocksource */
|
||||
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
|
||||
|
|
|
@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void)
|
|||
at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
|
||||
}
|
||||
|
||||
void __init at91sam9n12_initialize(void)
|
||||
{
|
||||
at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9n12)
|
||||
.map_io = at91sam9n12_map_io,
|
||||
.register_clocks = at91sam9n12_register_clocks,
|
||||
.init = at91sam9n12_initialize,
|
||||
AT91_SOC_END
|
||||
|
|
|
@ -179,9 +179,9 @@ extern void __iomem *at91_pmc_base;
|
|||
#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
|
||||
#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
|
||||
#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
|
||||
#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */
|
||||
#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */
|
||||
#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */
|
||||
#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
|
||||
#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
|
||||
#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
|
||||
#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
|
||||
|
||||
#endif
|
||||
|
|
|
@ -177,7 +177,8 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
|
|||
static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
|
||||
static const char *pll1_sw_sels[] = { "pll1_sys", "step", };
|
||||
static const char *periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };
|
||||
static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", };
|
||||
static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
|
||||
static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
|
||||
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
|
||||
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
|
||||
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", };
|
||||
|
@ -185,7 +186,7 @@ static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd
|
|||
static const char *gpu_axi_sels[] = { "axi", "ahb", };
|
||||
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
|
||||
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
|
||||
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
|
||||
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
|
||||
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
|
||||
static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
|
||||
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
|
||||
|
@ -369,8 +370,8 @@ int __init mx6q_clocks_init(void)
|
|||
clk[pll1_sw] = imx_clk_mux("pll1_sw", base + 0xc, 2, 1, pll1_sw_sels, ARRAY_SIZE(pll1_sw_sels));
|
||||
clk[periph_pre] = imx_clk_mux("periph_pre", base + 0x18, 18, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels));
|
||||
clk[periph2_pre] = imx_clk_mux("periph2_pre", base + 0x18, 21, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels));
|
||||
clk[periph_clk2_sel] = imx_clk_mux("periph_clk2_sel", base + 0x18, 12, 1, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels));
|
||||
clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels));
|
||||
clk[periph_clk2_sel] = imx_clk_mux("periph_clk2_sel", base + 0x18, 12, 2, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels));
|
||||
clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2_clk2_sels, ARRAY_SIZE(periph2_clk2_sels));
|
||||
clk[axi_sel] = imx_clk_mux("axi_sel", base + 0x14, 6, 2, axi_sels, ARRAY_SIZE(axi_sels));
|
||||
clk[esai_sel] = imx_clk_mux("esai_sel", base + 0x20, 19, 2, audio_sels, ARRAY_SIZE(audio_sels));
|
||||
clk[asrc_sel] = imx_clk_mux("asrc_sel", base + 0x30, 7, 2, audio_sels, ARRAY_SIZE(audio_sels));
|
||||
|
@ -498,7 +499,7 @@ int __init mx6q_clocks_init(void)
|
|||
clk[ldb_di1] = imx_clk_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14);
|
||||
clk[ipu2_di1] = imx_clk_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 10);
|
||||
clk[hsi_tx] = imx_clk_gate2("hsi_tx", "hsi_tx_podf", base + 0x74, 16);
|
||||
clk[mlb] = imx_clk_gate2("mlb", "pll8_mlb", base + 0x74, 18);
|
||||
clk[mlb] = imx_clk_gate2("mlb", "axi", base + 0x74, 18);
|
||||
clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi", "mmdc_ch0_axi_podf", base + 0x74, 20);
|
||||
clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi", "mmdc_ch1_axi_podf", base + 0x74, 22);
|
||||
clk[ocram] = imx_clk_gate2("ocram", "ahb", base + 0x74, 28);
|
||||
|
|
|
@ -18,8 +18,20 @@
|
|||
.section ".text.head", "ax"
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
diag_reg_offset:
|
||||
.word g_diag_reg - .
|
||||
|
||||
.macro set_diag_reg
|
||||
adr r0, diag_reg_offset
|
||||
ldr r1, [r0]
|
||||
add r1, r1, r0 @ r1 = physical &g_diag_reg
|
||||
ldr r0, [r1]
|
||||
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
|
||||
.endm
|
||||
|
||||
ENTRY(v7_secondary_startup)
|
||||
bl v7_invalidate_l1
|
||||
set_diag_reg
|
||||
b secondary_startup
|
||||
ENDPROC(v7_secondary_startup)
|
||||
#endif
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/smp_scu.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -21,6 +22,7 @@
|
|||
|
||||
#define SCU_STANDBY_ENABLE (1 << 5)
|
||||
|
||||
u32 g_diag_reg;
|
||||
static void __iomem *scu_base;
|
||||
|
||||
static struct map_desc scu_io_desc __initdata = {
|
||||
|
@ -80,6 +82,18 @@ void imx_smp_prepare(void)
|
|||
static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
imx_smp_prepare();
|
||||
|
||||
/*
|
||||
* The diagnostic register holds the errata bits. Mostly bootloader
|
||||
* does not bring up secondary cores, so that when errata bits are set
|
||||
* in bootloader, they are set only for boot cpu. But on a SMP
|
||||
* configuration, it should be equally done on every single core.
|
||||
* Read the register from boot cpu here, and will replicate it into
|
||||
* secondary cores when booting them.
|
||||
*/
|
||||
asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc");
|
||||
__cpuc_flush_dcache_area(&g_diag_reg, sizeof(g_diag_reg));
|
||||
outer_clean_range(__pa(&g_diag_reg), __pa(&g_diag_reg + 1));
|
||||
}
|
||||
|
||||
struct smp_operations imx_smp_ops __initdata = {
|
||||
|
|
|
@ -528,12 +528,6 @@ void __init kirkwood_init_early(void)
|
|||
{
|
||||
orion_time_set_base(TIMER_VIRT_BASE);
|
||||
|
||||
/*
|
||||
* Some Kirkwood devices allocate their coherent buffers from atomic
|
||||
* context. Increase size of atomic coherent pool to make sure such
|
||||
* the allocations won't fail.
|
||||
*/
|
||||
init_dma_coherent_pool_size(SZ_1M);
|
||||
mvebu_mbus_init("marvell,kirkwood-mbus",
|
||||
BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
|
||||
DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
|
||||
|
|
|
@ -124,7 +124,7 @@ static void __init qnap_ts219_init(void)
|
|||
static int __init ts219_pci_init(void)
|
||||
{
|
||||
if (machine_is_ts219())
|
||||
kirkwood_pcie_init(KW_PCIE0);
|
||||
kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -15,6 +15,7 @@ config ARCH_MVEBU
|
|||
select MVEBU_CLK_GATING
|
||||
select MVEBU_MBUS
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
||||
if ARCH_MVEBU
|
||||
|
||||
|
|
|
@ -53,13 +53,6 @@ void __init armada_370_xp_init_early(void)
|
|||
{
|
||||
char *mbus_soc_name;
|
||||
|
||||
/*
|
||||
* Some Armada 370/XP devices allocate their coherent buffers
|
||||
* from atomic context. Increase size of atomic coherent pool
|
||||
* to make sure such the allocations won't fail.
|
||||
*/
|
||||
init_dma_coherent_pool_size(SZ_1M);
|
||||
|
||||
/*
|
||||
* This initialization will be replaced by a DT-based
|
||||
* initialization once the mvebu-mbus driver gains DT support.
|
||||
|
|
|
@ -345,6 +345,7 @@ static int __init omap1_system_dma_init(void)
|
|||
dev_err(&pdev->dev,
|
||||
"%s: Memory allocation failed for d->chan!\n",
|
||||
__func__);
|
||||
ret = -ENOMEM;
|
||||
goto exit_release_d;
|
||||
}
|
||||
|
||||
|
|
|
@ -454,9 +454,29 @@ DEFINE_CLK_GATE(cefuse_fck, "sys_clkin_ck", &sys_clkin_ck, 0x0,
|
|||
*/
|
||||
DEFINE_CLK_FIXED_FACTOR(clkdiv32k_ck, "clk_24mhz", &clk_24mhz, 0x0, 1, 732);
|
||||
|
||||
DEFINE_CLK_GATE(clkdiv32k_ick, "clkdiv32k_ck", &clkdiv32k_ck, 0x0,
|
||||
AM33XX_CM_PER_CLKDIV32K_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT,
|
||||
0x0, NULL);
|
||||
static struct clk clkdiv32k_ick;
|
||||
|
||||
static const char *clkdiv32k_ick_parent_names[] = {
|
||||
"clkdiv32k_ck",
|
||||
};
|
||||
|
||||
static const struct clk_ops clkdiv32k_ick_ops = {
|
||||
.enable = &omap2_dflt_clk_enable,
|
||||
.disable = &omap2_dflt_clk_disable,
|
||||
.is_enabled = &omap2_dflt_clk_is_enabled,
|
||||
.init = &omap2_init_clk_clkdm,
|
||||
};
|
||||
|
||||
static struct clk_hw_omap clkdiv32k_ick_hw = {
|
||||
.hw = {
|
||||
.clk = &clkdiv32k_ick,
|
||||
},
|
||||
.enable_reg = AM33XX_CM_PER_CLKDIV32K_CLKCTRL,
|
||||
.enable_bit = AM33XX_MODULEMODE_SWCTRL_SHIFT,
|
||||
.clkdm_name = "clk_24mhz_clkdm",
|
||||
};
|
||||
|
||||
DEFINE_STRUCT_CLK(clkdiv32k_ick, clkdiv32k_ick_parent_names, clkdiv32k_ick_ops);
|
||||
|
||||
/* "usbotg_fck" is an additional clock and not really a modulemode */
|
||||
DEFINE_CLK_GATE(usbotg_fck, "dpll_per_ck", &dpll_per_ck, 0x0,
|
||||
|
|
|
@ -1356,13 +1356,27 @@ static void _enable_sysc(struct omap_hwmod *oh)
|
|||
|
||||
clkdm = _get_clkdm(oh);
|
||||
if (sf & SYSC_HAS_SIDLEMODE) {
|
||||
if (oh->flags & HWMOD_SWSUP_SIDLE ||
|
||||
oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
|
||||
idlemode = HWMOD_IDLEMODE_NO;
|
||||
} else {
|
||||
if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
_enable_wakeup(oh, &v);
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is special handling for some IPs like
|
||||
* 32k sync timer. Force them to idle!
|
||||
*/
|
||||
clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
|
||||
if (clkdm_act && !(oh->class->sysc->idlemodes &
|
||||
(SIDLE_SMART | SIDLE_SMART_WKUP)))
|
||||
idlemode = HWMOD_IDLEMODE_FORCE;
|
||||
else
|
||||
idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
|
||||
HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
|
||||
|
||||
_set_slave_idlemode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
|
@ -1391,10 +1405,6 @@ static void _enable_sysc(struct omap_hwmod *oh)
|
|||
(sf & SYSC_HAS_CLOCKACTIVITY))
|
||||
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
|
||||
|
||||
/* If slave is in SMARTIDLE, also enable wakeup */
|
||||
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
|
||||
_enable_wakeup(oh, &v);
|
||||
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
/*
|
||||
|
@ -1430,13 +1440,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
|
|||
sf = oh->class->sysc->sysc_flags;
|
||||
|
||||
if (sf & SYSC_HAS_SIDLEMODE) {
|
||||
/* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
|
||||
if (oh->flags & HWMOD_SWSUP_SIDLE ||
|
||||
!(oh->class->sysc->idlemodes &
|
||||
(SIDLE_SMART | SIDLE_SMART_WKUP)))
|
||||
if (oh->flags & HWMOD_SWSUP_SIDLE) {
|
||||
idlemode = HWMOD_IDLEMODE_FORCE;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
} else {
|
||||
if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
_enable_wakeup(oh, &v);
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
}
|
||||
_set_slave_idlemode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
|
@ -1455,10 +1468,6 @@ static void _idle_sysc(struct omap_hwmod *oh)
|
|||
_set_master_standbymode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
/* If slave is in SMARTIDLE, also enable wakeup */
|
||||
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
|
||||
_enable_wakeup(oh, &v);
|
||||
|
||||
_write_sysconfig(v, oh);
|
||||
}
|
||||
|
||||
|
@ -2065,7 +2074,7 @@ static int _omap4_get_context_lost(struct omap_hwmod *oh)
|
|||
* do so is present in the hwmod data, then call it and pass along the
|
||||
* return value; otherwise, return 0.
|
||||
*/
|
||||
static int __init _enable_preprogram(struct omap_hwmod *oh)
|
||||
static int _enable_preprogram(struct omap_hwmod *oh)
|
||||
{
|
||||
if (!oh->class->enable_preprogram)
|
||||
return 0;
|
||||
|
@ -2245,42 +2254,6 @@ static int _idle(struct omap_hwmod *oh)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
|
||||
* @oh: struct omap_hwmod *
|
||||
* @autoidle: desired AUTOIDLE bitfield value (0 or 1)
|
||||
*
|
||||
* Sets the IP block's OCP autoidle bit in hardware, and updates our
|
||||
* local copy. Intended to be used by drivers that require
|
||||
* direct manipulation of the AUTOIDLE bits.
|
||||
* Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
|
||||
* along the return value from _set_module_autoidle().
|
||||
*
|
||||
* Any users of this function should be scrutinized carefully.
|
||||
*/
|
||||
int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
|
||||
{
|
||||
u32 v;
|
||||
int retval = 0;
|
||||
unsigned long flags;
|
||||
|
||||
if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&oh->_lock, flags);
|
||||
|
||||
v = oh->_sysc_cache;
|
||||
|
||||
retval = _set_module_autoidle(oh, autoidle, &v);
|
||||
|
||||
if (!retval)
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
spin_unlock_irqrestore(&oh->_lock, flags);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
/**
|
||||
* _shutdown - shutdown an omap_hwmod
|
||||
* @oh: struct omap_hwmod *
|
||||
|
@ -3179,38 +3152,6 @@ error:
|
|||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
|
||||
* @oh: struct omap_hwmod *
|
||||
* @idlemode: SIDLEMODE field bits (shifted to bit 0)
|
||||
*
|
||||
* Sets the IP block's OCP slave idlemode in hardware, and updates our
|
||||
* local copy. Intended to be used by drivers that have some erratum
|
||||
* that requires direct manipulation of the SIDLEMODE bits. Returns
|
||||
* -EINVAL if @oh is null, or passes along the return value from
|
||||
* _set_slave_idlemode().
|
||||
*
|
||||
* XXX Does this function have any current users? If not, we should
|
||||
* remove it; it is better to let the rest of the hwmod code handle this.
|
||||
* Any users of this function should be scrutinized carefully.
|
||||
*/
|
||||
int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
|
||||
{
|
||||
u32 v;
|
||||
int retval = 0;
|
||||
|
||||
if (!oh)
|
||||
return -EINVAL;
|
||||
|
||||
v = oh->_sysc_cache;
|
||||
|
||||
retval = _set_slave_idlemode(oh, idlemode, &v);
|
||||
if (!retval)
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_lookup - look up a registered omap_hwmod by name
|
||||
* @name: name of the omap_hwmod to look up
|
||||
|
|
|
@ -463,6 +463,9 @@ struct omap_hwmod_omap4_prcm {
|
|||
* is kept in force-standby mode. Failing to do so causes PM problems
|
||||
* with musb on OMAP3630 at least. Note that musb has a dedicated register
|
||||
* to control MSTANDBY signal when MIDLEMODE is set to force-standby.
|
||||
* HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module
|
||||
* out of idle, but rely on smart-idle to the put it back in idle,
|
||||
* so the wakeups are still functional (Only known case for now is UART)
|
||||
*/
|
||||
#define HWMOD_SWSUP_SIDLE (1 << 0)
|
||||
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
|
||||
|
@ -476,6 +479,7 @@ struct omap_hwmod_omap4_prcm {
|
|||
#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
|
||||
#define HWMOD_BLOCK_WFI (1 << 10)
|
||||
#define HWMOD_FORCE_MSTANDBY (1 << 11)
|
||||
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
|
||||
|
||||
/*
|
||||
* omap_hwmod._int_flags definitions
|
||||
|
@ -641,9 +645,6 @@ int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
|
|||
int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
|
||||
int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
|
||||
|
||||
int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
|
||||
int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
|
||||
|
||||
int omap_hwmod_reset(struct omap_hwmod *oh);
|
||||
void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
|
||||
|
||||
|
|
|
@ -512,6 +512,7 @@ struct omap_hwmod omap2xxx_uart1_hwmod = {
|
|||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart1_sdma_reqs,
|
||||
.main_clk = "uart1_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
|
@ -531,6 +532,7 @@ struct omap_hwmod omap2xxx_uart2_hwmod = {
|
|||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart2_sdma_reqs,
|
||||
.main_clk = "uart2_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
|
@ -550,6 +552,7 @@ struct omap_hwmod omap2xxx_uart3_hwmod = {
|
|||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
|
|
|
@ -1995,6 +1995,7 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
|
|||
.name = "uart1",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4_wkup_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart1_irqs,
|
||||
.sdma_reqs = uart1_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_wkupdm_ck",
|
||||
|
@ -2015,6 +2016,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
|
|||
.name = "uart2",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4ls_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart2_irqs,
|
||||
.sdma_reqs = uart1_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_ck",
|
||||
|
@ -2042,6 +2044,7 @@ static struct omap_hwmod am33xx_uart3_hwmod = {
|
|||
.name = "uart3",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4ls_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart3_irqs,
|
||||
.sdma_reqs = uart3_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_ck",
|
||||
|
@ -2062,6 +2065,7 @@ static struct omap_hwmod am33xx_uart4_hwmod = {
|
|||
.name = "uart4",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4ls_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart4_irqs,
|
||||
.sdma_reqs = uart1_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_ck",
|
||||
|
@ -2082,6 +2086,7 @@ static struct omap_hwmod am33xx_uart5_hwmod = {
|
|||
.name = "uart5",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4ls_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart5_irqs,
|
||||
.sdma_reqs = uart1_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_ck",
|
||||
|
@ -2102,6 +2107,7 @@ static struct omap_hwmod am33xx_uart6_hwmod = {
|
|||
.name = "uart6",
|
||||
.class = &uart_class,
|
||||
.clkdm_name = "l4ls_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = am33xx_uart6_irqs,
|
||||
.sdma_reqs = uart1_edma_reqs,
|
||||
.main_clk = "dpll_per_m2_div4_ck",
|
||||
|
|
|
@ -490,6 +490,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
|
|||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart1_sdma_reqs,
|
||||
.main_clk = "uart1_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
|
@ -508,6 +509,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
|
|||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart2_sdma_reqs,
|
||||
.main_clk = "uart2_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
|
@ -526,6 +528,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
|
|||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
.sdma_reqs = omap2_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = OMAP3430_PER_MOD,
|
||||
|
@ -555,6 +558,7 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
|
|||
.mpu_irqs = uart4_mpu_irqs,
|
||||
.sdma_reqs = uart4_sdma_reqs,
|
||||
.main_clk = "uart4_fck",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = OMAP3430_PER_MOD,
|
||||
|
|
|
@ -3434,6 +3434,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
|
|||
.name = "uart1",
|
||||
.class = &omap44xx_uart_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = omap44xx_uart1_irqs,
|
||||
.sdma_reqs = omap44xx_uart1_sdma_reqs,
|
||||
.main_clk = "func_48m_fclk",
|
||||
|
@ -3462,6 +3463,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
|
|||
.name = "uart2",
|
||||
.class = &omap44xx_uart_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = omap44xx_uart2_irqs,
|
||||
.sdma_reqs = omap44xx_uart2_sdma_reqs,
|
||||
.main_clk = "func_48m_fclk",
|
||||
|
@ -3490,7 +3492,8 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
|
|||
.name = "uart3",
|
||||
.class = &omap44xx_uart_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
|
||||
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
|
||||
HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = omap44xx_uart3_irqs,
|
||||
.sdma_reqs = omap44xx_uart3_sdma_reqs,
|
||||
.main_clk = "func_48m_fclk",
|
||||
|
@ -3519,6 +3522,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
|
|||
.name = "uart4",
|
||||
.class = &omap44xx_uart_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
||||
.mpu_irqs = omap44xx_uart4_irqs,
|
||||
.sdma_reqs = omap44xx_uart4_sdma_reqs,
|
||||
.main_clk = "func_48m_fclk",
|
||||
|
|
|
@ -95,38 +95,9 @@ static void omap_uart_enable_wakeup(struct device *dev, bool enable)
|
|||
omap_hwmod_disable_wakeup(od->hwmods[0]);
|
||||
}
|
||||
|
||||
/*
|
||||
* Errata i291: [UART]:Cannot Acknowledge Idle Requests
|
||||
* in Smartidle Mode When Configured for DMA Operations.
|
||||
* WA: configure uart in force idle mode.
|
||||
*/
|
||||
static void omap_uart_set_noidle(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct omap_device *od = to_omap_device(pdev);
|
||||
|
||||
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
|
||||
}
|
||||
|
||||
static void omap_uart_set_smartidle(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct omap_device *od = to_omap_device(pdev);
|
||||
u8 idlemode;
|
||||
|
||||
if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
|
||||
omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
|
||||
}
|
||||
|
||||
#else
|
||||
static void omap_uart_enable_wakeup(struct device *dev, bool enable)
|
||||
{}
|
||||
static void omap_uart_set_noidle(struct device *dev) {}
|
||||
static void omap_uart_set_smartidle(struct device *dev) {}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -299,8 +270,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
|
|||
omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
|
||||
omap_up.flags = UPF_BOOT_AUTOCONF;
|
||||
omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
|
||||
omap_up.set_forceidle = omap_uart_set_smartidle;
|
||||
omap_up.set_noidle = omap_uart_set_noidle;
|
||||
omap_up.enable_wakeup = omap_uart_enable_wakeup;
|
||||
omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
|
||||
omap_up.dma_rx_timeout = info->dma_rx_timeout;
|
||||
|
|
|
@ -199,13 +199,6 @@ void __init orion5x_init_early(void)
|
|||
|
||||
orion_time_set_base(TIMER_VIRT_BASE);
|
||||
|
||||
/*
|
||||
* Some Orion5x devices allocate their coherent buffers from atomic
|
||||
* context. Increase size of atomic coherent pool to make sure such
|
||||
* the allocations won't fail.
|
||||
*/
|
||||
init_dma_coherent_pool_size(SZ_1M);
|
||||
|
||||
/* Initialize the MBUS driver */
|
||||
orion5x_pcie_id(&dev, &rev);
|
||||
if (dev == MV88F5281_DEV_ID)
|
||||
|
|
|
@ -212,8 +212,8 @@ static struct platform_device *marzen_devices[] __initdata = {
|
|||
static struct usb_phy *phy;
|
||||
static int usb_power_on(struct platform_device *pdev)
|
||||
{
|
||||
if (!phy)
|
||||
return -EIO;
|
||||
if (IS_ERR(phy))
|
||||
return PTR_ERR(phy);
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_get_sync(&pdev->dev);
|
||||
|
@ -225,7 +225,7 @@ static int usb_power_on(struct platform_device *pdev)
|
|||
|
||||
static void usb_power_off(struct platform_device *pdev)
|
||||
{
|
||||
if (!phy)
|
||||
if (IS_ERR(phy))
|
||||
return;
|
||||
|
||||
usb_phy_shutdown(phy);
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
config ARCH_SUNXI
|
||||
bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select CLKSRC_MMIO
|
||||
select CLKSRC_OF
|
||||
select COMMON_CLK
|
||||
|
|
|
@ -307,11 +307,6 @@ static int tegra_emc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(&pdev->dev, "missing register base\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
emc_regbase = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(emc_regbase))
|
||||
return PTR_ERR(emc_regbase);
|
||||
|
|
|
@ -51,6 +51,7 @@ config MACH_MOP500
|
|||
bool "U8500 Development platform, MOP500 versions"
|
||||
select I2C
|
||||
select I2C_NOMADIK
|
||||
select REGULATOR
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
select SOC_BUS
|
||||
select UX500_SOC_DB8500
|
||||
|
|
|
@ -623,7 +623,7 @@ static void __init mop500_init_machine(void)
|
|||
sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
|
||||
|
||||
mop500_pinmaps_init();
|
||||
parent = u8500_init_devices(&ab8500_platdata);
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
||||
mop500_platform_devs[i]->dev.parent = parent;
|
||||
|
@ -660,7 +660,7 @@ static void __init snowball_init_machine(void)
|
|||
sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
|
||||
|
||||
snowball_pinmaps_init();
|
||||
parent = u8500_init_devices(&ab8500_platdata);
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
|
||||
snowball_platform_devs[i]->dev.parent = parent;
|
||||
|
@ -698,7 +698,7 @@ static void __init hrefv60_init_machine(void)
|
|||
sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
|
||||
|
||||
hrefv60_pinmaps_init();
|
||||
parent = u8500_init_devices(&ab8500_platdata);
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
||||
mop500_platform_devs[i]->dev.parent = parent;
|
||||
|
|
|
@ -206,7 +206,7 @@ static struct device * __init db8500_soc_device_init(void)
|
|||
/*
|
||||
* This function is called from the board init
|
||||
*/
|
||||
struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
|
||||
struct device * __init u8500_init_devices(void)
|
||||
{
|
||||
struct device *parent;
|
||||
int i;
|
||||
|
@ -220,8 +220,6 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
|
|||
for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
|
||||
platform_devs[i]->dev.parent = parent;
|
||||
|
||||
db8500_prcmu_device.dev.platform_data = ab8500;
|
||||
|
||||
platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
|
||||
|
||||
return parent;
|
||||
|
@ -278,7 +276,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
|||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
|
||||
&db8500_prcmu_pdata),
|
||||
OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL),
|
||||
OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
|
||||
/* Requires device name bindings. */
|
||||
OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
|
||||
"pinctrl-db8500", NULL),
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
void __init ux500_map_io(void);
|
||||
extern void __init u8500_map_io(void);
|
||||
|
||||
extern struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500);
|
||||
extern struct device * __init u8500_init_devices(void);
|
||||
|
||||
extern void __init ux500_init_irq(void);
|
||||
extern void __init ux500_init_late(void);
|
||||
|
|
|
@ -173,6 +173,7 @@ static const char * const vt8500_dt_compat[] = {
|
|||
"wm,wm8505",
|
||||
"wm,wm8750",
|
||||
"wm,wm8850",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
|
||||
|
|
|
@ -383,7 +383,7 @@ static struct resource orion_ge10_shared_resources[] = {
|
|||
|
||||
static struct platform_device orion_ge10_shared = {
|
||||
.name = MV643XX_ETH_SHARED_NAME,
|
||||
.id = 1,
|
||||
.id = 2,
|
||||
.dev = {
|
||||
.platform_data = &orion_ge10_shared_data,
|
||||
},
|
||||
|
@ -398,8 +398,8 @@ static struct resource orion_ge10_resources[] = {
|
|||
|
||||
static struct platform_device orion_ge10 = {
|
||||
.name = MV643XX_ETH_NAME,
|
||||
.id = 1,
|
||||
.num_resources = 2,
|
||||
.id = 2,
|
||||
.num_resources = 1,
|
||||
.resource = orion_ge10_resources,
|
||||
.dev = {
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
|
@ -432,7 +432,7 @@ static struct resource orion_ge11_shared_resources[] = {
|
|||
|
||||
static struct platform_device orion_ge11_shared = {
|
||||
.name = MV643XX_ETH_SHARED_NAME,
|
||||
.id = 1,
|
||||
.id = 3,
|
||||
.dev = {
|
||||
.platform_data = &orion_ge11_shared_data,
|
||||
},
|
||||
|
@ -447,8 +447,8 @@ static struct resource orion_ge11_resources[] = {
|
|||
|
||||
static struct platform_device orion_ge11 = {
|
||||
.name = MV643XX_ETH_NAME,
|
||||
.id = 1,
|
||||
.num_resources = 2,
|
||||
.id = 3,
|
||||
.num_resources = 1,
|
||||
.resource = orion_ge11_resources,
|
||||
.dev = {
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
|
||||
#ifndef __PLAT_COMMON_H
|
||||
#include <linux/mv643xx_eth.h>
|
||||
#include <linux/platform_data/usb-ehci-orion.h>
|
||||
|
||||
struct dsa_platform_data;
|
||||
struct mv_sata_platform_data;
|
||||
|
|
|
@ -381,11 +381,6 @@ static int s3c_adc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!regs) {
|
||||
dev_err(dev, "failed to find registers\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
adc->regs = devm_ioremap_resource(dev, regs);
|
||||
if (IS_ERR(adc->regs))
|
||||
return PTR_ERR(adc->regs);
|
||||
|
|
|
@ -60,7 +60,7 @@ ENTRY(vfp_testing_entry)
|
|||
str r11, [r10, #TI_PREEMPT]
|
||||
#endif
|
||||
ldr r0, VFP_arch_address
|
||||
str r5, [r0] @ known non-zero value
|
||||
str r0, [r0] @ set to non-zero value
|
||||
mov pc, r9 @ we have handled the fault
|
||||
ENDPROC(vfp_testing_entry)
|
||||
|
||||
|
|
|
@ -152,11 +152,12 @@ int xen_unmap_domain_mfn_range(struct vm_area_struct *vma,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(xen_unmap_domain_mfn_range);
|
||||
|
||||
static int __init xen_secondary_init(unsigned int cpu)
|
||||
static void __init xen_percpu_init(void *unused)
|
||||
{
|
||||
struct vcpu_register_vcpu_info info;
|
||||
struct vcpu_info *vcpup;
|
||||
int err;
|
||||
int cpu = get_cpu();
|
||||
|
||||
pr_info("Xen: initializing cpu%d\n", cpu);
|
||||
vcpup = per_cpu_ptr(xen_vcpu_info, cpu);
|
||||
|
@ -165,14 +166,10 @@ static int __init xen_secondary_init(unsigned int cpu)
|
|||
info.offset = offset_in_page(vcpup);
|
||||
|
||||
err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
|
||||
if (err) {
|
||||
pr_debug("register_vcpu_info failed: err=%d\n", err);
|
||||
} else {
|
||||
/* This cpu is using the registered vcpu info, even if
|
||||
later ones fail to. */
|
||||
per_cpu(xen_vcpu, cpu) = vcpup;
|
||||
}
|
||||
return 0;
|
||||
BUG_ON(err);
|
||||
per_cpu(xen_vcpu, cpu) = vcpup;
|
||||
|
||||
enable_percpu_irq(xen_events_irq, 0);
|
||||
}
|
||||
|
||||
static void xen_restart(char str, const char *cmd)
|
||||
|
@ -208,7 +205,6 @@ static int __init xen_guest_init(void)
|
|||
const char *version = NULL;
|
||||
const char *xen_prefix = "xen,xen-";
|
||||
struct resource res;
|
||||
int i;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "xen,xen");
|
||||
if (!node) {
|
||||
|
@ -265,19 +261,23 @@ static int __init xen_guest_init(void)
|
|||
sizeof(struct vcpu_info));
|
||||
if (xen_vcpu_info == NULL)
|
||||
return -ENOMEM;
|
||||
for_each_online_cpu(i)
|
||||
xen_secondary_init(i);
|
||||
|
||||
gnttab_init();
|
||||
if (!xen_initial_domain())
|
||||
xenbus_probe(NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(xen_guest_init);
|
||||
|
||||
static int __init xen_pm_init(void)
|
||||
{
|
||||
pm_power_off = xen_power_off;
|
||||
arm_pm_restart = xen_restart;
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(xen_guest_init);
|
||||
subsys_initcall(xen_pm_init);
|
||||
|
||||
static irqreturn_t xen_arm_callback(int irq, void *arg)
|
||||
{
|
||||
|
@ -285,11 +285,6 @@ static irqreturn_t xen_arm_callback(int irq, void *arg)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static __init void xen_percpu_enable_events(void *unused)
|
||||
{
|
||||
enable_percpu_irq(xen_events_irq, 0);
|
||||
}
|
||||
|
||||
static int __init xen_init_events(void)
|
||||
{
|
||||
if (!xen_domain() || xen_events_irq < 0)
|
||||
|
@ -303,7 +298,7 @@ static int __init xen_init_events(void)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
on_each_cpu(xen_percpu_enable_events, NULL, 0);
|
||||
on_each_cpu(xen_percpu_init, NULL, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -122,8 +122,6 @@ endmenu
|
|||
|
||||
menu "Kernel Features"
|
||||
|
||||
source "kernel/time/Kconfig"
|
||||
|
||||
config ARM64_64K_PAGES
|
||||
bool "Enable 64KB pages support"
|
||||
help
|
||||
|
|
|
@ -82,7 +82,7 @@
|
|||
|
||||
.macro enable_dbg_if_not_stepping, tmp
|
||||
mrs \tmp, mdscr_el1
|
||||
tbnz \tmp, #1, 9990f
|
||||
tbnz \tmp, #0, 9990f
|
||||
enable_dbg
|
||||
9990:
|
||||
.endm
|
||||
|
|
|
@ -136,8 +136,6 @@ void disable_debug_monitors(enum debug_el el)
|
|||
*/
|
||||
static void clear_os_lock(void *unused)
|
||||
{
|
||||
asm volatile("msr mdscr_el1, %0" : : "r" (0));
|
||||
isb();
|
||||
asm volatile("msr oslar_el1, %0" : : "r" (0));
|
||||
isb();
|
||||
}
|
||||
|
|
|
@ -95,7 +95,7 @@ static void early_write(struct console *con, const char *s, unsigned n)
|
|||
}
|
||||
}
|
||||
|
||||
static struct console early_console = {
|
||||
static struct console early_console_dev = {
|
||||
.name = "earlycon",
|
||||
.write = early_write,
|
||||
.flags = CON_PRINTBUFFER | CON_BOOT,
|
||||
|
@ -145,7 +145,8 @@ static int __init setup_early_printk(char *buf)
|
|||
early_base = early_io_map(paddr, EARLYCON_IOBASE);
|
||||
|
||||
printch = match->printch;
|
||||
register_console(&early_console);
|
||||
early_console = &early_console_dev;
|
||||
register_console(&early_console_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -282,12 +282,13 @@ void __init setup_arch(char **cmdline_p)
|
|||
#endif
|
||||
}
|
||||
|
||||
static int __init arm64_of_clk_init(void)
|
||||
static int __init arm64_device_init(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(arm64_of_clk_init);
|
||||
arch_initcall(arm64_device_init);
|
||||
|
||||
static DEFINE_PER_CPU(struct cpu, cpu_data);
|
||||
|
||||
|
@ -305,13 +306,6 @@ static int __init topology_init(void)
|
|||
}
|
||||
subsys_initcall(topology_init);
|
||||
|
||||
static int __init arm64_device_probe(void)
|
||||
{
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
return 0;
|
||||
}
|
||||
device_initcall(arm64_device_probe);
|
||||
|
||||
static const char *hwcap_str[] = {
|
||||
"fp",
|
||||
"asimd",
|
||||
|
|
|
@ -52,7 +52,7 @@ loop1:
|
|||
add x2, x2, #4 // add 4 (line length offset)
|
||||
mov x4, #0x3ff
|
||||
and x4, x4, x1, lsr #3 // find maximum number on the way size
|
||||
clz x5, x4 // find bit position of way size increment
|
||||
clz w5, w4 // find bit position of way size increment
|
||||
mov x7, #0x7fff
|
||||
and x7, x7, x1, lsr #13 // extract max number of the index size
|
||||
loop2:
|
||||
|
|
|
@ -119,8 +119,7 @@ ENTRY(__cpu_setup)
|
|||
|
||||
mov x0, #3 << 20
|
||||
msr cpacr_el1, x0 // Enable FP/ASIMD
|
||||
mov x0, #1
|
||||
msr oslar_el1, x0 // Set the debug OS lock
|
||||
msr mdscr_el1, xzr // Reset mdscr_el1
|
||||
tlbi vmalle1is // invalidate I + D TLBs
|
||||
/*
|
||||
* Memory region attributes for LPAE:
|
||||
|
|
|
@ -205,6 +205,11 @@ config ARCH_DISCONTIGMEM_ENABLE
|
|||
config ARCH_SPARSEMEM_ENABLE
|
||||
def_bool n
|
||||
|
||||
config NODES_SHIFT
|
||||
int
|
||||
default "2"
|
||||
depends on NEED_MULTIPLE_NODES
|
||||
|
||||
source "mm/Kconfig"
|
||||
|
||||
config OWNERSHIP_TRACE
|
||||
|
|
|
@ -2,3 +2,4 @@
|
|||
generic-y += clkdev.h
|
||||
generic-y += exec.h
|
||||
generic-y += trace_clock.h
|
||||
generic-y += param.h
|
||||
|
|
|
@ -1,7 +0,0 @@
|
|||
#ifndef __ASM_AVR32_NUMNODES_H
|
||||
#define __ASM_AVR32_NUMNODES_H
|
||||
|
||||
/* Max 4 nodes */
|
||||
#define NODES_SHIFT 2
|
||||
|
||||
#endif /* __ASM_AVR32_NUMNODES_H */
|
|
@ -1,9 +0,0 @@
|
|||
#ifndef __ASM_AVR32_PARAM_H
|
||||
#define __ASM_AVR32_PARAM_H
|
||||
|
||||
#include <uapi/asm/param.h>
|
||||
|
||||
# define HZ CONFIG_HZ
|
||||
# define USER_HZ 100 /* User interfaces are in "ticks" */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
|
||||
#endif /* __ASM_AVR32_PARAM_H */
|
|
@ -33,3 +33,4 @@ header-y += termbits.h
|
|||
header-y += termios.h
|
||||
header-y += types.h
|
||||
header-y += unistd.h
|
||||
generic-y += param.h
|
||||
|
|
|
@ -1,18 +0,0 @@
|
|||
#ifndef _UAPI__ASM_AVR32_PARAM_H
|
||||
#define _UAPI__ASM_AVR32_PARAM_H
|
||||
|
||||
|
||||
#ifndef HZ
|
||||
# define HZ 100
|
||||
#endif
|
||||
|
||||
/* TODO: Should be configurable */
|
||||
#define EXEC_PAGESIZE 4096
|
||||
|
||||
#ifndef NOGROUP
|
||||
# define NOGROUP (-1)
|
||||
#endif
|
||||
|
||||
#define MAXHOSTNAMELEN 64
|
||||
|
||||
#endif /* _UAPI__ASM_AVR32_PARAM_H */
|
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