alim15x3: fix CD_ROM DMA and PIO FIFO settings setup
* Setup CD_ROM DMA and PIO FIFO settings in init_chipset_ali15x3() instead of ata66_ali15x3(). The latter is called from init_hwif_common_ali15x3() only if DMA base exists (which insists m5529_revision > 0x20). This changes makes CD_ROM DMA / PIO FIFO bits being set only once and also when "idex=ata66" kernel parameter is used. * While at it move also chip_is_1543c_e setup from ata66_ali15x3() to init_chipset_ali15x3() and check if isa_dev exists before accessing it. * Bump driver version. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -1,5 +1,5 @@
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/*
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* linux/drivers/ide/pci/alim15x3.c Version 0.27 Aug 27 2007
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* linux/drivers/ide/pci/alim15x3.c Version 0.28 Sep 15 2007
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*
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* Copyright (C) 1998-2000 Michel Aubry, Maintainer
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* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
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@ -492,6 +492,13 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
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* clear bit 7
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*/
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pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
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/*
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* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
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*/
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if (m5229_revision >= 0x20 && isa_dev) {
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pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
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chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
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}
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goto out;
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}
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@ -537,7 +544,30 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
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pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
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}
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}
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out:
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/*
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* CD_ROM DMA on (m5229, 0x53, bit0)
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* Enable this bit even if we want to use PIO.
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* PIO FIFO off (m5229, 0x53, bit1)
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* The hardware will use 0x54h and 0x55h to control PIO FIFO.
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* (Not on later devices it seems)
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*
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* 0x53 changes meaning on later revs - we must no touch
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* bit 1 on them. Need to check if 0x20 is the right break.
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*/
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if (m5229_revision >= 0x20) {
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pci_read_config_byte(dev, 0x53, &tmpbyte);
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if (m5229_revision <= 0x20)
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tmpbyte = (tmpbyte & (~0x02)) | 0x01;
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else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
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tmpbyte |= 0x03;
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else
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tmpbyte |= 0x01;
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pci_write_config_byte(dev, 0x53, tmpbyte);
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}
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pci_dev_put(north);
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pci_dev_put(isa_dev);
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local_irq_restore(flags);
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@ -616,36 +646,8 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
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if ((tmpbyte & (1 << hwif->channel)) == 0)
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cbl = ATA_CBL_PATA80;
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}
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} else {
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/*
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* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
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*/
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pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
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chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
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}
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/*
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* CD_ROM DMA on (m5229, 0x53, bit0)
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* Enable this bit even if we want to use PIO
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* PIO FIFO off (m5229, 0x53, bit1)
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* The hardware will use 0x54h and 0x55h to control PIO FIFO
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* (Not on later devices it seems)
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*
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* 0x53 changes meaning on later revs - we must no touch
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* bit 1 on them. Need to check if 0x20 is the right break
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*/
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pci_read_config_byte(dev, 0x53, &tmpbyte);
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if(m5229_revision <= 0x20)
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tmpbyte = (tmpbyte & (~0x02)) | 0x01;
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else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
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tmpbyte |= 0x03;
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else
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tmpbyte |= 0x01;
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pci_write_config_byte(dev, 0x53, tmpbyte);
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local_irq_restore(flags);
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return cbl;
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