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arm64: fix pmem interface definition

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Defining the two functions as 'static inline' and exporting them
leads to the interesting case where we can use the interface
from loadable modules, but not from built-in drivers, as shown
in this link failure:

vers/nvdimm/claim.o: In function `nsio_rw_bytes':
claim.c:(.text+0x1b8): undefined reference to `arch_invalidate_pmem'
drivers/nvdimm/pmem.o: In function `pmem_dax_flush':
pmem.c:(.text+0x11c): undefined reference to `arch_wb_cache_pmem'
drivers/nvdimm/pmem.o: In function `pmem_make_request':
pmem.c:(.text+0x5a4): undefined reference to `arch_invalidate_pmem'
pmem.c:(.text+0x650): undefined reference to `arch_invalidate_pmem'
pmem.c:(.text+0x6d4): undefined reference to `arch_invalidate_pmem'

This removes the bogus 'static inline'.

Fixes: d50e071fda ("arm64: Implement pmem API support")
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Arnd Bergmann 2017-08-10 16:52:31 +02:00 committed by Catalin Marinas
parent 21cfa0e96d
commit caf5ef7d15
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/mm/flush.c
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@ -85,7 +85,7 @@ EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(flush_icache_range);
#ifdef CONFIG_ARCH_HAS_PMEM_API
static inline void arch_wb_cache_pmem(void *addr, size_t size)
void arch_wb_cache_pmem(void *addr, size_t size)
{
/* Ensure order against any prior non-cacheable writes */
dmb(osh);
@ -93,7 +93,7 @@ static inline void arch_wb_cache_pmem(void *addr, size_t size)
}
EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
static inline void arch_invalidate_pmem(void *addr, size_t size)
void arch_invalidate_pmem(void *addr, size_t size)
{
__inval_dcache_area(addr, size);
}