dmaengine: Use sg_dma_address instead of sg_phys
dmaengine drivers should always use sg_dma_address instead of sg_phys to get the addresses for the transfer from a sg element. To quote Russel King: sg_phys(sg) of course has nothing to do with DMA addresses. It's the physical address _to the CPU_ of the memory associated with the scatterlist entry. That may, or may not have the same value for the DMA engine, particularly if IOMMUs are involved. And if these drivers are used on ARM, they must be fixed, sooner rather than later. There's patches in the works which will mean we will end up with IOMMU support in the DMA mapping later, which means everything I've said above will become reality. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; @@ -sg_phys(sg) +sg_dma_address(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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@ -1382,11 +1382,11 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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dsg->len = sg_dma_len(sg);
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dsg->len = sg_dma_len(sg);
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if (direction == DMA_MEM_TO_DEV) {
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if (direction == DMA_MEM_TO_DEV) {
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dsg->src_addr = sg_phys(sg);
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dsg->src_addr = sg_dma_address(sg);
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dsg->dst_addr = slave_addr;
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dsg->dst_addr = slave_addr;
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} else {
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} else {
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dsg->src_addr = slave_addr;
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dsg->src_addr = slave_addr;
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dsg->dst_addr = sg_phys(sg);
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dsg->dst_addr = sg_dma_address(sg);
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}
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}
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}
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}
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@ -270,10 +270,10 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,
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if (dir == DMA_MEM_TO_DEV)
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if (dir == DMA_MEM_TO_DEV)
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/* increment source address */
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/* increment source address */
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src = sg_phys(sg);
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src = sg_dma_address(sg);
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else
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else
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/* increment destination address */
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/* increment destination address */
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dst = sg_phys(sg);
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dst = sg_dma_address(sg);
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bytes_to_transfer = sg_dma_len(sg);
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bytes_to_transfer = sg_dma_len(sg);
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@ -743,7 +743,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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struct dw_desc *desc;
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struct dw_desc *desc;
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u32 len, dlen, mem;
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u32 len, dlen, mem;
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mem = sg_phys(sg);
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mem = sg_dma_address(sg);
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len = sg_dma_len(sg);
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len = sg_dma_len(sg);
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if (!((mem | len) & 7))
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if (!((mem | len) & 7))
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@ -810,7 +810,7 @@ slave_sg_todev_fill_desc:
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struct dw_desc *desc;
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struct dw_desc *desc;
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u32 len, dlen, mem;
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u32 len, dlen, mem;
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mem = sg_phys(sg);
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mem = sg_dma_address(sg);
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len = sg_dma_len(sg);
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len = sg_dma_len(sg);
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if (!((mem | len) & 7))
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if (!((mem | len) & 7))
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@ -398,7 +398,7 @@ static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc,
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desc->width,
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desc->width,
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midc->dma->block_size);
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midc->dma->block_size);
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/*Populate SAR and DAR values*/
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/*Populate SAR and DAR values*/
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sg_phy_addr = sg_phys(sg);
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sg_phy_addr = sg_dma_address(sg);
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if (desc->dirn == DMA_MEM_TO_DEV) {
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if (desc->dirn == DMA_MEM_TO_DEV) {
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lli_bloc_desc->sar = sg_phy_addr;
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lli_bloc_desc->sar = sg_phy_addr;
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lli_bloc_desc->dar = mids->dma_slave.dst_addr;
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lli_bloc_desc->dar = mids->dma_slave.dst_addr;
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@ -621,7 +621,7 @@ static struct dma_async_tx_descriptor *pd_prep_slave_sg(struct dma_chan *chan,
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goto err_desc_get;
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goto err_desc_get;
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desc->regs.dev_addr = reg;
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desc->regs.dev_addr = reg;
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desc->regs.mem_addr = sg_phys(sg);
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desc->regs.mem_addr = sg_dma_address(sg);
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desc->regs.size = sg_dma_len(sg);
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desc->regs.size = sg_dma_len(sg);
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desc->regs.next = DMA_DESC_FOLLOW_WITHOUT_IRQ;
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desc->regs.next = DMA_DESC_FOLLOW_WITHOUT_IRQ;
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