clk: qcom: ipq806x: Fix board clk rates
The clocks on these boards run at 25 MHz, not 19.2 and 27 like
other platforms. Unfortunately I copy/pasted from other similar
SoCs but forgot this one is different. Fix it.
Fixes: a085f877a8
("clk: qcom: Move cxo/pxo/xo into dt files")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
parent
84558ff770
commit
cbf2e548ca
|
@ -2990,11 +2990,11 @@ static int gcc_ipq806x_probe(struct platform_device *pdev)
|
|||
struct regmap *regmap;
|
||||
int ret;
|
||||
|
||||
ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 19200000);
|
||||
ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 27000000);
|
||||
ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
Loading…
Reference in a new issue