ARM: dts: exynos: Remove "cooling-{min|max}-level" for CPU nodes
The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Remove the unused properties from the CPU nodes. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
parent
bd010d6066
commit
cd6f55457e
|
@ -48,8 +48,6 @@
|
||||||
400000 975000
|
400000 975000
|
||||||
200000 950000
|
200000 950000
|
||||||
>;
|
>;
|
||||||
cooling-min-level = <4>;
|
|
||||||
cooling-max-level = <2>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -42,8 +42,6 @@
|
||||||
clocks = <&clock CLK_ARM_CLK>;
|
clocks = <&clock CLK_ARM_CLK>;
|
||||||
clock-names = "cpu";
|
clock-names = "cpu";
|
||||||
operating-points-v2 = <&cpu0_opp_table>;
|
operating-points-v2 = <&cpu0_opp_table>;
|
||||||
cooling-min-level = <13>;
|
|
||||||
cooling-max-level = <7>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -77,8 +77,6 @@
|
||||||
300000 937500
|
300000 937500
|
||||||
200000 925000
|
200000 925000
|
||||||
>;
|
>;
|
||||||
cooling-min-level = <15>;
|
|
||||||
cooling-max-level = <9>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
};
|
};
|
||||||
cpu@1 {
|
cpu@1 {
|
||||||
|
|
|
@ -30,8 +30,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -43,8 +41,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -56,8 +52,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -69,8 +63,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -83,8 +75,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <7>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -96,8 +86,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <7>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -109,8 +97,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <7>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -122,8 +108,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <7>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -29,8 +29,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -42,8 +40,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -55,8 +51,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -68,8 +62,6 @@
|
||||||
clock-frequency = <1000000000>;
|
clock-frequency = <1000000000>;
|
||||||
cci-control-port = <&cci_control0>;
|
cci-control-port = <&cci_control0>;
|
||||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <11>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <539>;
|
capacity-dmips-mhz = <539>;
|
||||||
};
|
};
|
||||||
|
@ -82,8 +74,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <15>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -95,8 +85,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <15>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -108,8 +96,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <15>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
@ -121,8 +107,6 @@
|
||||||
clock-frequency = <1800000000>;
|
clock-frequency = <1800000000>;
|
||||||
cci-control-port = <&cci_control1>;
|
cci-control-port = <&cci_control1>;
|
||||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||||
cooling-min-level = <0>;
|
|
||||||
cooling-max-level = <15>;
|
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in a new issue