ath9k: separate core driver and hw timer code
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -4136,9 +4136,10 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
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return timer;
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}
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void ath_gen_timer_start(struct ath_hw *ah,
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void ath9k_hw_gen_timer_start(struct ath_hw *ah,
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struct ath_gen_timer *timer,
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u32 timer_next, u32 timer_period)
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u32 timer_next,
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u32 timer_period)
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{
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struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
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u32 tsf;
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@ -4173,15 +4174,9 @@ void ath_gen_timer_start(struct ath_hw *ah,
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REG_SET_BIT(ah, AR_IMR_S5,
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(SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
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SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
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if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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}
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}
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void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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{
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struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
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@ -4200,13 +4195,6 @@ void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
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clear_bit(timer->index, &timer_table->timer_mask.timer_bits);
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/* if no timer is enabled, turn off interrupt mask */
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if (timer_table->timer_mask.val == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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}
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}
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void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer)
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@ -682,9 +682,12 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
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void (*overflow)(void *),
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void *arg,
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u8 timer_index);
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void ath_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer,
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u32 timer_next, u32 timer_period);
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void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer);
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void ath9k_hw_gen_timer_start(struct ath_hw *ah,
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struct ath_gen_timer *timer,
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u32 timer_next,
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u32 timer_period);
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void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer);
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void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
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void ath_gen_timer_isr(struct ath_hw *hw);
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u32 ath9k_hw_gettsf32(struct ath_hw *ah);
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@ -1408,6 +1408,34 @@ static void ath9k_btcoex_bt_stomp(struct ath_softc *sc,
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ath9k_hw_btcoex_enable(ah);
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}
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static void ath9k_gen_timer_start(struct ath_hw *ah,
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struct ath_gen_timer *timer,
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u32 timer_next,
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u32 timer_period)
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{
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ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
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if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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}
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}
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static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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{
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struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
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ath9k_hw_gen_timer_stop(ah, timer);
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/* if no timer is enabled, turn off interrupt mask */
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if (timer_table->timer_mask.val == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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}
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}
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/*
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* This is the master bt coex timer which runs for every
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* 45ms, bt traffic will be given priority during 55% of this
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@ -1429,9 +1457,9 @@ static void ath_btcoex_period_timer(unsigned long data)
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if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(ah, btcoex->no_stomp_timer);
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ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
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ath_gen_timer_start(ah,
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ath9k_gen_timer_start(ah,
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btcoex->no_stomp_timer,
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(ath9k_hw_gettsf32(ah) +
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btcoex->btcoex_no_stomp),
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@ -2165,7 +2193,7 @@ static void ath9k_btcoex_timer_resume(struct ath_softc *sc)
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/* make sure duty cycle timer is also stopped when resuming */
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
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ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
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btcoex->bt_priority_cnt = 0;
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btcoex->bt_priority_time = jiffies;
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@ -2407,7 +2435,7 @@ static void ath9k_btcoex_timer_pause(struct ath_softc *sc)
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del_timer_sync(&btcoex->period_timer);
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(ah, btcoex->no_stomp_timer);
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ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
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btcoex->hw_timer_enabled = false;
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}
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