MLK-17305 [MX8QXP-MEK] VPU: "couldn't set vpu_dec_clk clk rate to
600000000 (-22)" and "clk: couldn't set vpu_enc_clk clk rate to 600000000 (-22), current rate: 0" when boot up. 100% vpu clock is not settable, remove the assigned-clock-rates from the dts Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>pull/10/head
parent
3baeaa6328
commit
cfbc7684a1
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@ -3113,7 +3113,6 @@
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clocks = <&clk IMX8QXP_VPU_DEC_CLK>;
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clocks = <&clk IMX8QXP_VPU_DEC_CLK>;
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clock-names = "vpu_clk";
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clock-names = "vpu_clk";
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assigned-clocks = <&clk IMX8QXP_VPU_DEC_CLK>;
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assigned-clocks = <&clk IMX8QXP_VPU_DEC_CLK>;
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assigned-clock-rates = <600000000>;
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power-domains = <&pd_vpu_dec>;
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power-domains = <&pd_vpu_dec>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -3127,7 +3126,6 @@
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clocks = <&clk IMX8QXP_VPU_ENC_CLK>;
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clocks = <&clk IMX8QXP_VPU_ENC_CLK>;
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clock-names = "vpu_encoder_clk";
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clock-names = "vpu_encoder_clk";
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assigned-clocks = <&clk IMX8QXP_VPU_ENC_CLK>;
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assigned-clocks = <&clk IMX8QXP_VPU_ENC_CLK>;
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assigned-clock-rates = <600000000>;
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power-domains = <&pd_vpu_enc>;
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power-domains = <&pd_vpu_enc>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -1814,6 +1814,8 @@ static void vpu_api_event_handler(struct vpu_ctx *ctx, u_int32 uStrIdx, u_int32
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} break;
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} break;
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case VID_API_EVENT_FIRMWARE_XCPT:
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case VID_API_EVENT_FIRMWARE_XCPT:
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vpu_dbg(LVL_ERR, "warning: FIRMWARE hang, and send event VID_API_EVENT_FIRMWARE_XCPT\n");
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vpu_dbg(LVL_ERR, "warning: FIRMWARE hang, and send event VID_API_EVENT_FIRMWARE_XCPT\n");
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case VID_API_EVENT_DEC_CFG_INFO:
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break;
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default:
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default:
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vpu_dbg(LVL_ERR, "warning: uEvent %d is not handled\n", uEvent);
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vpu_dbg(LVL_ERR, "warning: uEvent %d is not handled\n", uEvent);
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break;
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break;
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