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MLK-19317-1 drm/bridge: sec-dsim: add missing 'ctrail' assignment 

In the macro 'DSIM_DPHY_TIMING' definition, the field
'clk_trail' assignment to 'ctrail' is missing which
certainly needs to be added.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f2818410d3d8d3b09002a85b593cee192d60bb06)
pull/10/head
Fancy Fang 2018-08-30 17:45:47 +08:00 committed by Jason Liu
parent ea4267306b
commit cfd20952d2
1 changed files with 1 additions and 0 deletions
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include/drm/bridge/sec_mipi_dsim.h
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@ -54,6 +54,7 @@ struct sec_mipi_dsim_dphy_timing {
.clk_prepare = cpre, \
.clk_zero = czero, \
.clk_post = cpost, \
.clk_trail = ctrail, \
.hs_prepare = hpre, \
.hs_zero = hzero, \
.hs_trail = htrail, \