x86, irq: Keep balance of IOAPIC pin reference count
To keep balance of IOAPIC pin reference count, we need to protect pirq_enable_irq(), acpi_pci_irq_enable() and intel_mid_pci_irq_enable() from reentrance. There are two cases which will cause reentrance. The first case is caused by suspend/hibernation. If pcibios_disable_irq is called during suspending/hibernating, we don't release the assigned IRQ number, otherwise it may break the suspend/hibernation. So late when pcibios_enable_irq is called during resume, we shouldn't allocate IRQ number again. The second case is that function acpi_pci_irq_enable() may be called twice for PCI devices present at boot time as below: 1) pci_acpi_init() --> acpi_pci_irq_enable() if pci_routeirq is true 2) pci_enable_device() --> pcibios_enable_device() --> acpi_pci_irq_enable() We can't kill kernel parameter pci_routeirq yet because it's still needed for debugging purpose. So flag irq_managed is introduced to track whether IRQ number is assigned by OS and to protect pirq_enable_irq(), acpi_pci_irq_enable() and intel_mid_pci_irq_enable() from reentrance. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Len Brown <lenb@kernel.org> Link: http://lkml.kernel.org/r/1414387308-27148-13-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -210,6 +210,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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{
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int polarity;
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
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polarity = 0; /* active high */
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else
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@ -224,13 +227,18 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC) < 0)
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return -EBUSY;
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dev->irq_managed = 1;
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return 0;
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}
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static void intel_mid_pci_irq_disable(struct pci_dev *dev)
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{
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if (!mp_should_keep_irq(&dev->dev) && dev->irq > 0)
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if (!mp_should_keep_irq(&dev->dev) && dev->irq_managed &&
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dev->irq > 0) {
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mp_unmap_irq(dev->irq);
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dev->irq_managed = 0;
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}
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}
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struct pci_ops intel_mid_pci_ops = {
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@ -1202,6 +1202,9 @@ static int pirq_enable_irq(struct pci_dev *dev)
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int irq;
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struct io_apic_irq_attr irq_attr;
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
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PCI_SLOT(dev->devfn),
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pin - 1, &irq_attr);
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@ -1228,6 +1231,7 @@ static int pirq_enable_irq(struct pci_dev *dev)
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}
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dev = temp_dev;
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if (irq >= 0) {
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dev->irq_managed = 1;
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dev->irq = irq;
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dev_info(&dev->dev, "PCI->APIC IRQ transform: "
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"INT %c -> IRQ %d\n", 'A' + pin - 1, irq);
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@ -1269,8 +1273,9 @@ bool mp_should_keep_irq(struct device *dev)
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static void pirq_disable_irq(struct pci_dev *dev)
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{
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if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
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dev->irq) {
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dev->irq_managed && dev->irq) {
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mp_unmap_irq(dev->irq);
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dev->irq = 0;
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dev->irq_managed = 0;
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}
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}
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@ -413,6 +413,9 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
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return 0;
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}
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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entry = acpi_pci_irq_lookup(dev, pin);
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if (!entry) {
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/*
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@ -456,6 +459,7 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
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return rc;
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}
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dev->irq = rc;
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dev->irq_managed = 1;
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if (link)
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snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
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@ -478,7 +482,7 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
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u8 pin;
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pin = dev->pin;
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if (!pin)
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if (!pin || !dev->irq_managed || dev->irq <= 0)
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return;
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/* Keep IOAPIC pin configuration when suspending */
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@ -506,6 +510,9 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
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*/
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dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
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if (gsi >= 0 && dev->irq > 0)
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if (gsi >= 0) {
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acpi_unregister_gsi(gsi);
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dev->irq = 0;
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dev->irq_managed = 0;
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}
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}
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@ -349,6 +349,7 @@ struct pci_dev {
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unsigned int __aer_firmware_first:1;
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unsigned int broken_intx_masking:1;
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unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
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unsigned int irq_managed:1;
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pci_dev_flags_t dev_flags;
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atomic_t enable_cnt; /* pci_enable_device has been called */
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