dts: arm64: imx8qm: Add ESAI node, fix SAI clocks
Add ESAI node and the related EDMA configuration: channels and interrupts. Use a proper index name for SAI clocks. Add the missing compatible string in the ESAI documentation. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>pull/10/head
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c85e0c8183
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d082b76e48
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@ -7,8 +7,8 @@ other DSPs. It has up to six transmitters and four receivers.
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Required properties:
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- compatible : Compatible list, must contain "fsl,imx35-esai" or
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"fsl,vf610-esai"
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- compatible : Compatible list, must contain "fsl,imx6ull-esai",
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"fsl,imx35-esai" or "fsl,vf610-esai"
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- reg : Offset and length of the register set for the device.
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@ -1070,29 +1070,34 @@
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};
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edma2: dma-controller@591F0000 {
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compatible = "fsl,imx8qm-edma";
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compatible = "fsl,imx8qm-adma";
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reg = <0x0 0x59200000 0x0 0x10000>,
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<0x0 0x59210000 0x0 0x10000>,
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<0x0 0x59220000 0x0 0x10000>,
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<0x0 0x59230000 0x0 0x10000>,
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<0x0 0x59240000 0x0 0x10000>,
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<0x0 0x59250000 0x0 0x10000>,
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<0x0 0x59260000 0x0 0x10000>,
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<0x0 0x59270000 0x0 0x10000>,
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<0x0 0x592c0000 0x0 0x10000>,
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<0x0 0x592d0000 0x0 0x10000>;
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#dma-cells = <3>;
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shared-interrupt;
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dma-channels = <8>;
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dma-channels = <10>;
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interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-chan0-tx", "edma-chan1-tx",
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"edma-chan2-tx", "edma-chan3-tx",
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"edma-chan4-tx", "edma-chan5-tx",
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"edma-chan6-tx", "edma-chan7-tx",
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"edma-chan12-tx", "edma-chan13-tx";
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status = "okay";
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};
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@ -1364,13 +1369,28 @@
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status = "disabled";
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};
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esai0: esai@59010000 {
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compatible = "fsl,imx6ull-esai";
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reg = <0x0 0x59010000 0x0 0x10000>;
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interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8QM_AUD_ESAI_0_IPG>,
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<&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>,
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<&clk IMX8QM_CLK_DUMMY>,
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<&clk IMX8QM_CLK_DUMMY>;
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clock-names = "core", "extal", "fsys", "spba";
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dmas = <&edma2 6 0 1>, <&edma2 7 0 0>;
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dma-names = "rx", "tx";
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power-domains = <&pd_esai0>;
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status = "disabled";
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};
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sai0: sai@59040000 {
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compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
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reg = <0x0 0x59040000 0x0 0x10000>;
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interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8QM_AUD_SAI_0_IPG>,
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<&clk IMX8QM_AUD_SAI_0_MCLK>,
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<&clk 0>, <&clk 0>;
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<&clk IMX8QM_AUD_SAI_0_MCLK>,
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<&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dma-names = "rx", "tx";
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dmas = <&edma2 12 0 1>, <&edma2 13 0 0>;
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