powerpc/fsl: Refactor device bindings
Moved Freescale SoC related bindings out of booting-without-of.txt and into their own files. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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29
Documentation/powerpc/dts-bindings/fsl/board.txt
Normal file
29
Documentation/powerpc/dts-bindings/fsl/board.txt
Normal file
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* Board Control and Status (BCSR)
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Required properties:
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- device_type : Should be "board-control"
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- reg : Offset and length of the register set for the device
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Example:
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bcsr@f8000000 {
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device_type = "board-control";
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reg = <f8000000 8000>;
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};
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* Freescale on board FPGA
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This is the memory-mapped registers for on board FPGA.
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Required properities:
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- compatible : should be "fsl,fpga-pixis".
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- reg : should contain the address and the lenght of the FPPGA register
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set.
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Example (MPC8610HPCD):
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board-control@e8000000 {
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compatible = "fsl,fpga-pixis";
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reg = <0xe8000000 32>;
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};
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67
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt
Normal file
67
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt
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* Freescale Communications Processor Module
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NOTE: This is an interim binding, and will likely change slightly,
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as more devices are supported. The QE bindings especially are
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incomplete.
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* Root CPM node
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Properties:
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- compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
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- reg : A 48-byte region beginning with CPCR.
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Example:
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
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reg = <119c0 30>;
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}
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* Properties common to mulitple CPM/QE devices
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- fsl,cpm-command : This value is ORed with the opcode and command flag
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to specify the device on which a CPM command operates.
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- fsl,cpm-brg : Indicates which baud rate generator the device
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is associated with. If absent, an unused BRG
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should be dynamically allocated. If zero, the
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device uses an external clock rather than a BRG.
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- reg : Unless otherwise specified, the first resource represents the
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scc/fcc/ucc registers, and the second represents the device's
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parameter RAM region (if it has one).
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* Multi-User RAM (MURAM)
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The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
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Ranges must be set up subject to the following restrictions:
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- Children's reg nodes must be offsets from the start of all muram, even
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if the user-data area does not begin at zero.
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- If multiple range entries are used, the difference between the parent
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address and the child address must be the same in all, so that a single
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mapping can cover them all while maintaining the ability to determine
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CPM-side offsets with pointer subtraction. It is recommended that
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multiple range entries not be used.
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- A child address of zero must be translatable, even if no reg resources
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contain it.
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A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
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indicate the portion of muram that is usable by the OS for arbitrary
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purposes. The data node may have an arbitrary number of reg resources,
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all of which contribute to the allocatable muram pool.
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Example, based on mpc8272:
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muram@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0 2000 9800 800>;
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};
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};
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21
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt
Normal file
21
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt
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* Baud Rate Generators
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Currently defined compatibles:
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fsl,cpm-brg
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fsl,cpm1-brg
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fsl,cpm2-brg
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Properties:
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- reg : There may be an arbitrary number of reg resources; BRG
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numbers are assigned to these in order.
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- clock-frequency : Specifies the base frequency driving
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the BRG.
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Example:
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brg@119f0 {
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compatible = "fsl,mpc8272-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <119f0 10 115f0 10>;
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clock-frequency = <d#25000000>;
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};
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41
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt
Normal file
41
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt
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* I2C
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The I2C controller is expressed as a bus under the CPM node.
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Properties:
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- compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
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- reg : On CPM2 devices, the second resource doesn't specify the I2C
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Parameter RAM itself, but the I2C_BASE field of the CPM2 Parameter RAM
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(typically 0x8afc 0x2).
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- #address-cells : Should be one. The cell is the i2c device address with
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the r/w bit set to zero.
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- #size-cells : Should be zero.
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- clock-frequency : Can be used to set the i2c clock frequency. If
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unspecified, a default frequency of 60kHz is being used.
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The following two properties are deprecated. They are only used by legacy
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i2c drivers to find the bus to probe:
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- linux,i2c-index : Can be used to hard code an i2c bus number. By default,
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the bus number is dynamically assigned by the i2c core.
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- linux,i2c-class : Can be used to override the i2c class. The class is used
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by legacy i2c device drivers to find a bus in a specific context like
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system management, video or sound. By default, I2C_CLASS_HWMON (1) is
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being used. The definition of the classes can be found in
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include/i2c/i2c.h
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Example, based on mpc823:
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i2c@860 {
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compatible = "fsl,mpc823-i2c",
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"fsl,cpm1-i2c";
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reg = <0x860 0x20 0x3c80 0x30>;
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interrupts = <16>;
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interrupt-parent = <&CPM_PIC>;
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fsl,cpm-command = <0x10>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@68 {
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compatible = "dallas,ds1307";
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reg = <0x68>;
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};
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};
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18
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt
Normal file
18
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt
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* Interrupt Controllers
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Currently defined compatibles:
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- fsl,cpm1-pic
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- only one interrupt cell
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- fsl,pq1-pic
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- fsl,cpm2-pic
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- second interrupt cell is level/sense:
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- 2 is falling edge
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- 8 is active low
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Example:
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interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <10c00 80>;
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compatible = "mpc8272-pic", "fsl,cpm2-pic";
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};
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15
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt
Normal file
15
Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt
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* USB (Universal Serial Bus Controller)
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Properties:
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- compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
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Example:
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usb@11bc0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,cpm2-usb";
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reg = <11b60 18 8b00 100>;
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interrupts = <b 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-command = <2e600000>;
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};
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45
Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt
Normal file
45
Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt
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* Network
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Currently defined compatibles:
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- fsl,cpm1-scc-enet
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- fsl,cpm2-scc-enet
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- fsl,cpm1-fec-enet
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- fsl,cpm2-fcc-enet (third resource is GFEMR)
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- fsl,qe-enet
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Example:
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ethernet@11300 {
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device_type = "network";
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <11300 20 8400 100 11390 1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <20 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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fsl,cpm-command = <12000300>;
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};
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* MDIO
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Currently defined compatibles:
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fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
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fsl,cpm2-mdio-bitbang (reg is port C registers)
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Properties for fsl,cpm2-mdio-bitbang:
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fsl,mdio-pin : pin of port C controlling mdio data
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fsl,mdc-pin : pin of port C controlling mdio clock
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Example:
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mdio@10d40 {
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device_type = "mdio";
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compatible = "fsl,mpc8272ads-mdio-bitbang",
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"fsl,mpc8272-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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reg = <10d40 14>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsl,mdio-pin = <12>;
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fsl,mdc-pin = <13>;
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};
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58
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
Normal file
58
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
Normal file
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* Freescale QUICC Engine module (QE)
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This represents qe module that is installed on PowerQUICC II Pro.
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NOTE: This is an interim binding; it should be updated to fit
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in with the CPM binding later in this document.
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Basically, it is a bus of devices, that could act more or less
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as a complete entity (UCC, USB etc ). All of them should be siblings on
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the "root" qe node, using the common properties from there.
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The description below applies to the qe of MPC8360 and
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more nodes and properties would be extended in the future.
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i) Root QE device
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Required properties:
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- compatible : should be "fsl,qe";
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- model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
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- reg : offset and length of the device registers.
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- bus-frequency : the clock frequency for QUICC Engine.
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Recommended properties
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- brg-frequency : the internal clock source frequency for baud-rate
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generators in Hz.
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Example:
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qe@e0100000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,qe";
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ranges = <0 e0100000 00100000>;
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reg = <e0100000 480>;
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brg-frequency = <0>;
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bus-frequency = <179A7B00>;
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}
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* Multi-User RAM (MURAM)
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Required properties:
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- compatible : should be "fsl,qe-muram", "fsl,cpm-muram".
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- mode : the could be "host" or "slave".
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- ranges : Should be defined as specified in 1) to describe the
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translation of MURAM addresses.
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- data-only : sub-node which defines the address area under MURAM
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bus that can be allocated as data/parameter
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Example:
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muram@10000 {
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compatible = "fsl,qe-muram", "fsl,cpm-muram";
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ranges = <0 00010000 0000c000>;
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data-only@0{
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compatible = "fsl,qe-muram-data",
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"fsl,cpm-muram-data";
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reg = <0 c000>;
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};
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};
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@ -0,0 +1,24 @@
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* Uploaded QE firmware
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If a new firwmare has been uploaded to the QE (usually by the
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boot loader), then a 'firmware' child node should be added to the QE
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node. This node provides information on the uploaded firmware that
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device drivers may need.
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Required properties:
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- id: The string name of the firmware. This is taken from the 'id'
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member of the qe_firmware structure of the uploaded firmware.
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Device drivers can search this string to determine if the
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firmware they want is already present.
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- extended-modes: The Extended Modes bitfield, taken from the
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firmware binary. It is a 64-bit number represented
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as an array of two 32-bit numbers.
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- virtual-traps: The virtual traps, taken from the firmware binary.
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It is an array of 8 32-bit numbers.
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Example:
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firmware {
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id = "Soft-UART";
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extended-modes = <0 0>;
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virtual-traps = <0 0 0 0 0 0 0 0>;
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};
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51
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt
Normal file
51
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt
Normal file
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* Parallel I/O Ports
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This node configures Parallel I/O ports for CPUs with QE support.
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The node should reside in the "soc" node of the tree. For each
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device that using parallel I/O ports, a child node should be created.
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See the definition of the Pin configuration nodes below for more
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information.
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Required properties:
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- device_type : should be "par_io".
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- reg : offset to the register set and its length.
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- num-ports : number of Parallel I/O ports
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Example:
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par_io@1400 {
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reg = <1400 100>;
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "par_io";
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num-ports = <7>;
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ucc_pin@01 {
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......
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};
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Note that "par_io" nodes are obsolete, and should not be used for
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the new device trees. Instead, each Par I/O bank should be represented
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via its own gpio-controller node:
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Required properties:
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- #gpio-cells : should be "2".
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- compatible : should be "fsl,<chip>-qe-pario-bank",
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"fsl,mpc8323-qe-pario-bank".
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- reg : offset to the register set and its length.
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- gpio-controller : node to identify gpio controllers.
|
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Example:
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qe_pio_a: gpio-controller@1400 {
|
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360-qe-pario-bank",
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"fsl,mpc8323-qe-pario-bank";
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reg = <0x1400 0x18>;
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gpio-controller;
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};
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qe_pio_e: gpio-controller@1460 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360-qe-pario-bank",
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"fsl,mpc8323-qe-pario-bank";
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reg = <0x1460 0x18>;
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gpio-controller;
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};
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60
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt
Normal file
60
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt
Normal file
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* Pin configuration nodes
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Required properties:
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- linux,phandle : phandle of this node; likely referenced by a QE
|
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device.
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- pio-map : array of pin configurations. Each pin is defined by 6
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integers. The six numbers are respectively: port, pin, dir,
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open_drain, assignment, has_irq.
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- port : port number of the pin; 0-6 represent port A-G in UM.
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- pin : pin number in the port.
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- dir : direction of the pin, should encode as follows:
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0 = The pin is disabled
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1 = The pin is an output
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2 = The pin is an input
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3 = The pin is I/O
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- open_drain : indicates the pin is normal or wired-OR:
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0 = The pin is actively driven as an output
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1 = The pin is an open-drain driver. As an output, the pin is
|
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driven active-low, otherwise it is three-stated.
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- assignment : function number of the pin according to the Pin Assignment
|
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tables in User Manual. Each pin can have up to 4 possible functions in
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QE and two options for CPM.
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- has_irq : indicates if the pin is used as source of external
|
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interrupts.
|
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|
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Example:
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ucc_pin@01 {
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linux,phandle = <140001>;
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pio-map = <
|
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/* port pin dir open_drain assignment has_irq */
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0 3 1 0 1 0 /* TxD0 */
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0 4 1 0 1 0 /* TxD1 */
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0 5 1 0 1 0 /* TxD2 */
|
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0 6 1 0 1 0 /* TxD3 */
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1 6 1 0 3 0 /* TxD4 */
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1 7 1 0 1 0 /* TxD5 */
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1 9 1 0 2 0 /* TxD6 */
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1 a 1 0 2 0 /* TxD7 */
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0 9 2 0 1 0 /* RxD0 */
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0 a 2 0 1 0 /* RxD1 */
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||||
0 b 2 0 1 0 /* RxD2 */
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||||
0 c 2 0 1 0 /* RxD3 */
|
||||
0 d 2 0 1 0 /* RxD4 */
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1 1 2 0 2 0 /* RxD5 */
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||||
1 0 2 0 2 0 /* RxD6 */
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||||
1 4 2 0 2 0 /* RxD7 */
|
||||
0 7 1 0 1 0 /* TX_EN */
|
||||
0 8 1 0 1 0 /* TX_ER */
|
||||
0 f 2 0 1 0 /* RX_DV */
|
||||
0 10 2 0 1 0 /* RX_ER */
|
||||
0 0 2 0 1 0 /* RX_CLK */
|
||||
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
|
||||
2 8 2 0 1 0>; /* GTX125 - CLK9 */
|
||||
};
|
||||
|
||||
|
70
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt
Normal file
70
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt
Normal file
|
@ -0,0 +1,70 @@
|
|||
* UCC (Unified Communications Controllers)
|
||||
|
||||
Required properties:
|
||||
- device_type : should be "network", "hldc", "uart", "transparent"
|
||||
"bisync", "atm", or "serial".
|
||||
- compatible : could be "ucc_geth" or "fsl_atm" and so on.
|
||||
- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
|
||||
- reg : Offset and length of the register set for the device
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- pio-handle : The phandle for the Parallel I/O port configuration.
|
||||
- port-number : for UART drivers, the port number to use, between 0 and 3.
|
||||
This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
|
||||
The port number is added to the minor number of the device. Unlike the
|
||||
CPM UART driver, the port-number is required for the QE UART driver.
|
||||
- soft-uart : for UART drivers, if specified this means the QE UART device
|
||||
driver should use "Soft-UART" mode, which is needed on some SOCs that have
|
||||
broken UART hardware. Soft-UART is provided via a microcode upload.
|
||||
- rx-clock-name: the UCC receive clock source
|
||||
"none": clock source is disabled
|
||||
"brg1" through "brg16": clock source is BRG1-BRG16, respectively
|
||||
"clk1" through "clk24": clock source is CLK1-CLK24, respectively
|
||||
- tx-clock-name: the UCC transmit clock source
|
||||
"none": clock source is disabled
|
||||
"brg1" through "brg16": clock source is BRG1-BRG16, respectively
|
||||
"clk1" through "clk24": clock source is CLK1-CLK24, respectively
|
||||
The following two properties are deprecated. rx-clock has been replaced
|
||||
with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
|
||||
Drivers that currently use the deprecated properties should continue to
|
||||
do so, in order to support older device trees, but they should be updated
|
||||
to check for the new properties first.
|
||||
- rx-clock : represents the UCC receive clock source.
|
||||
0x00 : clock source is disabled;
|
||||
0x1~0x10 : clock source is BRG1~BRG16 respectively;
|
||||
0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
|
||||
- tx-clock: represents the UCC transmit clock source;
|
||||
0x00 : clock source is disabled;
|
||||
0x1~0x10 : clock source is BRG1~BRG16 respectively;
|
||||
0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
|
||||
|
||||
Required properties for network device_type:
|
||||
- mac-address : list of bytes representing the ethernet address.
|
||||
- phy-handle : The phandle for the PHY connected to this controller.
|
||||
|
||||
Recommended properties:
|
||||
- phy-connection-type : a string naming the controller/PHY interface type,
|
||||
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
|
||||
Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
|
||||
"tbi", or "rtbi".
|
||||
|
||||
Example:
|
||||
ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <1>;
|
||||
reg = <2000 200>;
|
||||
interrupts = <a0 0>;
|
||||
interrupt-parent = <700>;
|
||||
mac-address = [ 00 04 9f 00 23 23 ];
|
||||
rx-clock = "none";
|
||||
tx-clock = "clk9";
|
||||
phy-handle = <212000>;
|
||||
phy-connection-type = "gmii";
|
||||
pio-handle = <140001>;
|
||||
};
|
22
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt
Normal file
22
Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt
Normal file
|
@ -0,0 +1,22 @@
|
|||
* USB (Universal Serial Bus Controller)
|
||||
|
||||
Required properties:
|
||||
- compatible : could be "qe_udc" or "fhci-hcd".
|
||||
- mode : the could be "host" or "slave".
|
||||
- reg : Offset and length of the register set for the device
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
|
||||
Example(slave):
|
||||
usb@6c0 {
|
||||
compatible = "qe_udc";
|
||||
reg = <6c0 40>;
|
||||
interrupts = <8b 0>;
|
||||
interrupt-parent = <700>;
|
||||
mode = "slave";
|
||||
};
|
21
Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt
Normal file
21
Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt
Normal file
|
@ -0,0 +1,21 @@
|
|||
* Serial
|
||||
|
||||
Currently defined compatibles:
|
||||
- fsl,cpm1-smc-uart
|
||||
- fsl,cpm2-smc-uart
|
||||
- fsl,cpm1-scc-uart
|
||||
- fsl,cpm2-scc-uart
|
||||
- fsl,qe-uart
|
||||
|
||||
Example:
|
||||
|
||||
serial@11a00 {
|
||||
device_type = "serial";
|
||||
compatible = "fsl,mpc8272-scc-uart",
|
||||
"fsl,cpm2-scc-uart";
|
||||
reg = <11a00 20 8000 100>;
|
||||
interrupts = <28 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
fsl,cpm-brg = <1>;
|
||||
fsl,cpm-command = <00800000>;
|
||||
};
|
18
Documentation/powerpc/dts-bindings/fsl/diu.txt
Normal file
18
Documentation/powerpc/dts-bindings/fsl/diu.txt
Normal file
|
@ -0,0 +1,18 @@
|
|||
* Freescale Display Interface Unit
|
||||
|
||||
The Freescale DIU is a LCD controller, with proper hardware, it can also
|
||||
drive DVI monitors.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "fsl-diu".
|
||||
- reg : should contain at least address and length of the DIU register
|
||||
set.
|
||||
- Interrupts : one DIU interrupt should be describe here.
|
||||
|
||||
Example (MPC8610HPCD):
|
||||
display@2c000 {
|
||||
compatible = "fsl,diu";
|
||||
reg = <0x2c000 100>;
|
||||
interrupts = <72 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
127
Documentation/powerpc/dts-bindings/fsl/dma.txt
Normal file
127
Documentation/powerpc/dts-bindings/fsl/dma.txt
Normal file
|
@ -0,0 +1,127 @@
|
|||
* Freescale 83xx DMA Controller
|
||||
|
||||
Freescale PowerPC 83xx have on chip general purpose DMA controllers.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : compatible list, contains 2 entries, first is
|
||||
"fsl,CHIP-dma", where CHIP is the processor
|
||||
(mpc8349, mpc8360, etc.) and the second is
|
||||
"fsl,elo-dma"
|
||||
- reg : <registers mapping for DMA general status reg>
|
||||
- ranges : Should be defined as specified in 1) to describe the
|
||||
DMA controller channels.
|
||||
- cell-index : controller index. 0 for controller @ 0x8100
|
||||
- interrupts : <interrupt mapping for DMA IRQ>
|
||||
- interrupt-parent : optional, if needed for interrupt mapping
|
||||
|
||||
|
||||
- DMA channel nodes:
|
||||
- compatible : compatible list, contains 2 entries, first is
|
||||
"fsl,CHIP-dma-channel", where CHIP is the processor
|
||||
(mpc8349, mpc8350, etc.) and the second is
|
||||
"fsl,elo-dma-channel"
|
||||
- reg : <registers mapping for channel>
|
||||
- cell-index : dma channel index starts at 0.
|
||||
|
||||
Optional properties:
|
||||
- interrupts : <interrupt mapping for DMA channel IRQ>
|
||||
(on 83xx this is expected to be identical to
|
||||
the interrupts property of the parent node)
|
||||
- interrupt-parent : optional, if needed for interrupt mapping
|
||||
|
||||
Example:
|
||||
dma@82a8 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
|
||||
reg = <82a8 4>;
|
||||
ranges = <0 8100 1a4>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <47 8>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
|
||||
cell-index = <0>;
|
||||
reg = <0 80>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
|
||||
cell-index = <1>;
|
||||
reg = <80 80>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
|
||||
cell-index = <2>;
|
||||
reg = <100 80>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
|
||||
cell-index = <3>;
|
||||
reg = <180 80>;
|
||||
};
|
||||
};
|
||||
|
||||
* Freescale 85xx/86xx DMA Controller
|
||||
|
||||
Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : compatible list, contains 2 entries, first is
|
||||
"fsl,CHIP-dma", where CHIP is the processor
|
||||
(mpc8540, mpc8540, etc.) and the second is
|
||||
"fsl,eloplus-dma"
|
||||
- reg : <registers mapping for DMA general status reg>
|
||||
- cell-index : controller index. 0 for controller @ 0x21000,
|
||||
1 for controller @ 0xc000
|
||||
- ranges : Should be defined as specified in 1) to describe the
|
||||
DMA controller channels.
|
||||
|
||||
- DMA channel nodes:
|
||||
- compatible : compatible list, contains 2 entries, first is
|
||||
"fsl,CHIP-dma-channel", where CHIP is the processor
|
||||
(mpc8540, mpc8560, etc.) and the second is
|
||||
"fsl,eloplus-dma-channel"
|
||||
- cell-index : dma channel index starts at 0.
|
||||
- reg : <registers mapping for channel>
|
||||
- interrupts : <interrupt mapping for DMA channel IRQ>
|
||||
- interrupt-parent : optional, if needed for interrupt mapping
|
||||
|
||||
Example:
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
|
||||
reg = <21300 4>;
|
||||
ranges = <0 21100 200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
|
||||
reg = <0 80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <14 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
|
||||
reg = <80 80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <15 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
|
||||
reg = <100 80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
|
||||
reg = <180 80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <17 2>;
|
||||
};
|
||||
};
|
31
Documentation/powerpc/dts-bindings/fsl/gtm.txt
Normal file
31
Documentation/powerpc/dts-bindings/fsl/gtm.txt
Normal file
|
@ -0,0 +1,31 @@
|
|||
* Freescale General-purpose Timers Module
|
||||
|
||||
Required properties:
|
||||
- compatible : should be
|
||||
"fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs
|
||||
"fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs
|
||||
"fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs
|
||||
- reg : should contain gtm registers location and length (0x40).
|
||||
- interrupts : should contain four interrupts.
|
||||
- interrupt-parent : interrupt source phandle.
|
||||
- clock-frequency : specifies the frequency driving the timer.
|
||||
|
||||
Example:
|
||||
|
||||
timer@500 {
|
||||
compatible = "fsl,mpc8360-gtm", "fsl,gtm";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <90 8 78 8 84 8 72 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
timer@440 {
|
||||
compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";
|
||||
reg = <0x440 0x40>;
|
||||
interrupts = <12 13 14 15>;
|
||||
interrupt-parent = <&qeic>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
25
Documentation/powerpc/dts-bindings/fsl/guts.txt
Normal file
25
Documentation/powerpc/dts-bindings/fsl/guts.txt
Normal file
|
@ -0,0 +1,25 @@
|
|||
* Global Utilities Block
|
||||
|
||||
The global utilities block controls power management, I/O device
|
||||
enabling, power-on-reset configuration monitoring, general-purpose
|
||||
I/O signal configuration, alternate function selection for multiplexed
|
||||
signals, and clock control.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Should define the compatible device type for
|
||||
global-utilities.
|
||||
- reg : Offset and length of the register set for the device.
|
||||
|
||||
Recommended properties:
|
||||
|
||||
- fsl,has-rstcr : Indicates that the global utilities register set
|
||||
contains a functioning "reset control register" (i.e. the board
|
||||
is wired to reset upon setting the HRESET_REQ bit in this register).
|
||||
|
||||
Example:
|
||||
global-utilities@e0000 { /* global utilities block */
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <e0000 1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
32
Documentation/powerpc/dts-bindings/fsl/i2c.txt
Normal file
32
Documentation/powerpc/dts-bindings/fsl/i2c.txt
Normal file
|
@ -0,0 +1,32 @@
|
|||
* I2C
|
||||
|
||||
Required properties :
|
||||
|
||||
- device_type : Should be "i2c"
|
||||
- reg : Offset and length of the register set for the device
|
||||
|
||||
Recommended properties :
|
||||
|
||||
- compatible : Should be "fsl-i2c" for parts compatible with
|
||||
Freescale I2C specifications.
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- dfsrr : boolean; if defined, indicates that this I2C device has
|
||||
a digital filter sampling rate register
|
||||
- fsl5200-clocking : boolean; if defined, indicated that this device
|
||||
uses the FSL 5200 clocking mechanism.
|
||||
|
||||
Example :
|
||||
i2c@3000 {
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <1b 3>;
|
||||
reg = <3000 18>;
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
dfsrr;
|
||||
};
|
35
Documentation/powerpc/dts-bindings/fsl/lbc.txt
Normal file
35
Documentation/powerpc/dts-bindings/fsl/lbc.txt
Normal file
|
@ -0,0 +1,35 @@
|
|||
* Chipselect/Local Bus
|
||||
|
||||
Properties:
|
||||
- name : Should be localbus
|
||||
- #address-cells : Should be either two or three. The first cell is the
|
||||
chipselect number, and the remaining cells are the
|
||||
offset into the chipselect.
|
||||
- #size-cells : Either one or two, depending on how large each chipselect
|
||||
can be.
|
||||
- ranges : Each range corresponds to a single chipselect, and cover
|
||||
the entire access window as configured.
|
||||
|
||||
Example:
|
||||
localbus@f0010100 {
|
||||
compatible = "fsl,mpc8272-localbus",
|
||||
"fsl,pq2-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <f0010100 40>;
|
||||
|
||||
ranges = <0 0 fe000000 02000000
|
||||
1 0 f4500000 00008000>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "jedec-flash";
|
||||
reg = <0 0 2000000>;
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
board-control@1,0 {
|
||||
reg = <1 0 20>;
|
||||
compatible = "fsl,mpc8272ads-bcsr";
|
||||
};
|
||||
};
|
36
Documentation/powerpc/dts-bindings/fsl/msi-pic.txt
Normal file
36
Documentation/powerpc/dts-bindings/fsl/msi-pic.txt
Normal file
|
@ -0,0 +1,36 @@
|
|||
* Freescale MSI interrupt controller
|
||||
|
||||
Reguired properities:
|
||||
- compatible : compatible list, contains 2 entries,
|
||||
first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
|
||||
etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
|
||||
the parent type.
|
||||
- reg : should contain the address and the length of the shared message
|
||||
interrupt register set.
|
||||
- msi-available-ranges: use <start count> style section to define which
|
||||
msi interrupt can be used in the 256 msi interrupts. This property is
|
||||
optional, without this, all the 256 MSI interrupts can be used.
|
||||
- interrupts : each one of the interrupts here is one entry per 32 MSIs,
|
||||
and routed to the host interrupt controller. the interrupts should
|
||||
be set as edge sensitive.
|
||||
- interrupt-parent: the phandle for the interrupt controller
|
||||
that services interrupts for this device. for 83xx cpu, the interrupts
|
||||
are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed
|
||||
to MPIC.
|
||||
|
||||
Example:
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
29
Documentation/powerpc/dts-bindings/fsl/sata.txt
Normal file
29
Documentation/powerpc/dts-bindings/fsl/sata.txt
Normal file
|
@ -0,0 +1,29 @@
|
|||
* Freescale 8xxx/3.0 Gb/s SATA nodes
|
||||
|
||||
SATA nodes are defined to describe on-chip Serial ATA controllers.
|
||||
Each SATA port should have its own node.
|
||||
|
||||
Required properties:
|
||||
- compatible : compatible list, contains 2 entries, first is
|
||||
"fsl,CHIP-sata", where CHIP is the processor
|
||||
(mpc8315, mpc8379, etc.) and the second is
|
||||
"fsl,pq-sata"
|
||||
- interrupts : <interrupt mapping for SATA IRQ>
|
||||
- cell-index : controller index.
|
||||
1 for controller @ 0x18000
|
||||
2 for controller @ 0x19000
|
||||
3 for controller @ 0x1a000
|
||||
4 for controller @ 0x1b000
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent : optional, if needed for interrupt mapping
|
||||
- reg : <registers mapping>
|
||||
|
||||
Example:
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <2c 8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
};
|
24
Documentation/powerpc/dts-bindings/fsl/spi.txt
Normal file
24
Documentation/powerpc/dts-bindings/fsl/spi.txt
Normal file
|
@ -0,0 +1,24 @@
|
|||
* SPI (Serial Peripheral Interface)
|
||||
|
||||
Required properties:
|
||||
- cell-index : SPI controller index.
|
||||
- compatible : should be "fsl,spi".
|
||||
- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
|
||||
- reg : Offset and length of the register set for the device
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
|
||||
Example:
|
||||
spi@4c0 {
|
||||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <4c0 40>;
|
||||
interrupts = <82 0>;
|
||||
interrupt-parent = <700>;
|
||||
mode = "cpu";
|
||||
};
|
38
Documentation/powerpc/dts-bindings/fsl/ssi.txt
Normal file
38
Documentation/powerpc/dts-bindings/fsl/ssi.txt
Normal file
|
@ -0,0 +1,38 @@
|
|||
Freescale Synchronous Serial Interface
|
||||
|
||||
The SSI is a serial device that communicates with audio codecs. It can
|
||||
be programmed in AC97, I2S, left-justified, or right-justified modes.
|
||||
|
||||
Required properties:
|
||||
- compatible : compatible list, containing "fsl,ssi"
|
||||
- cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
|
||||
- reg : offset and length of the register set for the device
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and
|
||||
level information for the interrupt. This should be
|
||||
encoded based on the information in section 2)
|
||||
depending on the type of interrupt controller you
|
||||
have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- fsl,mode : the operating mode for the SSI interface
|
||||
"i2s-slave" - I2S mode, SSI is clock slave
|
||||
"i2s-master" - I2S mode, SSI is clock master
|
||||
"lj-slave" - left-justified mode, SSI is clock slave
|
||||
"lj-master" - l.j. mode, SSI is clock master
|
||||
"rj-slave" - right-justified mode, SSI is clock slave
|
||||
"rj-master" - r.j., SSI is clock master
|
||||
"ac97-slave" - AC97 mode, SSI is clock slave
|
||||
"ac97-master" - AC97 mode, SSI is clock master
|
||||
|
||||
Optional properties:
|
||||
- codec-handle : phandle to a 'codec' node that defines an audio
|
||||
codec connected to this SSI. This node is typically
|
||||
a child of an I2C or other control node.
|
||||
|
||||
Child 'codec' node required properties:
|
||||
- compatible : compatible list, contains the name of the codec
|
||||
|
||||
Child 'codec' node optional properties:
|
||||
- clock-frequency : The frequency of the input clock, which typically
|
||||
comes from an on-board dedicated oscillator.
|
69
Documentation/powerpc/dts-bindings/fsl/tsec.txt
Normal file
69
Documentation/powerpc/dts-bindings/fsl/tsec.txt
Normal file
|
@ -0,0 +1,69 @@
|
|||
* MDIO IO device
|
||||
|
||||
The MDIO is a bus to which the PHY devices are connected. For each
|
||||
device that exists on this bus, a child node should be created. See
|
||||
the definition of the PHY node below for an example of how to define
|
||||
a PHY.
|
||||
|
||||
Required properties:
|
||||
- reg : Offset and length of the register set for the device
|
||||
- compatible : Should define the compatible device type for the
|
||||
mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
|
||||
|
||||
Example:
|
||||
|
||||
mdio@24520 {
|
||||
reg = <24520 20>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
|
||||
ethernet-phy@0 {
|
||||
......
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
* Gianfar-compatible ethernet nodes
|
||||
|
||||
Required properties:
|
||||
|
||||
- device_type : Should be "network"
|
||||
- model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
|
||||
- compatible : Should be "gianfar"
|
||||
- reg : Offset and length of the register set for the device
|
||||
- mac-address : List of bytes representing the ethernet address of
|
||||
this controller
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- phy-handle : The phandle for the PHY connected to this ethernet
|
||||
controller.
|
||||
- fixed-link : <a b c d e> where a is emulated phy id - choose any,
|
||||
but unique to the all specified fixed-links, b is duplex - 0 half,
|
||||
1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
|
||||
pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
|
||||
|
||||
Recommended properties:
|
||||
|
||||
- phy-connection-type : a string naming the controller/PHY interface type,
|
||||
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
|
||||
"tbi", or "rtbi". This property is only really needed if the connection
|
||||
is of type "rgmii-id", as all other connection types are detected by
|
||||
hardware.
|
||||
|
||||
|
||||
Example:
|
||||
ethernet@24000 {
|
||||
#size-cells = <0>;
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <24000 1000>;
|
||||
mac-address = [ 00 E0 0C 00 73 00 ];
|
||||
interrupts = <d 3 e 3 12 3>;
|
||||
interrupt-parent = <40000>;
|
||||
phy-handle = <2452000>
|
||||
};
|
59
Documentation/powerpc/dts-bindings/fsl/usb.txt
Normal file
59
Documentation/powerpc/dts-bindings/fsl/usb.txt
Normal file
|
@ -0,0 +1,59 @@
|
|||
Freescale SOC USB controllers
|
||||
|
||||
The device node for a USB controller that is part of a Freescale
|
||||
SOC is as described in the document "Open Firmware Recommended
|
||||
Practice : Universal Serial Bus" with the following modifications
|
||||
and additions :
|
||||
|
||||
Required properties :
|
||||
- compatible : Should be "fsl-usb2-mph" for multi port host USB
|
||||
controllers, or "fsl-usb2-dr" for dual role USB controllers
|
||||
- phy_type : For multi port host USB controllers, should be one of
|
||||
"ulpi", or "serial". For dual role USB controllers, should be
|
||||
one of "ulpi", "utmi", "utmi_wide", or "serial".
|
||||
- reg : Offset and length of the register set for the device
|
||||
- port0 : boolean; if defined, indicates port0 is connected for
|
||||
fsl-usb2-mph compatible controllers. Either this property or
|
||||
"port1" (or both) must be defined for "fsl-usb2-mph" compatible
|
||||
controllers.
|
||||
- port1 : boolean; if defined, indicates port1 is connected for
|
||||
fsl-usb2-mph compatible controllers. Either this property or
|
||||
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
|
||||
controllers.
|
||||
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
|
||||
controllers. Can be "host", "peripheral", or "otg". Default to
|
||||
"host" if not defined for backward compatibility.
|
||||
|
||||
Recommended properties :
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
|
||||
Example multi port host USB controller device node :
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-mph";
|
||||
reg = <22000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <27 1>;
|
||||
phy_type = "ulpi";
|
||||
port0;
|
||||
port1;
|
||||
};
|
||||
|
||||
Example dual role USB controller device node :
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <23000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <26 1>;
|
||||
dr_mode = "otg";
|
||||
phy = "ulpi";
|
||||
};
|
Loading…
Reference in a new issue