Assorted bunch of 32bit Rockchip devicetree changes. More clocks,

nodes and fixes like the increased drive-strength on the firefly.
 Most interesting is maybe the enablement of the pl330 option
 for handling the broken flushp operation that is present on the
 current Rockchip SoCs. Together with the driver-side enablement
 this should give us working dma finally.
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Merge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.

* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
  ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
  dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
  ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
  ARM: dts: rockchip: support the spi for rk3036
  ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
  ARM: dts: rockchip: add the leds control for rk3036-kylin board
  ARM: dts: rockchip: add tsadc node
  clk: rockchip: Add new id for rk3066 tsadc clock
  ARM: dts: rockchip: add clock-cells for usb phy nodes
  ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
  ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
  ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
  dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
  ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
  ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
  ARM: dts: rockchip: add rk3288 mipi_dsi nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-02-24 13:52:42 -08:00
commit d16073d385
21 changed files with 389 additions and 35 deletions

View file

@ -13,6 +13,8 @@ Required Properties:
- "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
Optional Properties:
* clocks: from common clock binding: if ciu_drive and ciu_sample are

View file

@ -55,6 +55,7 @@
MATRIX_KEY(0x03, 0x04, KEY_F5)
MATRIX_KEY(0x03, 0x06, KEY_6)
MATRIX_KEY(0x03, 0x08, KEY_MINUS)
MATRIX_KEY(0x03, 0x09, KEY_F13)
MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
MATRIX_KEY(0x03, 0x0c, KEY_MUHENKAN)

View file

@ -46,6 +46,58 @@
model = "Rockchip RK3036 KylinBoard";
compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
leds: gpio-leds {
compatible = "gpio-leds";
work {
gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
label = "kylin:red:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
};
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&bt_wake_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - SDIO_RESET_L_WL_RST
* - SDIO_RESET_L_BT_EN
*/
reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
<&gpio0 27 GPIO_ACTIVE_LOW>, /* WL_RST */
<&gpio2 9 GPIO_ACTIVE_LOW>; /* BT_EN */
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rt5616-codec";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"MIC1", "Microphone Jack",
"MIC2", "Microphone Jack",
"Microphone Jack", "micbias1",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR";
simple-audio-card,cpu {
sound-dai = <&i2s>;
};
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
};
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@ -257,6 +309,19 @@
&i2c2 {
status = "okay";
rt5616: rt5616@1b {
compatible = "rt5616";
reg = <0x1b>;
clocks = <&cru SCLK_I2S_OUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
};
};
&i2s {
#sound-dai-cells = <0>;
status = "okay";
};
&sdio {
@ -264,13 +329,34 @@
broken-cd;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
default-sample-phase = <90>;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
};
&uart0 {
status = "okay";
};
&uart2 {
@ -286,12 +372,30 @@
};
&pinctrl {
leds {
led_ctl: led-ctl {
rockchip,pins = <2 30 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
bt_wake_h: bt-wake-h {
rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sleep {
global_pwroff: global-pwroff {
rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;

View file

@ -60,6 +60,7 @@
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
spi = &spi;
};
memory {
@ -105,6 +106,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC2>;
clock-names = "apb_pclk";
};
@ -161,7 +163,7 @@
};
usb_otg: usb@10180000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
"snps,dwc2";
reg = <0x10180000 0x40000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@ -176,7 +178,7 @@
};
usb_host: usb@101c0000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
"snps,dwc2";
reg = <0x101c0000 0x40000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
@ -211,7 +213,7 @@
};
emmc: dwmmc@1021c000 {
compatible = "rockchip,rk3288-dw-mshc";
compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x1021c000 0x4000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
broken-cd;
@ -241,8 +243,8 @@
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "i2s_hclk", "i2s_clk";
clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
dmas = <&pdma 0>, <&pdma 1>;
dma-names = "tx", "rx";
pinctrl-names = "default";
@ -327,7 +329,7 @@
};
i2c1: i2c@20056000 {
compatible = "rockchip,rk3288-i2c";
compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
reg = <0x20056000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -340,7 +342,7 @@
};
i2c2: i2c@2005a000 {
compatible = "rockchip,rk3288-i2c";
compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
reg = <0x2005a000 0x1000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -395,7 +397,7 @@
};
i2c0: i2c@20072000 {
compatible = "rockchip,rk3288-i2c";
compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
reg = <0x20072000 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -407,6 +409,21 @@
status = "disabled";
};
spi: spi@20074000 {
compatible = "rockchip,rockchip-spi";
reg = <0x20074000 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks =<&cru PCLK_SPI>, <&cru SCLK_SPI>;
clock-names = "apb-pclk","spi_pclk";
dmas = <&pdma 8>, <&pdma 9>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pinctrl: pinctrl {
compatible = "rockchip,rk3036-pinctrl";
rockchip,grf = <&grf>;
@ -579,12 +596,12 @@
i2s {
i2s_bus: i2s-bus {
rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_none>,
<1 1 RK_FUNC_1 &pcfg_pull_none>,
<1 2 RK_FUNC_1 &pcfg_pull_none>,
<1 3 RK_FUNC_1 &pcfg_pull_none>,
<1 4 RK_FUNC_1 &pcfg_pull_none>,
<1 5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
<1 1 RK_FUNC_1 &pcfg_pull_default>,
<1 2 RK_FUNC_1 &pcfg_pull_default>,
<1 3 RK_FUNC_1 &pcfg_pull_default>,
<1 4 RK_FUNC_1 &pcfg_pull_default>,
<1 5 RK_FUNC_1 &pcfg_pull_default>;
};
};
@ -618,5 +635,29 @@
};
/* no rts / cts for uart2 */
};
spi {
spi_txd:spi-txd {
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
};
spi_rxd:spi-rxd {
rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
};
spi_clk:spi-clk {
rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
};
spi_cs0:spi-cs0 {
rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
};
spi_cs1:spi-cs1 {
rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
};
};
};
};

View file

@ -53,6 +53,18 @@
reg = <0x60000000 0x40000000>;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm3 0 1000>;
regulator-name = "vdd_log";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
voltage-table = <1000000 100>,
<1200000 42>;
status = "okay";
};
vcc_sd0: fixed-regulator {
compatible = "regulator-fixed";
regulator-name = "sdmmc-supply";
@ -74,7 +86,7 @@
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
wakeup-source;
debounce-interval = <100>;
};
button@1 {
@ -82,7 +94,6 @@
linux,code = <104>;
label = "GPIO Key Vol-";
linux,input-type = <1>;
gpio-key,wakeup = <0>;
debounce-interval = <100>;
};
/* VOL+ comes somehow thru the ADC */
@ -203,6 +214,10 @@
disable-wp;
};
&pwm3 {
status = "okay";
};
&uart0 {
status = "okay";
};

View file

@ -52,6 +52,18 @@
reg = <0x60000000 0x40000000>;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm3 0 1000>;
regulator-name = "vdd_log";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
voltage-table = <1000000 100>,
<1200000 42>;
status = "okay";
};
vcc_sd0: sdmmc-regulator {
compatible = "regulator-fixed";
regulator-name = "sdmmc-supply";
@ -194,6 +206,10 @@
};
};
&pwm3 {
status = "okay";
};
&uart0 {
status = "okay";
};

View file

@ -65,7 +65,7 @@
#size-cells = <0>;
button@0 {
gpio-key,wakeup = <1>;
wakeup-source;
gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <116>;
@ -74,6 +74,18 @@
};
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm3 0 1000>;
regulator-name = "vdd_log";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
voltage-table = <1000000 100>,
<1200000 42>;
status = "okay";
};
vsys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vsys";
@ -431,6 +443,10 @@
status = "okay";
};
&pwm3 {
status = "okay";
};
&saradc {
vref-supply = <&vcc_25>;
status = "okay";

View file

@ -61,11 +61,13 @@
reg = <0x0>;
operating-points = <
/* kHz uV */
1008000 1075000
816000 1025000
600000 1025000
504000 1000000
312000 975000
1416000 1300000
1200000 1175000
1008000 1125000
816000 1125000
600000 1100000
504000 1100000
312000 1075000
>;
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
@ -188,6 +190,16 @@
clock-names = "timer", "pclk";
};
tsadc: tsadc@20060000 {
compatible = "rockchip,rk3066-tsadc";
reg = <0x20060000 0x100>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "saradc", "apb_pclk";
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
status = "disabled";
};
usbphy: phy {
compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
rockchip,grf = <&grf>;
@ -200,6 +212,7 @@
reg = <0x17c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
#clock-cells = <0>;
};
usbphy1: usb-phy1 {
@ -207,6 +220,7 @@
reg = <0x188>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
#clock-cells = <0>;
};
};

View file

@ -63,7 +63,7 @@
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
wakeup-source;
debounce-interval = <100>;
};
};

View file

@ -171,6 +171,7 @@
reg = <0x10c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
#clock-cells = <0>;
};
usbphy1: usb-phy1 {
@ -178,6 +179,7 @@
reg = <0x11c>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
#clock-cells = <0>;
};
};

View file

@ -110,7 +110,7 @@
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
wakeup-source;
debounce-interval = <100>;
};
};

View file

@ -91,7 +91,7 @@
#size-cells = <0>;
button@0 {
gpio-key,wakeup = <1>;
wakeup-source;
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <116>;
@ -408,6 +408,11 @@
output-low;
};
pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
bias-pull-up;
drive-strength = <12>;
};
act8846 {
pwr_hold: pwr-hold {
rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
@ -457,6 +462,25 @@
};
sdmmc {
/*
* Default drive strength isn't enough to achieve even
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
};

View file

@ -74,7 +74,7 @@
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
wakeup-source;
debounce-interval = <100>;
};
};

View file

@ -73,7 +73,7 @@
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
wakeup-source;
debounce-interval = <100>;
};
};

View file

@ -61,6 +61,31 @@
clock-output-names = "ext_gmac";
};
io_domains: io-domains {
compatible = "rockchip,rk3288-io-voltage-domain";
rockchip,grf = <&grf>;
audio-supply = <&vcc_io>;
bb-supply = <&vcc_io>;
dvp-supply = <&vcc_18>;
flash0-supply = <&vcc_flash>;
flash1-supply = <&vccio_pmu>;
gpio30-supply = <&vccio_pmu>;
gpio1830 = <&vcc_io>;
lcdc-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>;
};
vcc_flash: flash-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <150>;
vin-supply = <&vcc_io>;
};
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@ -85,6 +110,7 @@
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc_flash>;
status = "okay";
};

View file

@ -49,6 +49,22 @@
stdout-path = "serial2:115200n8";
};
gpio-leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
label = "rock2:green:state1";
linux,default-trigger = "heartbeat";
};
mmc {
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
label = "rock2:blue:state2";
linux,default-trigger = "mmc0";
};
};
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
@ -70,6 +86,15 @@
#sound-dai-cells = <0>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&hym8563>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable>;
reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
};
vcc_usb_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
@ -95,6 +120,21 @@
};
};
&sdio0 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc_18>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
@ -119,7 +159,7 @@
};
&i2c0 {
hym8563@51 {
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
@ -161,6 +201,12 @@
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_enable: wifi-enable {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&spdif {

View file

@ -108,7 +108,7 @@
lid {
label = "Lid";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
wakeup-source;
linux,code = <0>; /* SW_LID */
linux,input-type = <5>; /* EV_SW */
debounce-interval = <1>;

View file

@ -64,7 +64,7 @@
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
gpio-key,wakeup;
wakeup-source;
};
};
@ -340,11 +340,6 @@
i2c-scl-rising-time-ns = <1000>;
};
&power {
assigned-clocks = <&cru SCLK_EDP_24M>;
assigned-clock-parents = <&xin24m>;
};
&pwm1 {
status = "okay";
};

View file

@ -145,6 +145,7 @@
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC2>;
clock-names = "apb_pclk";
};
@ -155,6 +156,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC1>;
clock-names = "apb_pclk";
status = "disabled";
@ -166,6 +168,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC1>;
clock-names = "apb_pclk";
};
@ -630,6 +633,9 @@
#address-cells = <1>;
#size-cells = <0>;
assigned-clocks = <&cru SCLK_EDP_24M>;
assigned-clock-parents = <&xin24m>;
/*
* Note: Although SCLK_* are the working clocks
* of device without including on the NOC, needed for
@ -815,6 +821,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopb>;
};
vopb_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopb>;
};
};
};
@ -848,6 +858,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopl>;
};
vopl_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopl>;
};
};
};
@ -861,6 +875,37 @@
status = "disabled";
};
mipi_dsi: mipi@ff960000 {
compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0xff960000 0x4000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
clock-names = "ref", "pclk";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
mipi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_mipi>;
};
mipi_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_mipi>;
};
};
};
};
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0xff980000 0x20000>;
@ -926,6 +971,7 @@
reg = <0x320>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
#clock-cells = <0>;
};
usbphy1: usb-phy1 {
@ -933,6 +979,7 @@
reg = <0x334>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
#clock-cells = <0>;
};
usbphy2: usb-phy2 {
@ -940,6 +987,7 @@
reg = <0x348>;
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
#clock-cells = <0>;
};
};

View file

@ -78,6 +78,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA1>;
clock-names = "apb_pclk";
};
@ -88,6 +89,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA1>;
clock-names = "apb_pclk";
status = "disabled";
@ -99,6 +101,7 @@
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA2>;
clock-names = "apb_pclk";
};

View file

@ -55,6 +55,7 @@
#define SCLK_TIMER6 90
#define SCLK_JTAG 91
#define SCLK_SMC 92
#define SCLK_TSADC 93
#define DCLK_LCDC0 190
#define DCLK_LCDC1 191