ARM: pxa910: correct nand pmu setting
The original pair of <0x01db, 208000000> is invalid. Correct to the valid value. Signed-off-by: Lei Wen <leiwen@marvell.com> Cc: stable@kernel.org Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
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static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
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static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
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static APMU_CLK(nand, NAND, 0x01db, 208000000);
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static APMU_CLK(nand, NAND, 0x19b, 156000000);
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static APMU_CLK(u2o, USB, 0x1b, 480000000);
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/* device and clock bindings */
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