sy7636a regulator: add wait loop in enable op checking pwr_good before returning

In order to make sure that all the rails are valid from the EPD PMIC when
sending new frames to the EPD, a wait loop has been introduced in the
regulator enable op waiting max 500 ms for PWR GOOD signal from EPD PMIC
before returning from the enable op.

The lcdif driver can then check the return code from the regulator_enable
call and if good, all the EPD power rails are ready.

drivers/regulator/sy7636a-regulator.c

@@ -34,9 +34,50 @@ static int get_vcom_voltage(struct regulator_dev *rdev)
 	return (val & 0x1FF) * 10;
 }
 
+static int get_power_good(struct regulator_dev *rdev, bool *is_good)
+{
+	int ret;
+	unsigned int val;
+
+	ret = regmap_read(rdev->regmap, SY7636A_REG_FAULT_FLAG, &val);
+	if (ret)
+		return ret;
+
+	*is_good = (val & SY7636A_FAULT_FLAG_PG);
+	return ret;
+}
+
+static int enable_regulator_with_pwr_good_verification(struct regulator_dev *rdev)
+{
+	bool pwr_good = 0;
+	int wait_cnt = 0;
+	int ret;
+
+	ret = regulator_enable_regmap(rdev);
+	if (ret)
+		return ret;
+
+	/* WAIT FOR PWR-GOOD */
+	while(!pwr_good && (wait_cnt < 500)) {
+		ret = get_power_good(rdev, &pwr_good);
+		if (ret)
+			return ret;
+
+		if (!pwr_good) {
+			usleep_range(1000, 1500);
+			wait_cnt++;
+		}
+	}
+
+	if (!pwr_good)
+		return -ETIME;
+
+	return 0;
+}
+
 static const struct regulator_ops sy7636a_vcom_volt_ops = {
 	.get_voltage = get_vcom_voltage,
-	.enable = regulator_enable_regmap,
+	.enable = enable_regulator_with_pwr_good_verification,
 	.disable = regulator_disable_regmap,
 	.is_enabled = regulator_is_enabled_regmap,
 };

include/linux/mfd/sy7636a.h

@@ -30,6 +30,7 @@
 #define SY7636A_REG_VLDO_VOLTAGE_ADJULST_CTRL 0x03
 #define SY7636A_REG_POWER_ON_DELAY_TIME 0x06
 #define SY7636A_REG_FAULT_FLAG 0x07
+#define SY7636A_FAULT_FLAG_PG (1 << 0)
 #define SY7636A_REG_TERMISTOR_READOUT 0x08
 
 #define SY7636A_REG_MAX 0x08