b43: N-PHY: Implement MAC PHY clock set
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -3074,6 +3074,17 @@ static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
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return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
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static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
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{
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u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
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if (on)
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tmslow |= SSB_TMSLOW_PHYCLK;
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else
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tmslow &= ~SSB_TMSLOW_PHYCLK;
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ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
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}
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/*
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* Init N-PHY
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* http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
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@ -3174,7 +3185,7 @@ int b43_phy_initn(struct b43_wldev *dev)
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b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
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b43_nphy_bmac_clock_fgc(dev, 0);
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/* TODO N PHY MAC PHY Clock Set with argument 1 */
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b43_nphy_mac_phy_clock_set(dev, true);
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b43_nphy_pa_override(dev, false);
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b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
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@ -97,6 +97,7 @@
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#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
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#define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */
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#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
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#define SSB_TMSLOW_PHYCLK 0x00000010 /* MAC PHY Clock Control Enable */
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#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
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#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
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#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
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