b43: don't duplicate common PHY read/write ops
Most of the PHYs use the same way of accessing registers, so move that code to the shared place. An exception is G-PHY which sometimes access A-PHY regs and requires special handling. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -274,7 +274,12 @@ u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
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{
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assert_mac_suspended(dev);
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dev->phy.writes_counter = 0;
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return dev->phy.ops->phy_read(dev, reg);
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if (dev->phy.ops->phy_read)
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return dev->phy.ops->phy_read(dev, reg);
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
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@ -285,7 +290,12 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
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b43_read16(dev, B43_MMIO_PHY_VER);
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dev->phy.writes_counter = 1;
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}
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dev->phy.ops->phy_write(dev, reg, value);
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if (dev->phy.ops->phy_write)
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return dev->phy.ops->phy_write(dev, reg, value);
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
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@ -1071,18 +1071,6 @@ static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev)
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* R/W ops.
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**************************************************/
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static u16 b43_phy_ht_op_read(struct b43_wldev *dev, u16 reg)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_phy_ht_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
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u16 set)
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{
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@ -1126,8 +1114,6 @@ const struct b43_phy_operations b43_phyops_ht = {
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.free = b43_phy_ht_op_free,
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.prepare_structs = b43_phy_ht_op_prepare_structs,
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.init = b43_phy_ht_op_init,
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.phy_read = b43_phy_ht_op_read,
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.phy_write = b43_phy_ht_op_write,
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.phy_maskset = b43_phy_ht_op_maskset,
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.radio_read = b43_phy_ht_op_radio_read,
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.radio_write = b43_phy_ht_op_radio_write,
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@ -810,18 +810,6 @@ static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev)
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* R/W ops.
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**************************************************/
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static u16 b43_phy_lcn_op_read(struct b43_wldev *dev, u16 reg)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_phy_lcn_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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static void b43_phy_lcn_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
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u16 set)
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{
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@ -855,8 +843,6 @@ const struct b43_phy_operations b43_phyops_lcn = {
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.free = b43_phy_lcn_op_free,
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.prepare_structs = b43_phy_lcn_op_prepare_structs,
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.init = b43_phy_lcn_op_init,
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.phy_read = b43_phy_lcn_op_read,
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.phy_write = b43_phy_lcn_op_write,
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.phy_maskset = b43_phy_lcn_op_maskset,
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.radio_read = b43_phy_lcn_op_radio_read,
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.radio_write = b43_phy_lcn_op_radio_write,
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@ -1985,18 +1985,6 @@ static void lpphy_calibration(struct b43_wldev *dev)
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b43_mac_enable(dev);
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}
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static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
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u16 set)
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{
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@ -2713,8 +2701,6 @@ const struct b43_phy_operations b43_phyops_lp = {
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.free = b43_lpphy_op_free,
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.prepare_structs = b43_lpphy_op_prepare_structs,
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.init = b43_lpphy_op_init,
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.phy_read = b43_lpphy_op_read,
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.phy_write = b43_lpphy_op_write,
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.phy_maskset = b43_lpphy_op_maskset,
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.radio_read = b43_lpphy_op_radio_read,
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.radio_write = b43_lpphy_op_radio_write,
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@ -6497,20 +6497,6 @@ static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
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#endif /* B43_DEBUG */
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}
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static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
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{
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check_phyreg(dev, reg);
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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check_phyreg(dev, reg);
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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static void b43_nphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
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u16 set)
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{
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@ -6653,8 +6639,6 @@ const struct b43_phy_operations b43_phyops_n = {
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.free = b43_nphy_op_free,
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.prepare_structs = b43_nphy_op_prepare_structs,
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.init = b43_nphy_op_init,
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.phy_read = b43_nphy_op_read,
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.phy_write = b43_nphy_op_write,
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.phy_maskset = b43_nphy_op_maskset,
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.radio_read = b43_nphy_op_radio_read,
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.radio_write = b43_nphy_op_radio_write,
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