IB/qib: use arch_phys_wc_add()
This driver already makes use of ioremap_wc() on PIO buffers, so convert it to use arch_phys_wc_add(). The qib driver uses a mmap() special case for when PAT is not used, this behaviour used to be determined with a module parameter but since we have been asked to just remove that module parameter this checks for the WC cookie, if not set we can assume PAT was used. If its set we do what we used to do for the mmap for when MTRR was enabled. The removal of the module parameter is OK given that Andy notes that even if users of module parameter are still around it will not prevent loading of the module on recent kernels. Cc: Doug Ledford <dledford@redhat.com> Cc: Toshi Kani <toshi.kani@hp.com> Cc: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Cc: Mike Marciniszyn <mike.marciniszyn@intel.com> Cc: Roland Dreier <roland@purestorage.com> Cc: Sean Hefty <sean.hefty@intel.com> Cc: Hal Rosenstock <hal.rosenstock@gmail.com> Cc: Dennis Dalessandro <dennis.dalessandro@intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Suresh Siddha <sbsiddha@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Juergen Gross <jgross@suse.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Dave Airlie <airlied@redhat.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Antonino Daplas <adaplas@gmail.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Stefan Bader <stefan.bader@canonical.com> Cc: konrad.wilk@oracle.com Cc: ville.syrjala@linux.intel.com Cc: david.vrabel@citrix.com Cc: jbeulich@suse.com Cc: Roger Pau Monné <roger.pau@citrix.com> Cc: infinipath@intel.com Cc: linux-rdma@vger.kernel.org Cc: linux-fbdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: xen-devel@lists.xensource.com Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -1136,7 +1136,6 @@ extern struct qib_devdata *qib_lookup(int unit);
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extern u32 qib_cpulist_count;
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extern unsigned long *qib_cpulist;
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extern unsigned qib_wc_pat;
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extern unsigned qib_cc_table_size;
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int qib_init(struct qib_devdata *, int);
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int init_chip_wc_pat(struct qib_devdata *dd, u32);
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@ -835,7 +835,8 @@ static int mmap_piobufs(struct vm_area_struct *vma,
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vma->vm_flags &= ~VM_MAYREAD;
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vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
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if (qib_wc_pat)
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/* We used PAT if wc_cookie == 0 */
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if (!dd->wc_cookie)
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
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@ -3315,11 +3315,9 @@ static int init_6120_variables(struct qib_devdata *dd)
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qib_6120_config_ctxts(dd);
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qib_set_ctxtcnt(dd);
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if (qib_wc_pat) {
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ret = init_chip_wc_pat(dd, 0);
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if (ret)
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goto bail;
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}
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set_6120_baseaddrs(dd); /* set chip access pointers now */
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ret = 0;
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@ -4126,11 +4126,9 @@ static int qib_init_7220_variables(struct qib_devdata *dd)
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qib_7220_config_ctxts(dd);
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qib_set_ctxtcnt(dd); /* needed for PAT setup */
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if (qib_wc_pat) {
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ret = init_chip_wc_pat(dd, 0);
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if (ret)
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goto bail;
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}
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set_7220_baseaddrs(dd); /* set chip access pointers now */
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ret = 0;
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@ -6429,6 +6429,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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unsigned features, pidx, sbufcnt;
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int ret, mtu;
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u32 sbufs, updthresh;
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resource_size_t vl15off;
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/* pport structs are contiguous, allocated after devdata */
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ppd = (struct qib_pportdata *)(dd + 1);
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@ -6677,8 +6678,6 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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qib_7322_config_ctxts(dd);
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qib_set_ctxtcnt(dd);
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if (qib_wc_pat) {
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resource_size_t vl15off;
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/*
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* We do not set WC on the VL15 buffers to avoid
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* a rare problem with unaligned writes from
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@ -6699,7 +6698,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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ret = -ENOMEM;
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goto bail;
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}
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}
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qib_7322_set_baseaddrs(dd); /* set chip access pointers now */
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ret = 0;
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@ -91,15 +91,6 @@ MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port");
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unsigned qib_cc_table_size;
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module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO);
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MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984");
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/*
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* qib_wc_pat parameter:
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* 0 is WC via MTRR
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* 1 is WC via PAT
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* If PAT initialization fails, code reverts back to MTRR
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*/
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unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */
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module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO);
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MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism");
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static void verify_interrupt(unsigned long);
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@ -1377,7 +1368,6 @@ static void cleanup_device_data(struct qib_devdata *dd)
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spin_unlock(&dd->pport[pidx].cc_shadow_lock);
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}
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if (!qib_wc_pat)
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qib_disable_wc(dd);
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if (dd->pioavailregs_dma) {
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@ -1547,7 +1537,6 @@ static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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goto bail;
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}
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if (!qib_wc_pat) {
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ret = qib_enable_wc(dd);
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if (ret) {
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qib_dev_err(dd,
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@ -1555,7 +1544,6 @@ static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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-ret);
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ret = 0;
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}
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}
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qib_verify_pioperf(dd);
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bail:
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@ -116,22 +116,10 @@ int qib_enable_wc(struct qib_devdata *dd)
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}
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if (!ret) {
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int cookie;
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cookie = mtrr_add(pioaddr, piolen, MTRR_TYPE_WRCOMB, 1);
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if (cookie < 0) {
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{
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qib_devinfo(dd->pcidev,
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"mtrr_add() WC for PIO bufs failed (%d)\n",
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cookie);
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dd->wc_cookie = arch_phys_wc_add(pioaddr, piolen);
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if (dd->wc_cookie < 0)
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ret = -EINVAL;
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}
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} else {
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dd->wc_cookie = cookie;
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dd->wc_base = (unsigned long) pioaddr;
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dd->wc_len = (unsigned long) piolen;
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}
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}
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return ret;
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}
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@ -142,18 +130,7 @@ int qib_enable_wc(struct qib_devdata *dd)
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*/
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void qib_disable_wc(struct qib_devdata *dd)
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{
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if (dd->wc_cookie) {
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int r;
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r = mtrr_del(dd->wc_cookie, dd->wc_base,
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dd->wc_len);
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if (r < 0)
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qib_devinfo(dd->pcidev,
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"mtrr_del(%lx, %lx, %lx) failed: %d\n",
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dd->wc_cookie, dd->wc_base,
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dd->wc_len, r);
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dd->wc_cookie = 0; /* even on failure */
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}
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arch_phys_wc_del(dd->wc_cookie);
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}
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/**
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