arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs
This patch adds sdmmc, sdio, emmc nodes for Rockchip RK3328 SoCs. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -372,6 +372,39 @@
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<32768>;
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<32768>;
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};
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};
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sdmmc: dwmmc@ff500000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff500000 0x0 0x4000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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sdio: dwmmc@ff510000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff510000 0x0 0x4000>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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emmc: dwmmc@ff520000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff520000 0x0 0x4000>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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gmac2io: ethernet@ff540000 {
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gmac2io: ethernet@ff540000 {
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compatible = "rockchip,rk3328-gmac";
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compatible = "rockchip,rk3328-gmac";
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reg = <0x0 0xff540000 0x0 0x10000>;
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reg = <0x0 0xff540000 0x0 0x10000>;
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