MLK-12861-1 ARM: imx: support runtime clock management on i.mx7d when M4 is enabled
For i.MX7D, current runtime clock management code will skip all
PLL/PFD/GATE enable/disable when M4 is enabled, this is NOT good
for power number in low power idle and audio playback, as M4 only
uses one high speed PFD which is from system PLL, it is never
disabled runtimely, so we can just enable the hardware operation of
PLL/PFD/GATE for A7.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 02a2e8d73b
)
pull/10/head
parent
6dd2b11249
commit
d774486845
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@ -59,7 +59,7 @@ static void clk_gate2_do_shared_clks(struct clk_hw *hw, bool enable)
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{
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struct clk_gate2 *gate = to_clk_gate2(hw);
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if (imx_src_is_m4_enabled()) {
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if (imx_src_is_m4_enabled() && clk_on_imx6sx()) {
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#ifdef CONFIG_SOC_IMX6SX
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if (!amp_power_mutex || !shared_mem) {
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if (enable)
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@ -53,7 +53,7 @@ static void clk_pfd_do_shared_clks(struct clk_hw *hw, bool enable)
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{
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struct clk_pfd *pfd = to_clk_pfd(hw);
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if (imx_src_is_m4_enabled()) {
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if (imx_src_is_m4_enabled() && clk_on_imx6sx()) {
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#ifdef CONFIG_SOC_IMX6SX
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if (!amp_power_mutex || !shared_mem) {
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if (enable)
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@ -110,7 +110,7 @@ static int clk_pllv3_do_hardware(struct clk_hw *hw, bool enable)
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static void clk_pllv3_do_shared_clks(struct clk_hw *hw, bool enable)
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{
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if (imx_src_is_m4_enabled()) {
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if (imx_src_is_m4_enabled() && clk_on_imx6sx()) {
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#ifdef CONFIG_SOC_IMX6SX
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if (!amp_power_mutex || !shared_mem) {
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if (enable)
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@ -309,4 +309,9 @@ struct clk *imx_clk_cpu(const char *name, const char *parent_name,
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int imx_update_shared_mem(struct clk_hw *hw, bool enable);
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static inline int clk_on_imx6sx(void)
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{
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return of_machine_is_compatible("fsl,imx6sx");
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}
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#endif
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