ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.
The flexibility to override the irq handles in the LLD's are already present, so controllers implementing a edge trigger latch can implement their own interrupt handler inside the driver. This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge irq handling to ahci_xgene. tj: Minor update to description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kenrel.org>
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@ -240,8 +240,7 @@ enum {
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error-handling stage) */
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AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */
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AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */
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AHCI_HFLAG_EDGE_IRQ = (1 << 19), /* HOST_IRQ_STAT behaves as
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Edge Triggered */
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#ifdef CONFIG_PCI_MSI
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AHCI_HFLAG_MULTI_MSI = (1 << 20), /* multiple PCI MSIs */
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AHCI_HFLAG_MULTI_MSIX = (1 << 21), /* per-port MSI-X */
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@ -548,6 +548,43 @@ softreset_retry:
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return rc;
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}
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static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
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{
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struct ata_host *host = dev_instance;
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struct ahci_host_priv *hpriv;
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unsigned int rc = 0;
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void __iomem *mmio;
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u32 irq_stat, irq_masked;
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VPRINTK("ENTER\n");
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hpriv = host->private_data;
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mmio = hpriv->mmio;
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/* sigh. 0xffffffff is a valid return from h/w */
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irq_stat = readl(mmio + HOST_IRQ_STAT);
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if (!irq_stat)
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return IRQ_NONE;
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irq_masked = irq_stat & hpriv->port_map;
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spin_lock(&host->lock);
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/*
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* HOST_IRQ_STAT behaves as edge triggered latch meaning that
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* it should be cleared before all the port events are cleared.
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*/
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writel(irq_stat, mmio + HOST_IRQ_STAT);
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rc = ahci_handle_port_intr(host, irq_masked);
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spin_unlock(&host->lock);
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VPRINTK("EXIT\n");
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return IRQ_RETVAL(rc);
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}
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static struct ata_port_operations xgene_ahci_v1_ops = {
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.inherits = &ahci_ops,
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.host_stop = xgene_ahci_host_stop,
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@ -779,7 +816,8 @@ skip_clk_phy:
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hpriv->flags = AHCI_HFLAG_NO_NCQ;
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break;
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case XGENE_AHCI_V2:
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hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;
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hpriv->flags |= AHCI_HFLAG_YES_FBS;
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hpriv->irq_handler = xgene_ahci_irq_intr;
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break;
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default:
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break;
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@ -113,8 +113,6 @@ static ssize_t ahci_store_em_buffer(struct device *dev,
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const char *buf, size_t size);
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static ssize_t ahci_show_em_supported(struct device *dev,
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struct device_attribute *attr, char *buf);
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static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance);
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static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance);
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static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
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@ -517,9 +515,7 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv)
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hpriv->start_engine = ahci_start_engine;
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if (!hpriv->irq_handler)
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hpriv->irq_handler = (hpriv->flags & AHCI_HFLAG_EDGE_IRQ) ?
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ahci_single_edge_irq_intr :
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ahci_single_level_irq_intr;
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hpriv->irq_handler = ahci_single_level_irq_intr;
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}
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EXPORT_SYMBOL_GPL(ahci_save_initial_config);
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@ -1882,43 +1878,6 @@ u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
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}
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EXPORT_SYMBOL_GPL(ahci_handle_port_intr);
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static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
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{
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struct ata_host *host = dev_instance;
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struct ahci_host_priv *hpriv;
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unsigned int rc = 0;
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void __iomem *mmio;
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u32 irq_stat, irq_masked;
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VPRINTK("ENTER\n");
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hpriv = host->private_data;
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mmio = hpriv->mmio;
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/* sigh. 0xffffffff is a valid return from h/w */
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irq_stat = readl(mmio + HOST_IRQ_STAT);
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if (!irq_stat)
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return IRQ_NONE;
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irq_masked = irq_stat & hpriv->port_map;
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spin_lock(&host->lock);
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/*
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* HOST_IRQ_STAT behaves as edge triggered latch meaning that
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* it should be cleared before all the port events are cleared.
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*/
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writel(irq_stat, mmio + HOST_IRQ_STAT);
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rc = ahci_handle_port_intr(host, irq_masked);
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spin_unlock(&host->lock);
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VPRINTK("EXIT\n");
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return IRQ_RETVAL(rc);
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}
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static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
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{
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struct ata_host *host = dev_instance;
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