dmaengine: at_hdmac: replace spin_lock* with irqsave variants
dmaengine routines can be called from interrupt context and with interrupts disabled. Whereas spin_unlock_bh can't be called from such contexts. So this patch converts all spin_lock* routines to irqsave variants. Also, spin_lock() used in tasklet is converted to irqsave variants, as tasklet can be interrupted, and dma requests from such interruptions may also call spin_lock. Idea from dw_dmac patch by Viresh Kumar. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -107,10 +107,11 @@ static struct at_desc *atc_desc_get(struct at_dma_chan *atchan)
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{
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struct at_desc *desc, *_desc;
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struct at_desc *ret = NULL;
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unsigned long flags;
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unsigned int i = 0;
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LIST_HEAD(tmp_list);
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) {
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i++;
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if (async_tx_test_ack(&desc->txd)) {
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@ -121,7 +122,7 @@ static struct at_desc *atc_desc_get(struct at_dma_chan *atchan)
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dev_dbg(chan2dev(&atchan->chan_common),
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"desc %p not ACKed\n", desc);
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}
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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dev_vdbg(chan2dev(&atchan->chan_common),
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"scanned %u descriptors on freelist\n", i);
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@ -129,9 +130,9 @@ static struct at_desc *atc_desc_get(struct at_dma_chan *atchan)
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if (!ret) {
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ret = atc_alloc_descriptor(&atchan->chan_common, GFP_ATOMIC);
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if (ret) {
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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atchan->descs_allocated++;
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else {
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dev_err(chan2dev(&atchan->chan_common),
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"not enough descriptors available\n");
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@ -150,8 +151,9 @@ static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc)
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{
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if (desc) {
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struct at_desc *child;
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unsigned long flags;
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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list_for_each_entry(child, &desc->tx_list, desc_node)
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dev_vdbg(chan2dev(&atchan->chan_common),
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"moving child desc %p to freelist\n",
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@ -160,7 +162,7 @@ static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc)
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dev_vdbg(chan2dev(&atchan->chan_common),
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"moving desc %p to freelist\n", desc);
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list_add(&desc->desc_node, &atchan->free_list);
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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}
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}
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@ -471,8 +473,9 @@ static void atc_handle_cyclic(struct at_dma_chan *atchan)
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static void atc_tasklet(unsigned long data)
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{
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struct at_dma_chan *atchan = (struct at_dma_chan *)data;
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unsigned long flags;
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spin_lock(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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if (test_and_clear_bit(ATC_IS_ERROR, &atchan->status))
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atc_handle_error(atchan);
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else if (test_bit(ATC_IS_CYCLIC, &atchan->status))
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@ -480,7 +483,7 @@ static void atc_tasklet(unsigned long data)
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else
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atc_advance_work(atchan);
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spin_unlock(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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}
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static irqreturn_t at_dma_interrupt(int irq, void *dev_id)
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@ -539,8 +542,9 @@ static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx)
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struct at_desc *desc = txd_to_at_desc(tx);
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struct at_dma_chan *atchan = to_at_dma_chan(tx->chan);
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dma_cookie_t cookie;
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unsigned long flags;
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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cookie = atc_assign_cookie(atchan, desc);
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if (list_empty(&atchan->active_list)) {
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@ -554,7 +558,7 @@ static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx)
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list_add_tail(&desc->desc_node, &atchan->queue);
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}
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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return cookie;
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}
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@ -927,28 +931,29 @@ static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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struct at_dma *atdma = to_at_dma(chan->device);
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int chan_id = atchan->chan_common.chan_id;
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unsigned long flags;
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LIST_HEAD(list);
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dev_vdbg(chan2dev(chan), "atc_control (%d)\n", cmd);
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if (cmd == DMA_PAUSE) {
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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dma_writel(atdma, CHER, AT_DMA_SUSP(chan_id));
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set_bit(ATC_IS_PAUSED, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else if (cmd == DMA_RESUME) {
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if (!test_bit(ATC_IS_PAUSED, &atchan->status))
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return 0;
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id));
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clear_bit(ATC_IS_PAUSED, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else if (cmd == DMA_TERMINATE_ALL) {
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struct at_desc *desc, *_desc;
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/*
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@ -957,7 +962,7 @@ static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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* channel. We still have to poll the channel enable bit due
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* to AHB/HSB limitations.
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*/
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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/* disabling channel: must also remove suspend state */
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask);
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@ -978,7 +983,7 @@ static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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/* if channel dedicated to cyclic operations, free it */
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clear_bit(ATC_IS_CYCLIC, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else {
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return -ENXIO;
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}
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@ -1004,9 +1009,10 @@ atc_tx_status(struct dma_chan *chan,
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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dma_cookie_t last_used;
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dma_cookie_t last_complete;
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unsigned long flags;
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enum dma_status ret;
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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last_complete = atchan->completed_cookie;
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last_used = chan->cookie;
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@ -1021,7 +1027,7 @@ atc_tx_status(struct dma_chan *chan,
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ret = dma_async_is_complete(cookie, last_complete, last_used);
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}
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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if (ret != DMA_SUCCESS)
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dma_set_tx_state(txstate, last_complete, last_used,
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@ -1046,6 +1052,7 @@ atc_tx_status(struct dma_chan *chan,
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static void atc_issue_pending(struct dma_chan *chan)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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unsigned long flags;
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dev_vdbg(chan2dev(chan), "issue_pending\n");
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@ -1053,11 +1060,11 @@ static void atc_issue_pending(struct dma_chan *chan)
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if (test_bit(ATC_IS_CYCLIC, &atchan->status))
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return;
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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if (!atc_chan_is_enabled(atchan)) {
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atc_advance_work(atchan);
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}
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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}
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/**
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@ -1073,6 +1080,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
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struct at_dma *atdma = to_at_dma(chan->device);
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struct at_desc *desc;
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struct at_dma_slave *atslave;
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unsigned long flags;
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int i;
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u32 cfg;
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LIST_HEAD(tmp_list);
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@ -1116,11 +1124,11 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
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list_add_tail(&desc->desc_node, &tmp_list);
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}
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spin_lock_bh(&atchan->lock);
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spin_lock_irqsave(&atchan->lock, flags);
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atchan->descs_allocated = i;
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list_splice(&tmp_list, &atchan->free_list);
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atchan->completed_cookie = chan->cookie = 1;
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spin_unlock_bh(&atchan->lock);
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spin_unlock_irqrestore(&atchan->lock, flags);
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/* channel parameters */
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channel_writel(atchan, CFG, cfg);
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