[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c
Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -153,4 +153,31 @@ struct cheetah_err_info {
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*/
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*/
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extern struct cheetah_err_info *cheetah_error_log;
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extern struct cheetah_err_info *cheetah_error_log;
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/* UPA nodes send interrupt packet to UltraSparc with first data reg
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* value low 5 (7 on Starfire) bits holding the IRQ identifier being
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* delivered. We must translate this into a non-vector IRQ so we can
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* set the softint on this cpu.
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*
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* To make processing these packets efficient and race free we use
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* an array of irq buckets below. The interrupt vector handler in
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* entry.S feeds incoming packets into per-cpu pil-indexed lists.
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*
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* If you make changes to ino_bucket, please update hand coded assembler
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* of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
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*/
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struct ino_bucket {
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/*0x00*/unsigned long __irq_chain_pa;
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/* Virtual interrupt number assigned to this INO. */
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/*0x08*/unsigned int __virt_irq;
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/*0x0c*/unsigned int __pad;
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};
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extern struct ino_bucket *ivector_table;
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extern unsigned long ivector_table_pa;
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extern void handler_irq(int irq, struct pt_regs *regs);
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extern void init_irqwork_curcpu(void);
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extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
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#endif /* _ENTRY_H */
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#endif /* _ENTRY_H */
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@ -44,27 +44,10 @@
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#include <asm/hypervisor.h>
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#include <asm/hypervisor.h>
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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/* UPA nodes send interrupt packet to UltraSparc with first data reg
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#include "entry.h"
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* value low 5 (7 on Starfire) bits holding the IRQ identifier being
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* delivered. We must translate this into a non-vector IRQ so we can
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* set the softint on this cpu.
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*
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* To make processing these packets efficient and race free we use
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* an array of irq buckets below. The interrupt vector handler in
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* entry.S feeds incoming packets into per-cpu pil-indexed lists.
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*
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* If you make changes to ino_bucket, please update hand coded assembler
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* of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
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*/
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struct ino_bucket {
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/*0x00*/unsigned long __irq_chain_pa;
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/* Virtual interrupt number assigned to this INO. */
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/*0x08*/unsigned int __virt_irq;
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/*0x0c*/unsigned int __pad;
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};
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#define NUM_IVECS (IMAP_INR + 1)
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#define NUM_IVECS (IMAP_INR + 1)
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struct ino_bucket *ivector_table;
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struct ino_bucket *ivector_table;
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unsigned long ivector_table_pa;
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unsigned long ivector_table_pa;
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@ -64,6 +64,7 @@ extern unsigned char virt_irq_alloc(unsigned int dev_handle,
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extern void virt_irq_free(unsigned int virt_irq);
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extern void virt_irq_free(unsigned int virt_irq);
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#endif
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#endif
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extern void __init init_IRQ(void);
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extern void fixup_irqs(void);
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extern void fixup_irqs(void);
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static inline void set_softint(unsigned long bits)
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static inline void set_softint(unsigned long bits)
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