Second Round of Renesas ARM64 Based SoC DT Updates for v4.10
Enhancements: * Add device nodes for PRR * Add m3ulcb board * Enable I2C on r8a7796/salvator-x board * Enable SDHI0 on h3ulcb board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYMtUrAAoJENfPZGlqN0++MtQP/0QGZk5T/obJEmsApz+pyjv6 mnHbxN385zjTKDKRxwCK6y1lFqdASMlvHd0vzk/nqn7f7nrqHFchkOKq5jtIKhZk tsLDsvGoQJ6dOKhoGtYqGA7jjVNplowyW3XbAUj2XqybWRfSSKuYAhkSb8XwHQJI U6BJbSJlAoMmOaczn88ncgMW6yYfQjmNmBPI8was6PVTk366oJfciJDatJNJzPab jko9ATFuC/LW3yJv/v0k8b5qtbINuk9+OfVzPk9h64LoTuld5/gKfyGvN5L5mwEb bSUTyJyvi8w/fO7sAaZiQpTZNUkoVHF474UuoiLv7xskDEXtenmUR1dXP9pNo+Yv IxgbbddQECbEEzrAyz0weucSLNY2SFDUzw2xGz5+an2uBIrshgUS2Hc9ysmflalq SzoQ1hjft/Ew18OIc+8AH0LAth63AoM1dCxqiJV1SFUtPHFeGnKlJah0g6rCXv1i zOPPjRkMVjmFygwf+DmlAgX3JJjIjMLBeodwlKt1ta5E0AKPDKO2l9dDXPBP40Oe n0/M9nZKCIb4j9q4n3iEwB+KjhCf0xORlQ4Dft5ctfIKIR426ll5bqdO6R9C0kuQ A4dlye1tygvryvRpcoMaulwYhazHslTkq75Eav+a1N2b5YtgUzHWm/km3UG3Li6J yHbn4MU6oOTVgGfezTFQ =Ywj/ -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.10" from Simon Horman: Enhancements: * Add device nodes for PRR * Add m3ulcb board * Enable I2C on r8a7796/salvator-x board * Enable SDHI0 on h3ulcb board * tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7796: Add device node for PRR arm64: dts: r8a7795: Add device node for PRR arm64: dts: h3ulcb: rename SDHI0 pins arm64: dts: h3ulcb: enable SDHI2 arm64: dts: m3ulcb: enable SDHI2 arm64: dts: m3ulcb: enable SDHI0 arm64: dts: m3ulcb: enable WDT arm64: dts: m3ulcb: enable EXTALR clk arm64: dts: m3ulcb: enable GPIO keys arm64: dts: m3ulcb: enable GPIO leds arm64: dts: m3ulcb: enable SCIF clk and pins arm64: dts: m3ulcb: initial device tree arm64: dts: m3ulcb: add M3ULCB board DT bindings arm64: dts: h3ulcb: update header arm64: dts: h3ulcb: update documentation with official board name arm64: dts: r8a7796: salvator-x: enable I2C arm64: dts: r8a7796: Enable I2C DMA arm64: dts: r8a7796: add I2C support
This commit is contained in:
Arnd Bergmann
commit
db30a7ae1d
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@ -49,7 +49,7 @@ Boards:
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compatible = "renesas,genmai", "renesas,r7s72100"
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- Gose
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compatible = "renesas,gose", "renesas,r8a7793"
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- H3ULCB (RTP0RC7795SKB00010S)
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- H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
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compatible = "renesas,h3ulcb", "renesas,r8a7795";
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- Henninger
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compatible = "renesas,henninger", "renesas,r8a7791"
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@ -61,6 +61,8 @@ Boards:
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compatible = "renesas,kzm9g", "renesas,sh73a0"
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- Lager (RTP0RC7790SEB00010S)
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compatible = "renesas,lager", "renesas,r8a7790"
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- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
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compatible = "renesas,m3ulcb", "renesas,r8a7796";
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- Marzen
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compatible = "renesas,marzen", "renesas,r8a7779"
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- Porter (M2-LCDP)
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@ -1,5 +1,5 @@
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dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
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dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
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dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
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always := $(dtb-y)
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clean-files := *.dtb
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@ -1,5 +1,5 @@
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/*
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* Device Tree Source for the H3ULCB board
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* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016 Cogent Embedded, Inc.
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@ -62,6 +62,24 @@
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clock-frequency = <24576000>;
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};
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reg_1p8v: regulator0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator1 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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@ -145,18 +163,30 @@
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function = "avb";
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};
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sdhi0_pins_3v3: sd0_3v3 {
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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sdhi0_pins_1v8: sd0_1v8 {
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sdhi0_pins_uhs: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <1800>;
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};
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sdhi2_pins: sd2 {
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groups = "sdhi2_data8", "sdhi2_ctrl";
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function = "sdhi2";
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power-source = <3300>;
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};
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sdhi2_pins_uhs: sd2_uhs {
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groups = "sdhi2_data8", "sdhi2_ctrl";
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function = "sdhi2";
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power-source = <1800>;
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};
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sound_pins: sound {
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groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
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function = "ssi";
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@ -261,8 +291,8 @@
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins_3v3>;
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pinctrl-1 = <&sdhi0_pins_1v8>;
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <&vcc_sdhi0>;
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@ -273,6 +303,19 @@
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status = "okay";
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};
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&sdhi2 {
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/* used for on-board 8bit eMMC */
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-1 = <&sdhi2_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&ssi1 {
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shared-pin;
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};
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@ -321,6 +321,11 @@
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#power-domain-cells = <0>;
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};
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prr: chipid@fff00044 {
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compatible = "renesas,prr";
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reg = <0 0xfff00044 0 4>;
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};
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sysc: system-controller@e6180000 {
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compatible = "renesas,r8a7795-sysc";
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reg = <0 0xe6180000 0 0x0400>;
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189
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
Normal file
189
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
Normal file
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@ -0,0 +1,189 @@
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/*
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* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a7796.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Renesas M3ULCB board based on r8a7796";
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compatible = "renesas,m3ulcb", "renesas,r8a7796";
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aliases {
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serial0 = &scif2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x38000000>;
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};
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leds {
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compatible = "gpio-leds";
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led5 {
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gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
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};
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led6 {
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gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
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};
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};
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keyboard {
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compatible = "gpio-keys";
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key-1 {
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linux,code = <KEY_1>;
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label = "SW3";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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};
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};
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reg_1p8v: regulator0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator1 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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scif2_pins: scif2 {
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groups = "scif2_data_a";
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function = "scif2";
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};
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scif_clk_pins: scif_clk {
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groups = "scif_clk_a";
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function = "scif_clk";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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sdhi0_pins_uhs: sd0_uhs {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <1800>;
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};
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sdhi2_pins: sd2 {
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groups = "sdhi2_data8", "sdhi2_ctrl";
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function = "sdhi2";
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power-source = <3300>;
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};
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sdhi2_pins_uhs: sd2_uhs {
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groups = "sdhi2_data8", "sdhi2_ctrl";
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function = "sdhi2";
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power-source = <1800>;
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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sd-uhs-sdr50;
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status = "okay";
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};
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&sdhi2 {
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/* used for on-board 8bit eMMC */
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-1 = <&sdhi2_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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status = "okay";
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};
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&wdt0 {
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timeout-sec = <60>;
|
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status = "okay";
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};
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@ -111,6 +111,11 @@
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function = "scif_clk";
|
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};
|
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|
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i2c2_pins: i2c2 {
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groups = "i2c2_a";
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function = "i2c2";
|
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};
|
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|
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
|
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function = "sdhi0";
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||||
|
|
@ -208,6 +213,13 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
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pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt0 {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -17,6 +17,16 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
i2c3 = &i2c3;
|
||||
i2c4 = &i2c4;
|
||||
i2c5 = &i2c5;
|
||||
i2c6 = &i2c6;
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
|
|
@ -233,12 +243,118 @@
|
|||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
prr: chipid@fff00044 {
|
||||
compatible = "renesas,prr";
|
||||
reg = <0 0xfff00044 0 4>;
|
||||
};
|
||||
|
||||
sysc: system-controller@e6180000 {
|
||||
compatible = "renesas,r8a7796-sysc";
|
||||
reg = <0 0xe6180000 0 0x0400>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@e6500000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe6500000 0 0x40>;
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 931>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac1 0x91>, <&dmac1 0x90>,
|
||||
<&dmac2 0x91>, <&dmac2 0x90>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@e6508000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe6508000 0 0x40>;
|
||||
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 930>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac1 0x93>, <&dmac1 0x92>,
|
||||
<&dmac2 0x93>, <&dmac2 0x92>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@e6510000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe6510000 0 0x40>;
|
||||
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 929>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac1 0x95>, <&dmac1 0x94>,
|
||||
<&dmac2 0x95>, <&dmac2 0x94>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@e66d0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe66d0000 0 0x40>;
|
||||
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 928>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac0 0x97>, <&dmac0 0x96>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@e66d8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe66d8000 0 0x40>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 927>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac0 0x99>, <&dmac0 0x98>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@e66e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe66e0000 0 0x40>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 919>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@e66e8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7796";
|
||||
reg = <0 0xe66e8000 0 0x40>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 918>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif2: serial@e6e88000 {
|
||||
compatible = "renesas,scif-r8a7796",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
|
|
|
|||
Loading…
Reference in a new issue