[POWERPC] 8xx: platform specific mmu updates
This is just a straight port of the same done in arch/ppc
by Marcelo Tosatti. One used to be
[PATCH] ppc32 8xx: update_mmu_cache() needs unconditional tlbie,
commit eb07d964b4
In a nutshell, the board is nearly stuck without this, yet without any
visible failure - being just very slow.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
parent
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@ -490,19 +490,19 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
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!cpu_has_feature(CPU_FTR_NOEXECUTE) &&
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pfn_valid(pfn)) {
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struct page *page = pfn_to_page(pfn);
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#ifdef CONFIG_8xx
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/* On 8xx, cache control instructions (particularly
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* "dcbst" from flush_dcache_icache) fault as write
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* operation if there is an unpopulated TLB entry
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* for the address in question. To workaround that,
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* we invalidate the TLB here, thus avoiding dcbst
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* misbehaviour.
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*/
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_tlbie(address);
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#endif
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if (!PageReserved(page)
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&& !test_bit(PG_arch_1, &page->flags)) {
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if (vma->vm_mm == current->active_mm) {
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#ifdef CONFIG_8xx
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/* On 8xx, cache control instructions (particularly
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* "dcbst" from flush_dcache_icache) fault as write
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* operation if there is an unpopulated TLB entry
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* for the address in question. To workaround that,
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* we invalidate the TLB here, thus avoiding dcbst
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* misbehaviour.
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*/
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_tlbie(address);
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#endif
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__flush_dcache_icache((void *) address);
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} else
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flush_dcache_icache_page(page);
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