ARM: DaVinci: SOC GPIOs use gpiolib
Switch DaVinci SOC gpios over to using the new GPIO library, so it can access GPIO expanders and other non-SOC GPIOs using the same calls. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -515,6 +515,7 @@ config ARCH_DAVINCI
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_CLK
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help
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Support for TI's DaVinci platform.
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@ -1,7 +1,7 @@
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/*
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* TI DaVinci GPIO Support
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*
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* Copyright (c) 2006 David Brownell
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* Copyright (c) 2006-2007 David Brownell
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* Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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@ -26,63 +26,23 @@
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#include <asm/mach/irq.h>
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static DEFINE_SPINLOCK(gpio_lock);
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static DECLARE_BITMAP(gpio_in_use, DAVINCI_N_GPIO);
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int gpio_request(unsigned gpio, const char *tag)
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{
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if (gpio >= DAVINCI_N_GPIO)
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return -EINVAL;
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struct davinci_gpio {
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struct gpio_chip chip;
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struct gpio_controller *__iomem regs;
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};
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if (test_and_set_bit(gpio, gpio_in_use))
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return -EBUSY;
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static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
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return 0;
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}
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EXPORT_SYMBOL(gpio_request);
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void gpio_free(unsigned gpio)
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{
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if (gpio >= DAVINCI_N_GPIO)
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return;
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clear_bit(gpio, gpio_in_use);
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}
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EXPORT_SYMBOL(gpio_free);
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/* create a non-inlined version */
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static struct gpio_controller *__iomem gpio2controller(unsigned gpio)
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static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio)
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{
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return __gpio_to_controller(gpio);
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}
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/*
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* Assuming the pin is muxed as a gpio output, set its output value.
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*/
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void __gpio_set(unsigned gpio, int value)
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{
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struct gpio_controller *__iomem g = gpio2controller(gpio);
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__raw_writel(__gpio_mask(gpio), value ? &g->set_data : &g->clr_data);
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}
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EXPORT_SYMBOL(__gpio_set);
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/*
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* Read the pin's value (works even if it's set up as output);
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* returns zero/nonzero.
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*
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* Note that changes are synched to the GPIO clock, so reading values back
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* right after you've set them may give old values.
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*/
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int __gpio_get(unsigned gpio)
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{
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struct gpio_controller *__iomem g = gpio2controller(gpio);
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return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data));
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}
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EXPORT_SYMBOL(__gpio_get);
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/*--------------------------------------------------------------------------*/
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@ -91,36 +51,45 @@ EXPORT_SYMBOL(__gpio_get);
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* needed, and enable the GPIO clock.
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*/
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int gpio_direction_input(unsigned gpio)
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static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
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{
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struct gpio_controller *__iomem g = gpio2controller(gpio);
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struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
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struct gpio_controller *__iomem g = d->regs;
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u32 temp;
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u32 mask;
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if (!g)
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return -EINVAL;
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spin_lock(&gpio_lock);
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mask = __gpio_mask(gpio);
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temp = __raw_readl(&g->dir);
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temp |= mask;
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temp |= (1 << offset);
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__raw_writel(temp, &g->dir);
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spin_unlock(&gpio_lock);
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return 0;
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}
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EXPORT_SYMBOL(gpio_direction_input);
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int gpio_direction_output(unsigned gpio, int value)
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/*
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* Read the pin's value (works even if it's set up as output);
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* returns zero/nonzero.
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*
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* Note that changes are synched to the GPIO clock, so reading values back
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* right after you've set them may give old values.
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*/
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static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct gpio_controller *__iomem g = gpio2controller(gpio);
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u32 temp;
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u32 mask;
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struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
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struct gpio_controller *__iomem g = d->regs;
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if (!g)
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return -EINVAL;
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return (1 << offset) & __raw_readl(&g->in_data);
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}
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static int
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davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
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struct gpio_controller *__iomem g = d->regs;
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u32 temp;
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u32 mask = 1 << offset;
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spin_lock(&gpio_lock);
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mask = __gpio_mask(gpio);
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temp = __raw_readl(&g->dir);
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temp &= ~mask;
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__raw_writel(mask, value ? &g->set_data : &g->clr_data);
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@ -128,8 +97,48 @@ int gpio_direction_output(unsigned gpio, int value)
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spin_unlock(&gpio_lock);
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return 0;
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}
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EXPORT_SYMBOL(gpio_direction_output);
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/*
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* Assuming the pin is muxed as a gpio output, set its output value.
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*/
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static void
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davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
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struct gpio_controller *__iomem g = d->regs;
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__raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
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}
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static int __init davinci_gpio_setup(void)
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{
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int i, base;
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for (i = 0, base = 0;
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i < ARRAY_SIZE(chips);
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i++, base += 32) {
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chips[i].chip.label = "DaVinci";
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chips[i].chip.direction_input = davinci_direction_in;
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chips[i].chip.get = davinci_gpio_get;
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chips[i].chip.direction_output = davinci_direction_out;
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chips[i].chip.set = davinci_gpio_set;
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chips[i].chip.base = base;
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chips[i].chip.ngpio = DAVINCI_N_GPIO - base;
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if (chips[i].chip.ngpio > 32)
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chips[i].chip.ngpio = 32;
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chips[i].regs = gpio2controller(base);
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gpiochip_add(&chips[i].chip);
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}
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return 0;
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}
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pure_initcall(davinci_gpio_setup);
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/*--------------------------------------------------------------------------*/
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/*
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* We expect irqs will normally be set up as input pins, but they can also be
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* used as output pins ... which is convenient for testing.
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@ -14,6 +14,7 @@
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#define __DAVINCI_GPIO_H
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#include <linux/io.h>
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#include <asm-generic/gpio.h>
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#include <mach/hardware.h>
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/*
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@ -27,13 +28,16 @@
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* need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
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* used as gpios, not with other peripherals.
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*
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* GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe
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* for later updates, code should write GPIO(N) or:
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* On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
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* and maybe for later updates, code should write GPIO(N) or:
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* - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
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* - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
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*
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* For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
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* for now, that's != GPIO(N)
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*
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* GPIOs can also be on external chips, numbered after the ones built-in
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* to the DaVinci chip. For now, they won't be usable as IRQ sources.
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*/
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#define GPIO(X) (X) /* 0 <= X <= 70 */
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#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */
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@ -67,11 +71,11 @@ __gpio_to_controller(unsigned gpio)
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void *__iomem ptr;
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if (gpio < 32)
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ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
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ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
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else if (gpio < 64)
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ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
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ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
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else if (gpio < DAVINCI_N_GPIO)
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ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
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ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
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else
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ptr = NULL;
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return ptr;
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}
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/* The get/set/clear functions will inline when called with constant
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* parameters, for low-overhead bitbanging. Illegal constant parameters
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* cause link-time errors.
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* parameters referencing built-in GPIOs, for low-overhead bitbanging.
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*
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* Otherwise, calls with variable parameters use outlined functions.
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* Otherwise, calls with variable parameters or referencing external
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* GPIOs (e.g. on GPIO expander chips) use outlined functions.
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*/
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extern int __error_inval_gpio(void);
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extern void __gpio_set(unsigned gpio, int value);
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extern int __gpio_get(unsigned gpio);
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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if (__builtin_constant_p(value)) {
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if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
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struct gpio_controller *__iomem g;
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u32 mask;
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if (gpio >= DAVINCI_N_GPIO)
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__error_inval_gpio();
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g = __gpio_to_controller(gpio);
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mask = __gpio_mask(gpio);
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if (value)
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return;
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}
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__gpio_set(gpio, value);
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__gpio_set_value(gpio, value);
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}
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/* Returns zero or nonzero; works for gpios configured as inputs OR
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* as outputs.
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* as outputs, at least for built-in GPIOs.
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*
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* NOTE: changes in reported values are synchronized to the GPIO clock.
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* This is most easily seen after calling gpio_set_value() and then immediatly
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* gpio_get_value(), where the gpio_get_value() would return the old value
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* until the GPIO clock ticks and the new value gets latched.
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* NOTE: for built-in GPIOs, changes in reported values are synchronized
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* to the GPIO clock. This is easily seen after calling gpio_set_value()
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* and then immediately gpio_get_value(), where the gpio_get_value() will
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* return the old value until the GPIO clock ticks and the new value gets
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* latched.
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*/
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static inline int gpio_get_value(unsigned gpio)
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{
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struct gpio_controller *__iomem g;
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struct gpio_controller *__iomem g;
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if (!__builtin_constant_p(gpio))
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return __gpio_get(gpio);
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if (gpio >= DAVINCI_N_GPIO)
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return __error_inval_gpio();
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if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
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return __gpio_get_value(gpio);
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g = __gpio_to_controller(gpio);
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return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data));
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return __gpio_mask(gpio) & __raw_readl(&g->in_data);
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}
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/* powerup default direction is IN */
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extern int gpio_direction_input(unsigned gpio);
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extern int gpio_direction_output(unsigned gpio, int value);
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#include <asm-generic/gpio.h> /* cansleep wrappers */
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extern int gpio_request(unsigned gpio, const char *tag);
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extern void gpio_free(unsigned gpio);
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static inline int gpio_cansleep(unsigned gpio)
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{
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if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
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return 0;
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else
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return __gpio_cansleep(gpio);
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}
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static inline int gpio_to_irq(unsigned gpio)
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{
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if (gpio >= DAVINCI_N_GPIO)
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return -EINVAL;
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return DAVINCI_N_AINTC_IRQ + gpio;
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}
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static inline int irq_to_gpio(unsigned irq)
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{
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/* caller guarantees gpio_to_irq() succeeded */
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return irq - DAVINCI_N_AINTC_IRQ;
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}
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