From 0aeab46ed8bde9e5850b2558b99307633093d0a2 Mon Sep 17 00:00:00 2001 From: John Stultz Date: Mon, 14 Aug 2017 13:46:32 -0700 Subject: [PATCH 01/18] kselftests: timers: freq-step: Define ADJ_SETOFFSET if device has older kernel headers On some systems, the kernel headers haven't been updated to include ADJ_SETOFFSET, so define it in the test if needed. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Cc: Shuah Khan Cc: linux-kselftest@vger.kernel.org Signed-off-by: John Stultz --- tools/testing/selftests/timers/freq-step.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/timers/freq-step.c b/tools/testing/selftests/timers/freq-step.c index e8c61830825a..934a308ee686 100644 --- a/tools/testing/selftests/timers/freq-step.c +++ b/tools/testing/selftests/timers/freq-step.c @@ -33,6 +33,10 @@ #define MAX_FREQ_ERROR 10e-6 #define MAX_STDDEV 1000e-9 +#ifndef ADJ_SETOFFSET + #define ADJ_SETOFFSET 0x0100 +#endif + struct sample { double offset; double time; From 6cc636614e144b7cb4c6578bce5cc9b76b7c11e7 Mon Sep 17 00:00:00 2001 From: John Stultz Date: Mon, 14 Aug 2017 13:57:34 -0700 Subject: [PATCH 02/18] kselftests: timers: freq-step: Fix build warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes the following build warning: freq-step.c: In function ‘main’: freq-step.c:271:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ By returning the return values from ksft_success/fail. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Cc: Shuah Khan Cc: linux-kselftest@vger.kernel.org Signed-off-by: John Stultz --- tools/testing/selftests/timers/freq-step.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/timers/freq-step.c b/tools/testing/selftests/timers/freq-step.c index 934a308ee686..926828ea84d1 100644 --- a/tools/testing/selftests/timers/freq-step.c +++ b/tools/testing/selftests/timers/freq-step.c @@ -266,7 +266,7 @@ int main(int argc, char **argv) set_frequency(0.0); if (fails) - ksft_exit_fail(); + return ksft_exit_fail(); - ksft_exit_pass(); + return ksft_exit_pass(); } From a524b1184b8e86141d689fa78ad150fbf2db9b4c Mon Sep 17 00:00:00 2001 From: Greg Hackmann Date: Tue, 25 Jul 2017 14:36:25 -0700 Subject: [PATCH 03/18] kselftests: timers: set-timer-lat: Tweak reporting when timer fires early Rather than printing an error inside the alarm signal handler, set a flag that we check later. This keeps the test from spamming the console every time the alarm fires early. It also fixes the test exiting with error code 0 if this was the only test failure. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Cc: Shuah Khan Cc: linux-kselftest@vger.kernel.org Signed-off-by: Greg Hackmann Signed-off-by: John Stultz --- .../testing/selftests/timers/set-timer-lat.c | 33 ++++++++++++++----- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/tools/testing/selftests/timers/set-timer-lat.c b/tools/testing/selftests/timers/set-timer-lat.c index 4fc98c5b0899..10c2e18737c0 100644 --- a/tools/testing/selftests/timers/set-timer-lat.c +++ b/tools/testing/selftests/timers/set-timer-lat.c @@ -63,6 +63,7 @@ int alarmcount; int clock_id; struct timespec start_time; long long max_latency_ns; +int timer_fired_early; char *clockstring(int clockid) { @@ -115,12 +116,19 @@ void sigalarm(int signo) delta_ns -= NSEC_PER_SEC * TIMER_SECS * alarmcount; if (delta_ns < 0) - printf("%s timer fired early: FAIL\n", clockstring(clock_id)); + timer_fired_early = 1; if (delta_ns > max_latency_ns) max_latency_ns = delta_ns; } +void describe_timer(int flags) +{ + printf("%-22s %s ", + clockstring(clock_id), + flags ? "ABSTIME":"RELTIME"); +} + int do_timer(int clock_id, int flags) { struct sigevent se; @@ -136,6 +144,7 @@ int do_timer(int clock_id, int flags) max_latency_ns = 0; alarmcount = 0; + timer_fired_early = 0; err = timer_create(clock_id, &se, &tm1); if (err) { @@ -170,18 +179,26 @@ int do_timer(int clock_id, int flags) while (alarmcount < 5) sleep(1); - printf("%-22s %s max latency: %10lld ns : ", - clockstring(clock_id), - flags ? "ABSTIME":"RELTIME", - max_latency_ns); + describe_timer(flags); + printf("timer fired early: %7d : ", timer_fired_early); + if (!timer_fired_early) { + printf("[OK]\n"); + } else { + printf("[FAILED]\n"); + err = -1; + } + + describe_timer(flags); + printf("max latency: %10lld ns : ", max_latency_ns); timer_delete(tm1); if (max_latency_ns < UNRESONABLE_LATENCY) { printf("[OK]\n"); - return 0; + } else { + printf("[FAILED]\n"); + err = -1; } - printf("[FAILED]\n"); - return -1; + return err; } int main(void) From 28be3f8f48cfb3cf024860f042d424cd4824f5f7 Mon Sep 17 00:00:00 2001 From: Greg Hackmann Date: Tue, 25 Jul 2017 14:36:26 -0700 Subject: [PATCH 04/18] kselftests: timers: set-timer-lat: Add one-shot timer test cases These testcases are motivated by a recent alarmtimer regression, which caused one-shot CLOCK_{BOOTTIME,REALTIME}_ALARM timers to become periodic timers. The new testcases are very similar to the existing testcases for repeating timers. But rather than waiting for 5 alarms, they wait for 5 seconds and verify that the alarm fired exactly once. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Cc: Shuah Khan Cc: linux-kselftest@vger.kernel.org Signed-off-by: Greg Hackmann Signed-off-by: John Stultz --- .../testing/selftests/timers/set-timer-lat.c | 86 ++++++++++++++++--- 1 file changed, 73 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/timers/set-timer-lat.c b/tools/testing/selftests/timers/set-timer-lat.c index 10c2e18737c0..15434da23b04 100644 --- a/tools/testing/selftests/timers/set-timer-lat.c +++ b/tools/testing/selftests/timers/set-timer-lat.c @@ -20,6 +20,7 @@ */ +#include #include #include #include @@ -122,17 +123,17 @@ void sigalarm(int signo) max_latency_ns = delta_ns; } -void describe_timer(int flags) +void describe_timer(int flags, int interval) { - printf("%-22s %s ", + printf("%-22s %s %s ", clockstring(clock_id), - flags ? "ABSTIME":"RELTIME"); + flags ? "ABSTIME":"RELTIME", + interval ? "PERIODIC":"ONE-SHOT"); } -int do_timer(int clock_id, int flags) +int setup_timer(int clock_id, int flags, int interval, timer_t *tm1) { struct sigevent se; - timer_t tm1; struct itimerspec its1, its2; int err; @@ -146,7 +147,7 @@ int do_timer(int clock_id, int flags) alarmcount = 0; timer_fired_early = 0; - err = timer_create(clock_id, &se, &tm1); + err = timer_create(clock_id, &se, tm1); if (err) { if ((clock_id == CLOCK_REALTIME_ALARM) || (clock_id == CLOCK_BOOTTIME_ALARM)) { @@ -167,19 +168,23 @@ int do_timer(int clock_id, int flags) its1.it_value.tv_sec = TIMER_SECS; its1.it_value.tv_nsec = 0; } - its1.it_interval.tv_sec = TIMER_SECS; + its1.it_interval.tv_sec = interval; its1.it_interval.tv_nsec = 0; - err = timer_settime(tm1, flags, &its1, &its2); + err = timer_settime(*tm1, flags, &its1, &its2); if (err) { printf("%s - timer_settime() failed\n", clockstring(clock_id)); return -1; } - while (alarmcount < 5) - sleep(1); + return 0; +} - describe_timer(flags); +int check_timer_latency(int flags, int interval) +{ + int err = 0; + + describe_timer(flags, interval); printf("timer fired early: %7d : ", timer_fired_early); if (!timer_fired_early) { printf("[OK]\n"); @@ -188,10 +193,9 @@ int do_timer(int clock_id, int flags) err = -1; } - describe_timer(flags); + describe_timer(flags, interval); printf("max latency: %10lld ns : ", max_latency_ns); - timer_delete(tm1); if (max_latency_ns < UNRESONABLE_LATENCY) { printf("[OK]\n"); } else { @@ -201,6 +205,60 @@ int do_timer(int clock_id, int flags) return err; } +int check_alarmcount(int flags, int interval) +{ + describe_timer(flags, interval); + printf("count: %19d : ", alarmcount); + if (alarmcount == 1) { + printf("[OK]\n"); + return 0; + } + printf("[FAILED]\n"); + return -1; +} + +int do_timer(int clock_id, int flags) +{ + timer_t tm1; + const int interval = TIMER_SECS; + int err; + + err = setup_timer(clock_id, flags, interval, &tm1); + if (err) + return err; + + while (alarmcount < 5) + sleep(1); + + timer_delete(tm1); + return check_timer_latency(flags, interval); +} + +int do_timer_oneshot(int clock_id, int flags) +{ + timer_t tm1; + const int interval = 0; + struct timeval timeout; + fd_set fds; + int err; + + err = setup_timer(clock_id, flags, interval, &tm1); + if (err) + return err; + + memset(&timeout, 0, sizeof(timeout)); + timeout.tv_sec = 5; + FD_ZERO(&fds); + do { + err = select(FD_SETSIZE, &fds, NULL, NULL, &timeout); + } while (err == -1 && errno == EINTR); + + timer_delete(tm1); + err = check_timer_latency(flags, interval); + err |= check_alarmcount(flags, interval); + return err; +} + int main(void) { struct sigaction act; @@ -226,6 +284,8 @@ int main(void) ret |= do_timer(clock_id, TIMER_ABSTIME); ret |= do_timer(clock_id, 0); + ret |= do_timer_oneshot(clock_id, TIMER_ABSTIME); + ret |= do_timer_oneshot(clock_id, 0); } if (ret) return ksft_exit_fail(); From a529bea8fa6b6dded6179c72d3385e0f7d0a4fde Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Wed, 28 Jun 2017 22:21:35 +0900 Subject: [PATCH 05/18] timekeeping: Use proper timekeeper for debug code When CONFIG_DEBUG_TIMEKEEPING is enabled the timekeeping_check_update() function will update status like last_warning and underflow_seen on the timekeeper. If there are issues found this state is used to rate limit the warnings that get printed. This rate limiting doesn't really really work if stored in real_tk as the shadow timekeeper is overwritten onto real_tk at the end of every update_wall_time() call, resetting last_warning and other statuses. Fix rate limiting by using the shadow_timekeeper for timekeeping_check_update(). Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Fixes: commit 57d05a93ada7 ("time: Rework debugging variables so they aren't global") Signed-off-by: Stafford Horne Signed-off-by: John Stultz --- kernel/time/timekeeping.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index cedafa008de5..8f5866981883 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -2066,7 +2066,7 @@ void update_wall_time(void) goto out; /* Do some additional sanity checking */ - timekeeping_check_update(real_tk, offset); + timekeeping_check_update(tk, offset); /* * With NO_HZ we may have to accumulate many cycle_intervals From 47b4a457e4cc816b3fdd2ee55c65fda8ea6de051 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 5 Jul 2017 14:08:35 +0200 Subject: [PATCH 06/18] alarmtimer: Fix unavailable wake-up source in sysfs Currently the alarmtimer registers a wake-up source unconditionally, regardless of the system having a (wake-up capable) RTC or not. Hence the alarmtimer will always show up in /sys/kernel/debug/wakeup_sources, even if it is not available, and thus cannot be a wake-up source. To fix this, postpone registration until a wake-up capable RTC device is added. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Miroslav Lichvar Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Geert Uytterhoeven Signed-off-by: John Stultz --- kernel/time/alarmtimer.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index 0b8ff7d257ea..73a2b476e59f 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c @@ -56,9 +56,9 @@ static ktime_t freezer_delta; static DEFINE_SPINLOCK(freezer_delta_lock); #endif +#ifdef CONFIG_RTC_CLASS static struct wakeup_source *ws; -#ifdef CONFIG_RTC_CLASS /* rtc timer and device for setting alarm wakeups at suspend */ static struct rtc_timer rtctimer; static struct rtc_device *rtcdev; @@ -89,6 +89,7 @@ static int alarmtimer_rtc_add_device(struct device *dev, { unsigned long flags; struct rtc_device *rtc = to_rtc_device(dev); + struct wakeup_source *__ws; if (rtcdev) return -EBUSY; @@ -98,13 +99,20 @@ static int alarmtimer_rtc_add_device(struct device *dev, if (!device_may_wakeup(rtc->dev.parent)) return -1; + __ws = wakeup_source_register("alarmtimer"); + spin_lock_irqsave(&rtcdev_lock, flags); if (!rtcdev) { rtcdev = rtc; /* hold a reference so it doesn't go away */ get_device(dev); + ws = __ws; + __ws = NULL; } spin_unlock_irqrestore(&rtcdev_lock, flags); + + wakeup_source_unregister(__ws); + return 0; } @@ -860,7 +868,6 @@ static int __init alarmtimer_init(void) error = PTR_ERR(pdev); goto out_drv; } - ws = wakeup_source_register("alarmtimer"); return 0; out_drv: From 3cf294962df8fcde710eb5e762e0929e2ba49947 Mon Sep 17 00:00:00 2001 From: Krzysztof Opasiak Date: Wed, 5 Jul 2017 19:25:48 +0200 Subject: [PATCH 07/18] posix-cpu-timers: Use dedicated helper to access rlimit values Use rlimit() and rlimit_max() helper instead of manually writing whole chain from task to rlimit value Signed-off-by: Krzysztof Opasiak Signed-off-by: Thomas Gleixner Link: http://lkml.kernel.org/r/20170705172548.7911-1-k.opasiak@samsung.com --- kernel/time/posix-cpu-timers.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/kernel/time/posix-cpu-timers.c b/kernel/time/posix-cpu-timers.c index a3bd5dbe0dc4..8585ad6e472a 100644 --- a/kernel/time/posix-cpu-timers.c +++ b/kernel/time/posix-cpu-timers.c @@ -799,7 +799,6 @@ static void check_thread_timers(struct task_struct *tsk, struct list_head *firing) { struct list_head *timers = tsk->cpu_timers; - struct signal_struct *const sig = tsk->signal; struct task_cputime *tsk_expires = &tsk->cputime_expires; u64 expires; unsigned long soft; @@ -823,10 +822,9 @@ static void check_thread_timers(struct task_struct *tsk, /* * Check for the special case thread timers. */ - soft = READ_ONCE(sig->rlim[RLIMIT_RTTIME].rlim_cur); + soft = task_rlimit(tsk, RLIMIT_RTTIME); if (soft != RLIM_INFINITY) { - unsigned long hard = - READ_ONCE(sig->rlim[RLIMIT_RTTIME].rlim_max); + unsigned long hard = task_rlimit_max(tsk, RLIMIT_RTTIME); if (hard != RLIM_INFINITY && tsk->rt.timeout > DIV_ROUND_UP(hard, USEC_PER_SEC/HZ)) { @@ -847,7 +845,8 @@ static void check_thread_timers(struct task_struct *tsk, */ if (soft < hard) { soft += USEC_PER_SEC; - sig->rlim[RLIMIT_RTTIME].rlim_cur = soft; + tsk->signal->rlim[RLIMIT_RTTIME].rlim_cur = + soft; } if (print_fatal_signals) { pr_info("RT Watchdog Timeout (soft): %s[%d]\n", @@ -938,11 +937,10 @@ static void check_process_timers(struct task_struct *tsk, SIGPROF); check_cpu_itimer(tsk, &sig->it[CPUCLOCK_VIRT], &virt_expires, utime, SIGVTALRM); - soft = READ_ONCE(sig->rlim[RLIMIT_CPU].rlim_cur); + soft = task_rlimit(tsk, RLIMIT_CPU); if (soft != RLIM_INFINITY) { unsigned long psecs = div_u64(ptime, NSEC_PER_SEC); - unsigned long hard = - READ_ONCE(sig->rlim[RLIMIT_CPU].rlim_max); + unsigned long hard = task_rlimit_max(tsk, RLIMIT_CPU); u64 x; if (psecs >= hard) { /* From 34b0c26cd5458a991626bc8424e029562dceed21 Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Tue, 1 Aug 2017 16:40:16 +0800 Subject: [PATCH 08/18] dt-bindings: timer: Add nxp tpm timer binding doc Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM) binding doc. Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Shawn Guo Cc: Bai Ping Acked-by: Rob Herring Signed-off-by: Dong Aisheng Signed-off-by: Daniel Lezcano --- .../bindings/timer/nxp,tpm-timer.txt | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt new file mode 100644 index 000000000000..b4aa7ddb5b13 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt @@ -0,0 +1,28 @@ +NXP Low Power Timer/Pulse Width Modulation Module (TPM) + +The Timer/PWM Module (TPM) supports input capture, output compare, +and the generation of PWM signals to control electric motor and power +management applications. The counter, compare and capture registers +are clocked by an asynchronous clock that can remain enabled in low +power modes. TPM can support global counter bus where one TPM drives +the counter bus for the others, provided bit width is the same. + +Required properties: + +- compatible : should be "fsl,imx7ulp-tpm" +- reg : Specifies base physical address and size of the register sets + for the clock event device and clock source device. +- interrupts : Should be the clock event device interrupt. +- clocks : The clocks provided by the SoC to drive the timer, must contain + an entry for each entry in clock-names. +- clock-names : Must include the following entries: "igp" and "per". + +Example: +tpm5: tpm@40260000 { + compatible = "fsl,imx7ulp-tpm"; + reg = <0x40260000 0x1000>; + interrupts = ; + clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, + <&clks IMX7ULP_CLK_LPTPM5>; + clock-names = "ipg", "per"; +}; From 059ab7b82eecfc23bc58c491d72ee6b424163578 Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Tue, 1 Aug 2017 16:40:17 +0800 Subject: [PATCH 09/18] clocksource/drivers/imx-tpm: Add imx tpm timer support IMX Timer/PWM Module (TPM) supports both timer and pwm function while this patch only adds the timer support. PWM would be added later. The TPM counter, compare and capture registers are clocked by an asynchronous clock that can remain enabled in low power modes. NOTE: We observed in a very small probability, the bus fabric contention between GPU and A7 may results a few cycles delay of writing CNT registers which may cause the min_delta event got missed, so we need add a ETIME check here in case it happened. Cc: Daniel Lezcano Cc: Arnd Bergmann Cc: Thomas Gleixner Cc: Shawn Guo Cc: Anson Huang Cc: Bai Ping Signed-off-by: Dong Aisheng Signed-off-by: Daniel Lezcano --- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-imx-tpm.c | 239 ++++++++++++++++++++++++++++ 3 files changed, 248 insertions(+) create mode 100644 drivers/clocksource/timer-imx-tpm.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index fcae5ca6ac92..0a953fc45a0e 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -598,6 +598,14 @@ config CLKSRC_IMX_GPT depends on ARM && CLKDEV_LOOKUP select CLKSRC_MMIO +config CLKSRC_IMX_TPM + bool "Clocksource using i.MX TPM" if COMPILE_TEST + depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS + select CLKSRC_MMIO + help + Enable this option to use IMX Timer/PWM Module (TPM) timer as + clocksource. + config CLKSRC_ST_LPC bool "Low power clocksource found in the LPC" if COMPILE_TEST select TIMER_OF if OF diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 6df949402dfc..dbc1ad14515e 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -67,6 +67,7 @@ obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o +obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o obj-$(CONFIG_H8300_TMR8) += h8300_timer8.o obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o diff --git a/drivers/clocksource/timer-imx-tpm.c b/drivers/clocksource/timer-imx-tpm.c new file mode 100644 index 000000000000..21bffdcb2f20 --- /dev/null +++ b/drivers/clocksource/timer-imx-tpm.c @@ -0,0 +1,239 @@ +/* + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPM_SC 0x10 +#define TPM_SC_CMOD_INC_PER_CNT (0x1 << 3) +#define TPM_SC_CMOD_DIV_DEFAULT 0x3 +#define TPM_CNT 0x14 +#define TPM_MOD 0x18 +#define TPM_STATUS 0x1c +#define TPM_STATUS_CH0F BIT(0) +#define TPM_C0SC 0x20 +#define TPM_C0SC_CHIE BIT(6) +#define TPM_C0SC_MODE_SHIFT 2 +#define TPM_C0SC_MODE_MASK 0x3c +#define TPM_C0SC_MODE_SW_COMPARE 0x4 +#define TPM_C0V 0x24 + +static void __iomem *timer_base; +static struct clock_event_device clockevent_tpm; + +static inline void tpm_timer_disable(void) +{ + unsigned int val; + + /* channel disable */ + val = readl(timer_base + TPM_C0SC); + val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE); + writel(val, timer_base + TPM_C0SC); +} + +static inline void tpm_timer_enable(void) +{ + unsigned int val; + + /* channel enabled in sw compare mode */ + val = readl(timer_base + TPM_C0SC); + val |= (TPM_C0SC_MODE_SW_COMPARE << TPM_C0SC_MODE_SHIFT) | + TPM_C0SC_CHIE; + writel(val, timer_base + TPM_C0SC); +} + +static inline void tpm_irq_acknowledge(void) +{ + writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS); +} + +static struct delay_timer tpm_delay_timer; + +static inline unsigned long tpm_read_counter(void) +{ + return readl(timer_base + TPM_CNT); +} + +static unsigned long tpm_read_current_timer(void) +{ + return tpm_read_counter(); +} + +static u64 notrace tpm_read_sched_clock(void) +{ + return tpm_read_counter(); +} + +static int __init tpm_clocksource_init(unsigned long rate) +{ + tpm_delay_timer.read_current_timer = &tpm_read_current_timer; + tpm_delay_timer.freq = rate; + register_current_timer_delay(&tpm_delay_timer); + + sched_clock_register(tpm_read_sched_clock, 32, rate); + + return clocksource_mmio_init(timer_base + TPM_CNT, "imx-tpm", + rate, 200, 32, clocksource_mmio_readl_up); +} + +static int tpm_set_next_event(unsigned long delta, + struct clock_event_device *evt) +{ + unsigned long next, now; + + next = tpm_read_counter(); + next += delta; + writel(next, timer_base + TPM_C0V); + now = tpm_read_counter(); + + /* + * NOTE: We observed in a very small probability, the bus fabric + * contention between GPU and A7 may results a few cycles delay + * of writing CNT registers which may cause the min_delta event got + * missed, so we need add a ETIME check here in case it happened. + */ + return (int)((next - now) <= 0) ? -ETIME : 0; +} + +static int tpm_set_state_oneshot(struct clock_event_device *evt) +{ + tpm_timer_enable(); + + return 0; +} + +static int tpm_set_state_shutdown(struct clock_event_device *evt) +{ + tpm_timer_disable(); + + return 0; +} + +static irqreturn_t tpm_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = dev_id; + + tpm_irq_acknowledge(); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct clock_event_device clockevent_tpm = { + .name = "i.MX7ULP TPM Timer", + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_state_oneshot = tpm_set_state_oneshot, + .set_next_event = tpm_set_next_event, + .set_state_shutdown = tpm_set_state_shutdown, + .rating = 200, +}; + +static int __init tpm_clockevent_init(unsigned long rate, int irq) +{ + int ret; + + ret = request_irq(irq, tpm_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, + "i.MX7ULP TPM Timer", &clockevent_tpm); + + clockevent_tpm.cpumask = cpumask_of(0); + clockevent_tpm.irq = irq; + clockevents_config_and_register(&clockevent_tpm, + rate, 300, 0xfffffffe); + + return ret; +} + +static int __init tpm_timer_init(struct device_node *np) +{ + struct clk *ipg, *per; + int irq, ret; + u32 rate; + + timer_base = of_iomap(np, 0); + if (!timer_base) { + pr_err("tpm: failed to get base address\n"); + return -ENXIO; + } + + irq = irq_of_parse_and_map(np, 0); + if (!irq) { + pr_err("tpm: failed to get irq\n"); + ret = -ENOENT; + goto err_iomap; + } + + ipg = of_clk_get_by_name(np, "ipg"); + per = of_clk_get_by_name(np, "per"); + if (IS_ERR(ipg) || IS_ERR(per)) { + pr_err("tpm: failed to get igp or per clk\n"); + ret = -ENODEV; + goto err_clk_get; + } + + /* enable clk before accessing registers */ + ret = clk_prepare_enable(ipg); + if (ret) { + pr_err("tpm: ipg clock enable failed (%d)\n", ret); + goto err_clk_get; + } + + ret = clk_prepare_enable(per); + if (ret) { + pr_err("tpm: per clock enable failed (%d)\n", ret); + goto err_per_clk_enable; + } + + /* + * Initialize tpm module to a known state + * 1) Counter disabled + * 2) TPM counter operates in up counting mode + * 3) Timer Overflow Interrupt disabled + * 4) Channel0 disabled + * 5) DMA transfers disabled + */ + writel(0, timer_base + TPM_SC); + writel(0, timer_base + TPM_CNT); + writel(0, timer_base + TPM_C0SC); + + /* increase per cnt, div 8 by default */ + writel(TPM_SC_CMOD_INC_PER_CNT | TPM_SC_CMOD_DIV_DEFAULT, + timer_base + TPM_SC); + + /* set MOD register to maximum for free running mode */ + writel(0xffffffff, timer_base + TPM_MOD); + + rate = clk_get_rate(per) >> 3; + ret = tpm_clocksource_init(rate); + if (ret) + goto err_per_clk_enable; + + ret = tpm_clockevent_init(rate, irq); + if (ret) + goto err_per_clk_enable; + + return 0; + +err_per_clk_enable: + clk_disable_unprepare(ipg); +err_clk_get: + clk_put(per); + clk_put(ipg); +err_iomap: + iounmap(timer_base); + return ret; +} +TIMER_OF_DECLARE(imx7ulp, "fsl,imx7ulp-tpm", tpm_timer_init); From 46f6c0479784f87e532fae6aa37826e1565e584d Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:23:53 +0900 Subject: [PATCH 10/18] devicetree: bindings: Remove sh7372 CMT binding Remove the sh7372 CMT compat string to reduce maintenance burden. It should be fine to break DT compatibility because: 1) The sh7372 SoC support has been removed from upstream 2) The sh7372 CMT DT binding was never part of upstream DTS 3) The CMT driver never matches on the sh7372 binding Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 1a05c1b243c1..961c0b6df957 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -14,32 +14,26 @@ Required Properties: - compatible: must contain one or more of the following: - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT (CMT0) - - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT - (CMT0) - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT (CMT0) - "renesas,cmt-32" for all 32-bit CMT without fast clock support - (CMT0 on sh7372, sh73a0 and r8a7740) + (CMT0 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-32-* entries. - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast clock support (CMT[234]) - - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast - clock support (CMT[234]) - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast clock support (CMT[234]) - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support - (CMT[234] on sh7372, sh73a0 and r8a7740) + (CMT[234] on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-32-fast-* entries. - - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT - (CMT1) - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT (CMT1) - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT (CMT1) - "renesas,cmt-48" for all non-second generation 48-bit CMT - (CMT1 on sh7372, sh73a0 and r8a7740) + (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT From 6f54cc1adcc8957f4e017068ea1a76e3300a78bf Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:24:03 +0900 Subject: [PATCH 11/18] devicetree: bindings: R-Car Gen2 CMT0 and CMT1 bindings Add documentation for new separate CMT0 and CMT1 DT compatible strings for R-Car Gen2. These compat strings allow us to enable CMT1-specific features in the driver. The old compat strings will be deprecated in the not so distant future. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 961c0b6df957..2583aebc79b6 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -36,6 +36,9 @@ Required Properties: (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. + - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2. + - "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2. + - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT (CMT[01]) - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT From 7f03a0ecfdc786c1fefac988c128218edbbf3b44 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:24:13 +0900 Subject: [PATCH 12/18] devicetree: bindings: r8a73a4 and R-Car Gen2 CMT bindings Update SoC-specific bindings for r8a73a4 and R-Car Gen2 CMT0 and CMT1. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 24 +++++++++++-------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 2583aebc79b6..e81e0d21d5c5 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -36,19 +36,23 @@ Required Properties: (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. + - "renesas,cmt0-r8a73a4" for the 32-bit CMT0 device included in r8a73a4. + - "renesas,cmt1-r8a73a4" for the 48-bit CMT1 device included in r8a73a4. + - "renesas,cmt0-r8a7790" for the 32-bit CMT0 device included in r8a7790. + - "renesas,cmt1-r8a7790" for the 48-bit CMT1 device included in r8a7790. + - "renesas,cmt0-r8a7791" for the 32-bit CMT0 device included in r8a7791. + - "renesas,cmt1-r8a7791" for the 48-bit CMT1 device included in r8a7791. + - "renesas,cmt0-r8a7793" for the 32-bit CMT0 device included in r8a7793. + - "renesas,cmt1-r8a7793" for the 48-bit CMT1 device included in r8a7793. + - "renesas,cmt0-r8a7794" for the 32-bit CMT0 device included in r8a7794. + - "renesas,cmt1-r8a7794" for the 48-bit CMT1 device included in r8a7794. + - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2. - "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2. + These are fallbacks for r8a73a4 and all the R-Car Gen2 + entries listed above. - - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-gen2" for all second generation 48-bit CMT - (CMT[01] on r8a73a4, r8a7790 and r8a7791) - This is a fallback for the renesas,cmt-48-r8a73a4, - renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries. + - "renesas,cmt-48-gen2" is , use "renesas,cmt[01]-*" instead. - reg: base address and length of the registers block for the timer module. - interrupts: interrupt-specifier for the timer, one per channel. From 63d9e8ca0dd4bfa4cb917b8cfb22311a3808ece3 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:24:24 +0900 Subject: [PATCH 13/18] devicetree: bindings: Deprecate property, update example Deprecate "renesas,channels-mask" and update the r8a7790 CMT example. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 26 +++++++++++++------ 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index e81e0d21d5c5..8fb7c937d297 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -60,21 +60,31 @@ Required Properties: in clock-names. - clock-names: must contain "fck" for the functional clock. - - renesas,channels-mask: bitmask of the available channels. + - renesas,channels-mask: , information kept in device driver. -Example: R8A7790 (R-Car H2) CMT0 node - - CMT0 on R8A7790 implements hardware channels 5 and 6 only and names - them channels 0 and 1 in the documentation. +Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes cmt0: timer@ffca0000 { - compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; + compatible = "renesas,cmt0-r8a7790", "renesas,rcar-gen2-cmt0"; reg = <0 0xffca0000 0 0x1004>; interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, <0 142 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7790_CLK_CMT0>; clock-names = "fck"; - - renesas,channels-mask = <0x60>; + }; + + cmt1: timer@e6130000 { + compatible = "renesas,cmt1-r8a7790", "renesas,rcar-gen2-cmt1"; + reg = <0 0xe6130000 0 0x1004>; + interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, + <0 121 IRQ_TYPE_LEVEL_HIGH>, + <0 122 IRQ_TYPE_LEVEL_HIGH>, + <0 123 IRQ_TYPE_LEVEL_HIGH>, + <0 124 IRQ_TYPE_LEVEL_HIGH>, + <0 125 IRQ_TYPE_LEVEL_HIGH>, + <0 126 IRQ_TYPE_LEVEL_HIGH>, + <0 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7790_CLK_CMT1>; + clock-names = "fck"; }; From 203bb3479958c48ac84ed015061f5d9746f1e3fc Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:24:34 +0900 Subject: [PATCH 14/18] devicetree: bindings: Remove unused 32-bit CMT bindings Remove the 32-bit CMT compat strings to reduce maintenance burden. It should be fine to break DT compatibility because the 32-bit CMT DT binding was never part of any upstream DTS file. Signed-off-by: Magnus Damm Acked-by: Rob Herring Acked-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 8fb7c937d297..d79293a2bb44 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -12,22 +12,6 @@ datasheets. Required Properties: - compatible: must contain one or more of the following: - - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT - (CMT0) - - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT - (CMT0) - - "renesas,cmt-32" for all 32-bit CMT without fast clock support - (CMT0 on sh73a0 and r8a7740) - This is a fallback for the above renesas,cmt-32-* entries. - - - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast - clock support (CMT[234]) - - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast - clock support (CMT[234]) - - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support - (CMT[234] on sh73a0 and r8a7740) - This is a fallback for the above renesas,cmt-32-fast-* entries. - - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT (CMT1) - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT From 4e18111ff38f066422c05f904b3bb4fea981d48e Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 14 Mar 2016 23:24:45 +0900 Subject: [PATCH 15/18] devicetree: bindings: Remove deprecated properties The deprecated DT properties are part of the GIT history, no need to keep them around any longer. Signed-off-by: Magnus Damm Acked-by: Rob Herring Acked-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 4 ---- 1 file changed, 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index d79293a2bb44..6ca6b9e582a0 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -36,16 +36,12 @@ Required Properties: These are fallbacks for r8a73a4 and all the R-Car Gen2 entries listed above. - - "renesas,cmt-48-gen2" is , use "renesas,cmt[01]-*" instead. - - reg: base address and length of the registers block for the timer module. - interrupts: interrupt-specifier for the timer, one per channel. - clocks: a list of phandle + clock-specifier pairs, one for each entry in clock-names. - clock-names: must contain "fck" for the functional clock. - - renesas,channels-mask: , information kept in device driver. - Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes From ebbe266509d8a5453f51f77277da65d870125b72 Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Sun, 27 Aug 2017 21:38:13 +0200 Subject: [PATCH 16/18] clocksource/drivers/bcm2835: Remove message for a memory allocation failure The bcm2835_timer_init() function emits an error message in case of a memory allocation failure. This is pointless as the mm core does that already. Remove this message. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring Signed-off-by: Daniel Lezcano --- drivers/clocksource/bcm2835_timer.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c index 82828d3a4739..39e489a96ad7 100644 --- a/drivers/clocksource/bcm2835_timer.c +++ b/drivers/clocksource/bcm2835_timer.c @@ -114,7 +114,6 @@ static int __init bcm2835_timer_init(struct device_node *node) timer = kzalloc(sizeof(*timer), GFP_KERNEL); if (!timer) { - pr_err("Can't allocate timer struct\n"); ret = -ENOMEM; goto err_iounmap; } From 469869d18a886e046161ca65516bd3ffcd2f804b Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 18 Jul 2017 16:42:53 -0500 Subject: [PATCH 17/18] clocksource: Convert to using %pOF instead of full_name Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Marc Gonzalez Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: linux-arm-kernel@lists.infradead.org Acked-by: Marc Gonzalez Acked-by: Alexandre TORGUE Signed-off-by: Daniel Lezcano --- drivers/clocksource/tango_xtal.c | 6 +++--- drivers/clocksource/timer-of.c | 11 +++++------ drivers/clocksource/timer-probe.c | 3 +-- drivers/clocksource/timer-stm32.c | 8 ++++---- 4 files changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/clocksource/tango_xtal.c b/drivers/clocksource/tango_xtal.c index c4e1c2e6046f..6a8d9838ce33 100644 --- a/drivers/clocksource/tango_xtal.c +++ b/drivers/clocksource/tango_xtal.c @@ -26,13 +26,13 @@ static int __init tango_clocksource_init(struct device_node *np) xtal_in_cnt = of_iomap(np, 0); if (xtal_in_cnt == NULL) { - pr_err("%s: invalid address\n", np->full_name); + pr_err("%pOF: invalid address\n", np); return -ENXIO; } clk = of_clk_get(np, 0); if (IS_ERR(clk)) { - pr_err("%s: invalid clock\n", np->full_name); + pr_err("%pOF: invalid clock\n", np); return PTR_ERR(clk); } @@ -43,7 +43,7 @@ static int __init tango_clocksource_init(struct device_node *np) ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350, 32, clocksource_mmio_readl_up); if (ret) { - pr_err("%s: registration failed\n", np->full_name); + pr_err("%pOF: registration failed\n", np); return ret; } diff --git a/drivers/clocksource/timer-of.c b/drivers/clocksource/timer-of.c index d509b500a7b5..64e00dd41e6f 100644 --- a/drivers/clocksource/timer-of.c +++ b/drivers/clocksource/timer-of.c @@ -52,7 +52,7 @@ static __init int timer_irq_init(struct device_node *np, of_irq->irq = irq_of_parse_and_map(np, of_irq->index); } if (!of_irq->irq) { - pr_err("Failed to map interrupt for %s\n", np->full_name); + pr_err("Failed to map interrupt for %pOF\n", np); return -EINVAL; } @@ -63,8 +63,7 @@ static __init int timer_irq_init(struct device_node *np, of_irq->flags ? of_irq->flags : IRQF_TIMER, np->full_name, clkevt); if (ret) { - pr_err("Failed to request irq %d for %s\n", of_irq->irq, - np->full_name); + pr_err("Failed to request irq %d for %pOF\n", of_irq->irq, np); return ret; } @@ -88,20 +87,20 @@ static __init int timer_clk_init(struct device_node *np, of_clk->clk = of_clk->name ? of_clk_get_by_name(np, of_clk->name) : of_clk_get(np, of_clk->index); if (IS_ERR(of_clk->clk)) { - pr_err("Failed to get clock for %s\n", np->full_name); + pr_err("Failed to get clock for %pOF\n", np); return PTR_ERR(of_clk->clk); } ret = clk_prepare_enable(of_clk->clk); if (ret) { - pr_err("Failed for enable clock for %s\n", np->full_name); + pr_err("Failed for enable clock for %pOF\n", np); goto out_clk_put; } of_clk->rate = clk_get_rate(of_clk->clk); if (!of_clk->rate) { ret = -EINVAL; - pr_err("Failed to get clock rate for %s\n", np->full_name); + pr_err("Failed to get clock rate for %pOF\n", np); goto out_clk_disable; } diff --git a/drivers/clocksource/timer-probe.c b/drivers/clocksource/timer-probe.c index da81e5de74fe..028075720334 100644 --- a/drivers/clocksource/timer-probe.c +++ b/drivers/clocksource/timer-probe.c @@ -40,8 +40,7 @@ void __init timer_probe(void) ret = init_func_ret(np); if (ret) { - pr_err("Failed to initialize '%s': %d\n", - of_node_full_name(np), ret); + pr_err("Failed to initialize '%pOF': %d\n", np, ret); continue; } diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index 174d1243ea93..8f2423789ba9 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -138,7 +138,7 @@ static int __init stm32_clockevent_init(struct device_node *np) irq = irq_of_parse_and_map(np, 0); if (!irq) { ret = -EINVAL; - pr_err("%s: failed to get irq.\n", np->full_name); + pr_err("%pOF: failed to get irq.\n", np); goto err_get_irq; } @@ -168,12 +168,12 @@ static int __init stm32_clockevent_init(struct device_node *np) ret = request_irq(irq, stm32_clock_event_handler, IRQF_TIMER, "stm32 clockevent", data); if (ret) { - pr_err("%s: failed to request irq.\n", np->full_name); + pr_err("%pOF: failed to request irq.\n", np); goto err_get_irq; } - pr_info("%s: STM32 clockevent driver initialized (%d bits)\n", - np->full_name, bits); + pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n", + np, bits); return ret; From 51218298a25e6942957c5595f2abf130d47d5df9 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Mon, 21 Aug 2017 00:01:46 +0200 Subject: [PATCH 18/18] alarmtimer: Ensure RTC module is not unloaded When registering the rtc device to be used to handle alarm timers, get_device is used to ensure the device doesn't go away but the module can still be unloaded. Call try_module_get to ensure the rtc driver will not go away. Reported-and-tested-by: Michal Simek Signed-off-by: Alexandre Belloni Signed-off-by: Thomas Gleixner Acked-by: John Stultz Cc: Stephen Boyd Link: http://lkml.kernel.org/r/20170820220146.30969-1-alexandre.belloni@free-electrons.com --- kernel/time/alarmtimer.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index 73a2b476e59f..ec09ce9a6012 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "posix-timers.h" @@ -103,6 +104,11 @@ static int alarmtimer_rtc_add_device(struct device *dev, spin_lock_irqsave(&rtcdev_lock, flags); if (!rtcdev) { + if (!try_module_get(rtc->owner)) { + spin_unlock_irqrestore(&rtcdev_lock, flags); + return -1; + } + rtcdev = rtc; /* hold a reference so it doesn't go away */ get_device(dev);