MLK-15962: pxp-v3: fix pxp operation timeout issue
PxP block on imx6sll, imx6ull is different with imx7d, the node path_ctrl should be different. So add path_ctrl for 6sll, 6ull. Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>pull/10/head
Guoniu.Zhou
Jason Liu
parent
b5cf39d975
commit
dda914f809
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@ -196,6 +196,7 @@ static struct kmem_cache *tx_desc_cache;
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static struct kmem_cache *edge_node_cache;
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static struct pxp_collision_info col_info;
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static dma_addr_t paddr;
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static bool v3p_flag;
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struct pxp_dma {
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struct dma_device dma;
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@ -637,7 +638,7 @@ struct path_node {
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static struct vetex_node adj_list[PXP_2D_NUM];
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static struct path_node path_table[PXP_2D_NUM][PXP_2D_NUM];
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static bool adj_array[PXP_2D_NUM][PXP_2D_NUM] = {
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static bool adj_array_v3[PXP_2D_NUM][PXP_2D_NUM] = {
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/* 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 */
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{0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 0 */
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{0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, /* 1 */
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@ -657,7 +658,8 @@ static bool adj_array[PXP_2D_NUM][PXP_2D_NUM] = {
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 15 */
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};
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static struct mux muxes[16] = {
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static struct mux muxes_v3[16] = {
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{
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/* mux0 */
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.id = 0,
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@ -741,6 +743,110 @@ static struct mux muxes[16] = {
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},
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};
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static bool adj_array_v3p[PXP_2D_NUM][PXP_2D_NUM] = {
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/* 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 */
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{0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 0 */
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{0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, /* 1 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 2 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 3 */
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{0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 4 */
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{0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 5 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0}, /* 6 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0}, /* 7 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 8 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 9 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0}, /* 10 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0}, /* 11 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0}, /* 12 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 13 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 14 */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* 15 */
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};
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static struct mux muxes_v3p[16] = {
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{
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/* mux0 */
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.id = 0,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux1 */
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.id = 1,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux2 */
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.id = 2,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux3 */
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.id = 3,
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.mux_inputs = {PXP_2D_CSC1, PXP_2D_ROTATION1, 0xff, 0xff},
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.mux_outputs = {PXP_2D_ALPHA0_S0, 0xff},
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}, {
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/* mux4 is not used in ULT1 */
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.id = 4,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux5 */
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.id = 5,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux6 */
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.id = 6,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux7 */
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.id = 7,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux8 */
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.id = 8,
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.mux_inputs = {PXP_2D_CSC2, PXP_2D_ALPHA0_S0_S1, 0xff, 0xff},
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.mux_outputs = {PXP_2D_MUX_MUX9, PXP_2D_MUX_MUX11},
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}, {
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/* mux9 */
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.id = 9,
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.mux_inputs = {0xff, PXP_2D_MUX_MUX8, 0xff, 0xff},
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.mux_outputs = {PXP_2D_LUT, 0xff},
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}, {
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/* mux10 */
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.id = 10,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux11 */
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.id = 11,
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.mux_inputs = {PXP_2D_LUT, PXP_2D_MUX_MUX8, 0xff, 0xff},
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.mux_outputs = {PXP_2D_MUX_MUX12, PXP_2D_ROTATION0},
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}, {
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/* mux12 */
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.id = 12,
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.mux_inputs = {PXP_2D_ROTATION0, PXP_2D_MUX_MUX11, 0xff, 0xff},
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.mux_outputs = {PXP_2D_MUX_MUX14, 0xff},
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}, {
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/* mux13 */
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.id = 13,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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}, {
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/* mux14 */
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.id = 14,
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.mux_inputs = {0xff, PXP_2D_MUX_MUX12, 0xff, 0xff},
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.mux_outputs = {PXP_2D_OUT, 0xff},
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}, {
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/* mux15 */
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.id = 15,
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.mux_inputs = {0xff, 0xff, 0xff, 0xff},
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.mux_outputs = {0xff, 0xff},
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},
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};
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static void __iomem *pxp_reg_base;
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#define pxp_writel(val, reg) writel(val, pxp_reg_base + (reg))
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@ -7192,6 +7298,9 @@ static bool search_mux_chain(uint32_t mux_id,
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bool found = false;
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uint32_t i, j, next_mux = 0;
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uint32_t output;
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struct mux *muxes;
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muxes = (v3p_flag) ? muxes_v3p : muxes_v3;
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for (i = 0; i < 2; i++) {
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output = muxes[mux_id].mux_outputs[i];
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@ -7228,10 +7337,13 @@ static void enode_mux_config(unsigned int vnode_id,
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{
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uint32_t i, j;
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bool via_mux = false, need_search = false;
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struct mux *muxes;
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BUG_ON(vnode_id >= PXP_2D_NUM);
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BUG_ON(enode->adjvex >= PXP_2D_NUM);
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muxes = (v3p_flag) ? muxes_v3p : muxes_v3;
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for (i = 0; i < 16; i++) {
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for (j = 0; j < 4; j++) {
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if (muxes[i].mux_inputs[j] == 0xff)
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@ -7267,8 +7379,11 @@ static void enode_mux_config(unsigned int vnode_id,
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static int pxp_create_initial_graph(struct platform_device *pdev)
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{
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int i, j, first;
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static bool (*adj_array)[PXP_2D_NUM];
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struct edge_node *enode, *curr = NULL;
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adj_array = (v3p_flag) ? adj_array_v3p : adj_array_v3;
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for (i = 0; i < PXP_2D_NUM; i++) {
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switch (i) {
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case PXP_2D_PS:
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@ -7436,6 +7551,8 @@ static int pxp_probe(struct platform_device *pdev)
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pxp->pdev = pdev;
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pxp->devdata = &pxp_devdata[pdev->id_entry->driver_data];
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v3p_flag = (pxp_is_v3p(pxp)) ? true : false;
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pxp->ipg_clk = devm_clk_get(&pdev->dev, "pxp_ipg");
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pxp->axi_clk = devm_clk_get(&pdev->dev, "pxp_axi");
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