gpio/omap: _clear_gpio_irqbank: fix flushing of posted write
In commit 78a1a6d341
(ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.
Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.
Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.
Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -700,12 +700,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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else if (cpu_is_omap44xx())
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reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
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if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
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__raw_writel(gpio_mask, reg);
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/* Flush posted write for the irq status to avoid spurious interrupts */
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__raw_readl(reg);
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}
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}
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static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
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