MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_OCTEON_2ND_KERNEL
This config option never really worked, and has bit-rotted to the point of being completely useless. Remove it completely. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -25,15 +25,6 @@ endif # CPU_CAVIUM_OCTEON
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if CAVIUM_OCTEON_SOC
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config CAVIUM_OCTEON_2ND_KERNEL
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bool "Build the kernel to be used as a 2nd kernel on the same chip"
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default "n"
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help
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This option configures this kernel to be linked at a different
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address and use the 2nd uart for output. This allows a kernel built
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with this option to be run at the same time as one built without this
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option.
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config CAVIUM_OCTEON_LOCK_L2
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bool "Lock often used kernel code in the L2"
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default "y"
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@ -4,8 +4,4 @@
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platform-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon/
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cflags-$(CONFIG_CAVIUM_OCTEON_SOC) += \
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-I$(srctree)/arch/mips/include/asm/mach-cavium-octeon
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ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
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load-$(CONFIG_CAVIUM_OCTEON_SOC) += 0xffffffff84100000
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else
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load-$(CONFIG_CAVIUM_OCTEON_SOC) += 0xffffffff81100000
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endif
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@ -374,14 +374,8 @@ void octeon_write_lcd(const char *s)
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*/
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int octeon_get_boot_uart(void)
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{
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int uart;
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#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
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uart = 1;
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#else
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uart = (octeon_boot_desc_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1) ?
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return (octeon_boot_desc_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1) ?
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1 : 0;
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#endif
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return uart;
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}
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/**
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@ -901,14 +895,10 @@ void __init prom_init(void)
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}
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if (strstr(arcs_cmdline, "console=") == NULL) {
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#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
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strcat(arcs_cmdline, " console=ttyS0,115200");
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#else
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if (octeon_uart == 1)
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strcat(arcs_cmdline, " console=ttyS1,115200");
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else
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strcat(arcs_cmdline, " console=ttyS0,115200");
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#endif
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}
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mips_hpt_frequency = octeon_get_clock_rate();
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