[PATCH] x86_64 irq: Simplify assign_irq_vector's arguments.
Currently assign_irq_vector works mostly by side effect and returns the results of it's changes to the caller. Which makes for a lot of arguments to pass/return and confusion as to what to do if you need the status but you aren't calling assign_irq_vector. This patch stops returning values from assign_irq_vector that can be retrieved just as easily by examining irq_cfg, and modifies the callers to retrive those values from irq_cfg when they need them. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>wifi-calibration
Eric W. Biederman
Linus Torvalds
parent
13a79503ab
commit
dfbffdd81c
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@ -72,7 +72,7 @@ struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
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[15] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 15 },
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};
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static int assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result);
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static int assign_irq_vector(int irq, cpumask_t mask);
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#define __apicdebuginit __init
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@ -262,19 +262,19 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
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static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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unsigned long flags;
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unsigned int dest;
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cpumask_t tmp;
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int vector;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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return;
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vector = assign_irq_vector(irq, mask, &tmp);
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if (vector < 0)
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if (assign_irq_vector(irq, mask))
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return;
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cpus_and(tmp, cfg->domain, mask);
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dest = cpu_mask_to_apicid(tmp);
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/*
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@ -283,7 +283,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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dest = SET_APIC_LOGICAL_ID(dest);
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spin_lock_irqsave(&ioapic_lock, flags);
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__target_IO_APIC_irq(irq, dest, vector);
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__target_IO_APIC_irq(irq, dest, cfg->vector);
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irq_desc[irq].affinity = mask;
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@ -638,7 +638,7 @@ static int pin_2_irq(int idx, int apic, int pin)
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return irq;
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}
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static int __assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
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static int __assign_irq_vector(int irq, cpumask_t mask)
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{
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/*
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* NOTE! The local APIC isn't very good at handling
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@ -653,7 +653,7 @@ static int __assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
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*/
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static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0;
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cpumask_t old_mask = CPU_MASK_NONE;
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int old_vector = -1;
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unsigned int old_vector;
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int cpu;
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struct irq_cfg *cfg;
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@ -663,12 +663,12 @@ static int __assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
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/* Only try and allocate irqs on cpus that are present */
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cpus_and(mask, mask, cpu_online_map);
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if (cfg->vector > 0)
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old_vector = cfg->vector;
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if (old_vector > 0) {
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cpus_and(*result, cfg->domain, mask);
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if (!cpus_empty(*result))
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return old_vector;
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old_vector = cfg->vector;
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if (old_vector) {
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cpumask_t tmp;
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cpus_and(tmp, cfg->domain, mask);
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if (!cpus_empty(tmp))
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return 0;
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cpus_and(old_mask, cfg->domain, cpu_online_map);
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}
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@ -705,21 +705,20 @@ next:
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per_cpu(vector_irq, new_cpu)[vector] = irq;
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cfg->vector = vector;
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cfg->domain = domain;
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cpus_and(*result, domain, mask);
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return vector;
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return 0;
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}
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return -ENOSPC;
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}
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static int assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
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static int assign_irq_vector(int irq, cpumask_t mask)
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{
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int vector;
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int err;
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unsigned long flags;
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spin_lock_irqsave(&vector_lock, flags);
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vector = __assign_irq_vector(irq, mask, result);
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err = __assign_irq_vector(irq, mask);
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spin_unlock_irqrestore(&vector_lock, flags);
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return vector;
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return err;
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}
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static void __clear_irq_vector(int irq)
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@ -780,22 +779,24 @@ static void ioapic_register_intr(int irq, unsigned long trigger)
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static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,
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int trigger, int polarity)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct IO_APIC_route_entry entry;
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cpumask_t mask;
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int vector;
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unsigned long flags;
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if (!IO_APIC_IRQ(irq))
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return;
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vector = assign_irq_vector(irq, TARGET_CPUS, &mask);
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if (vector < 0)
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mask = TARGET_CPUS;
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if (assign_irq_vector(irq, mask))
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return;
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cpus_and(mask, cfg->domain, mask);
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apic_printk(APIC_VERBOSE,KERN_DEBUG
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"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
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"IRQ %d Mode:%i Active:%i)\n",
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apic, mp_ioapics[apic].mpc_apicid, pin, vector,
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apic, mp_ioapics[apic].mpc_apicid, pin, cfg->vector,
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irq, trigger, polarity);
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/*
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@ -809,7 +810,7 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,
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entry.mask = 0; /* enable IRQ */
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entry.trigger = trigger;
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entry.polarity = polarity;
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entry.vector = vector;
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entry.vector = cfg->vector;
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/* Mask level triggered irqs.
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* Use IRQ_DELAYED_DISABLE for edge triggered irqs.
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@ -1558,15 +1559,14 @@ static inline void unlock_ExtINT_logic(void)
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*/
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static inline void check_timer(void)
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{
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struct irq_cfg *cfg = irq_cfg + 0;
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int apic1, pin1, apic2, pin2;
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int vector;
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cpumask_t mask;
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/*
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* get/set the timer IRQ vector:
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*/
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disable_8259A_irq(0);
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vector = assign_irq_vector(0, TARGET_CPUS, &mask);
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assign_irq_vector(0, TARGET_CPUS);
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/*
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* Subtle, code in do_timer_interrupt() expects an AEOI
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@ -1586,7 +1586,7 @@ static inline void check_timer(void)
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apic2 = ioapic_i8259.apic;
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apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
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vector, apic1, pin1, apic2, pin2);
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cfg->vector, apic1, pin1, apic2, pin2);
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if (pin1 != -1) {
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/*
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@ -1617,7 +1617,7 @@ static inline void check_timer(void)
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/*
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* legacy devices should be connected to IO APIC #0
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*/
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setup_ExtINT_IRQ0_pin(apic2, pin2, vector);
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setup_ExtINT_IRQ0_pin(apic2, pin2, cfg->vector);
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if (timer_irq_works()) {
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apic_printk(APIC_VERBOSE," works.\n");
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nmi_watchdog_default();
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@ -1642,14 +1642,14 @@ static inline void check_timer(void)
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disable_8259A_irq(0);
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irq_desc[0].chip = &lapic_irq_type;
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apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
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apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */
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enable_8259A_irq(0);
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if (timer_irq_works()) {
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apic_printk(APIC_VERBOSE," works.\n");
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return;
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}
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apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector);
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apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
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apic_printk(APIC_VERBOSE," failed.\n");
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apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as ExtINT IRQ...");
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@ -1796,9 +1796,7 @@ int create_irq(void)
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/* Allocate an unused irq */
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int irq;
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int new;
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int vector = 0;
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unsigned long flags;
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cpumask_t mask;
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irq = -ENOSPC;
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spin_lock_irqsave(&vector_lock, flags);
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@ -1807,8 +1805,7 @@ int create_irq(void)
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continue;
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if (irq_cfg[new].vector != 0)
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continue;
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vector = __assign_irq_vector(new, TARGET_CPUS, &mask);
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if (likely(vector > 0))
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if (__assign_irq_vector(new, TARGET_CPUS) == 0)
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irq = new;
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break;
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}
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@ -1837,12 +1834,15 @@ void destroy_irq(unsigned int irq)
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#ifdef CONFIG_PCI_MSI
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static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
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{
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int vector;
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struct irq_cfg *cfg = irq_cfg + irq;
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int err;
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unsigned dest;
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cpumask_t tmp;
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vector = assign_irq_vector(irq, TARGET_CPUS, &tmp);
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if (vector >= 0) {
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tmp = TARGET_CPUS;
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err = assign_irq_vector(irq, tmp);
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if (!err) {
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cpus_and(tmp, cfg->domain, tmp);
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dest = cpu_mask_to_apicid(tmp);
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msg->address_hi = MSI_ADDR_BASE_HI;
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@ -1862,33 +1862,33 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
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((INT_DELIVERY_MODE != dest_LowestPrio) ?
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MSI_DATA_DELIVERY_FIXED:
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MSI_DATA_DELIVERY_LOWPRI) |
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MSI_DATA_VECTOR(vector);
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MSI_DATA_VECTOR(cfg->vector);
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}
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return vector;
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return err;
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}
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#ifdef CONFIG_SMP
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static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct msi_msg msg;
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unsigned int dest;
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cpumask_t tmp;
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int vector;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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return;
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vector = assign_irq_vector(irq, mask, &tmp);
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if (vector < 0)
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if (assign_irq_vector(irq, mask))
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return;
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cpus_and(tmp, cfg->domain, mask);
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dest = cpu_mask_to_apicid(tmp);
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read_msi_msg(irq, &msg);
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msg.data &= ~MSI_DATA_VECTOR_MASK;
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msg.data |= MSI_DATA_VECTOR(vector);
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msg.data |= MSI_DATA_VECTOR(cfg->vector);
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msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
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msg.address_lo |= MSI_ADDR_DEST_ID(dest);
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@ -1964,21 +1964,21 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
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static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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unsigned int dest;
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cpumask_t tmp;
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int vector;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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return;
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vector = assign_irq_vector(irq, mask, &tmp);
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if (vector < 0)
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if (assign_irq_vector(irq, mask))
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return;
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cpus_and(tmp, cfg->domain, mask);
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dest = cpu_mask_to_apicid(tmp);
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target_ht_irq(irq, dest, vector);
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target_ht_irq(irq, dest, cfg->vector);
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irq_desc[irq].affinity = mask;
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}
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#endif
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@ -1996,14 +1996,17 @@ static struct irq_chip ht_irq_chip = {
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int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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{
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int vector;
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struct irq_cfg *cfg = irq_cfg + irq;
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int err;
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cpumask_t tmp;
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vector = assign_irq_vector(irq, TARGET_CPUS, &tmp);
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if (vector >= 0) {
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tmp = TARGET_CPUS;
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err = assign_irq_vector(irq, tmp);
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if (!err) {
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struct ht_irq_msg msg;
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unsigned dest;
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cpus_and(tmp, cfg->domain, tmp);
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dest = cpu_mask_to_apicid(tmp);
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msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
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@ -2011,7 +2014,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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msg.address_lo =
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HT_IRQ_LOW_BASE |
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HT_IRQ_LOW_DEST_ID(dest) |
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HT_IRQ_LOW_VECTOR(vector) |
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HT_IRQ_LOW_VECTOR(cfg->vector) |
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((INT_DEST_MODE == 0) ?
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HT_IRQ_LOW_DM_PHYSICAL :
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HT_IRQ_LOW_DM_LOGICAL) |
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@ -2026,7 +2029,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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set_irq_chip_and_handler_name(irq, &ht_irq_chip,
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handle_edge_irq, "edge");
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}
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return vector;
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return err;
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}
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#endif /* CONFIG_HT_IRQ */
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