Merge branch 'merge' into next
Merge "merge" branch to bring in various bug fixes that are going into 3.8
This commit is contained in:
commit
dfd0436ad0
|
@ -81,7 +81,8 @@ PA31 TXD4
|
|||
Required properties for pin configuration node:
|
||||
- atmel,pins: 4 integers array, represents a group of pins mux and config
|
||||
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
|
||||
The PERIPH 0 means gpio.
|
||||
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
|
||||
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
|
||||
|
||||
Bits used for CONFIG:
|
||||
PULL_UP (1 << 0): indicate this pin need a pull up.
|
||||
|
@ -126,7 +127,7 @@ pinctrl@fffff400 {
|
|||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x1>; /* PB15 periph with pullup */
|
||||
1 15 0x1 0x1>; /* PB15 periph A with pullup */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -175,9 +175,9 @@ consists of multiple segments as described below.
|
|||
align with the zone size <-|
|
||||
|-> align with the segment size
|
||||
_________________________________________________________________________
|
||||
| | | Node | Segment | Segment | |
|
||||
| Superblock | Checkpoint | Address | Info. | Summary | Main |
|
||||
| (SB) | (CP) | Table (NAT) | Table (SIT) | Area (SSA) | |
|
||||
| | | Segment | Node | Segment | |
|
||||
| Superblock | Checkpoint | Info. | Address | Summary | Main |
|
||||
| (SB) | (CP) | Table (SIT) | Table (NAT) | Area (SSA) | |
|
||||
|____________|_____2______|______N______|______N______|______N_____|__N___|
|
||||
. .
|
||||
. .
|
||||
|
@ -200,14 +200,14 @@ consists of multiple segments as described below.
|
|||
: It contains file system information, bitmaps for valid NAT/SIT sets, orphan
|
||||
inode lists, and summary entries of current active segments.
|
||||
|
||||
- Node Address Table (NAT)
|
||||
: It is composed of a block address table for all the node blocks stored in
|
||||
Main area.
|
||||
|
||||
- Segment Information Table (SIT)
|
||||
: It contains segment information such as valid block count and bitmap for the
|
||||
validity of all the blocks.
|
||||
|
||||
- Node Address Table (NAT)
|
||||
: It is composed of a block address table for all the node blocks stored in
|
||||
Main area.
|
||||
|
||||
- Segment Summary Area (SSA)
|
||||
: It contains summary entries which contains the owner information of all the
|
||||
data and node blocks stored in Main area.
|
||||
|
@ -236,13 +236,13 @@ For file system consistency, each CP points to which NAT and SIT copies are
|
|||
valid, as shown as below.
|
||||
|
||||
+--------+----------+---------+
|
||||
| CP | NAT | SIT |
|
||||
| CP | SIT | NAT |
|
||||
+--------+----------+---------+
|
||||
. . . .
|
||||
. . . .
|
||||
. . . .
|
||||
+-------+-------+--------+--------+--------+--------+
|
||||
| CP #0 | CP #1 | NAT #0 | NAT #1 | SIT #0 | SIT #1 |
|
||||
| CP #0 | CP #1 | SIT #0 | SIT #1 | NAT #0 | NAT #1 |
|
||||
+-------+-------+--------+--------+--------+--------+
|
||||
| ^ ^
|
||||
| | |
|
||||
|
|
48
MAINTAINERS
48
MAINTAINERS
|
@ -228,7 +228,7 @@ S: Maintained
|
|||
F: drivers/platform/x86/acerhdf.c
|
||||
|
||||
ACER WMI LAPTOP EXTRAS
|
||||
M: Joey Lee <jlee@novell.com>
|
||||
M: "Lee, Chun-Yi" <jlee@suse.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/platform/x86/acer-wmi.c
|
||||
|
@ -648,7 +648,7 @@ F: arch/arm/
|
|||
|
||||
ARM SUB-ARCHITECTURES
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: MAINTAINED
|
||||
S: Maintained
|
||||
F: arch/arm/mach-*/
|
||||
F: arch/arm/plat-*/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git
|
||||
|
@ -1351,6 +1351,14 @@ W: http://wireless.kernel.org/en/users/Drivers/ath9k
|
|||
S: Supported
|
||||
F: drivers/net/wireless/ath/ath9k/
|
||||
|
||||
WILOCITY WIL6210 WIRELESS DRIVER
|
||||
M: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: wil6210@qca.qualcomm.com
|
||||
S: Supported
|
||||
W: http://wireless.kernel.org/en/users/Drivers/wil6210
|
||||
F: drivers/net/wireless/ath/wil6210/
|
||||
|
||||
CARL9170 LINUX COMMUNITY WIRELESS DRIVER
|
||||
M: Christian Lamparter <chunkeey@googlemail.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
|
@ -1964,9 +1972,9 @@ S: Maintained
|
|||
F: drivers/usb/host/ohci-ep93xx.c
|
||||
|
||||
CIRRUS LOGIC CS4270 SOUND DRIVER
|
||||
M: Timur Tabi <timur@freescale.com>
|
||||
M: Timur Tabi <timur@tabi.org>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
S: Odd Fixes
|
||||
F: sound/soc/codecs/cs4270*
|
||||
|
||||
CLEANCACHE API
|
||||
|
@ -2958,7 +2966,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/i825xx/eexpress.*
|
||||
|
||||
ETHERNET BRIDGE
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: bridge@lists.linux-foundation.org
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net:Bridge
|
||||
|
@ -3183,9 +3191,9 @@ F: include/uapi/video/
|
|||
F: include/uapi/linux/fb.h
|
||||
|
||||
FREESCALE DIU FRAMEBUFFER DRIVER
|
||||
M: Timur Tabi <timur@freescale.com>
|
||||
M: Timur Tabi <timur@tabi.org>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/video/fsl-diu-fb.*
|
||||
|
||||
FREESCALE DMA DRIVER
|
||||
|
@ -3220,9 +3228,8 @@ F: drivers/net/ethernet/freescale/fs_enet/
|
|||
F: include/linux/fs_enet_pd.h
|
||||
|
||||
FREESCALE QUICC ENGINE LIBRARY
|
||||
M: Timur Tabi <timur@freescale.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Supported
|
||||
S: Orphan
|
||||
F: arch/powerpc/sysdev/qe_lib/
|
||||
F: arch/powerpc/include/asm/*qe.h
|
||||
|
||||
|
@ -3241,16 +3248,16 @@ S: Maintained
|
|||
F: drivers/net/ethernet/freescale/ucc_geth*
|
||||
|
||||
FREESCALE QUICC ENGINE UCC UART DRIVER
|
||||
M: Timur Tabi <timur@freescale.com>
|
||||
M: Timur Tabi <timur@tabi.org>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/tty/serial/ucc_uart.c
|
||||
|
||||
FREESCALE SOC SOUND DRIVERS
|
||||
M: Timur Tabi <timur@freescale.com>
|
||||
M: Timur Tabi <timur@tabi.org>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: sound/soc/fsl/fsl*
|
||||
F: sound/soc/fsl/mpc8610_hpcd.c
|
||||
|
||||
|
@ -4898,7 +4905,7 @@ S: Maintained
|
|||
|
||||
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
|
||||
M: Mirko Lindner <mlindner@marvell.com>
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/marvell/sk*
|
||||
|
@ -5077,7 +5084,7 @@ S: Maintained
|
|||
F: drivers/media/radio/radio-mr800.c
|
||||
|
||||
MSI LAPTOP SUPPORT
|
||||
M: "Lee, Chun-Yi" <jlee@novell.com>
|
||||
M: "Lee, Chun-Yi" <jlee@suse.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/platform/x86/msi-laptop.c
|
||||
|
@ -5173,7 +5180,7 @@ S: Supported
|
|||
F: drivers/infiniband/hw/nes/
|
||||
|
||||
NETEM NETWORK EMULATOR
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: netem@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: net/sched/sch_netem.c
|
||||
|
@ -5507,8 +5514,7 @@ M: Benoît Cousson <b-cousson@ti.com>
|
|||
M: Paul Walmsley <paul@pwsan.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/mach-omap2/omap_hwmod.c
|
||||
F: arch/arm/plat-omap/include/plat/omap_hwmod.h
|
||||
F: arch/arm/mach-omap2/omap_hwmod.*
|
||||
|
||||
OMAP HWMOD DATA FOR OMAP4-BASED DEVICES
|
||||
M: Benoît Cousson <b-cousson@ti.com>
|
||||
|
@ -6579,7 +6585,7 @@ F: drivers/media/platform/s3c-camif/
|
|||
F: include/media/s3c_camif.h
|
||||
|
||||
SERIAL DRIVERS
|
||||
M: Alan Cox <alan@linux.intel.com>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: linux-serial@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/tty/serial
|
||||
|
@ -7334,7 +7340,7 @@ S: Odd Fixes
|
|||
F: drivers/staging/speakup/
|
||||
|
||||
STAGING - TI DSP BRIDGE DRIVERS
|
||||
M: Omar Ramirez Luna <omar.ramirez@ti.com>
|
||||
M: Omar Ramirez Luna <omar.ramirez@copitl.com>
|
||||
S: Odd Fixes
|
||||
F: drivers/staging/tidspbridge/
|
||||
|
||||
|
@ -8526,7 +8532,7 @@ F: Documentation/x86/
|
|||
F: arch/x86/
|
||||
|
||||
X86 PLATFORM DRIVERS
|
||||
M: Matthew Garrett <mjg@redhat.com>
|
||||
M: Matthew Garrett <matthew.garrett@nebula.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mjg59/platform-drivers-x86.git
|
||||
S: Maintained
|
||||
|
|
4
Makefile
4
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Terrified Chipmunk
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
|
|||
-e s/arm.*/arm/ -e s/sa110/arm/ \
|
||||
-e s/s390x/s390/ -e s/parisc64/parisc/ \
|
||||
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
|
||||
-e s/sh[234].*/sh/ )
|
||||
-e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
|
||||
|
||||
# Cross compiling and selecting different set of gcc/bin-utils
|
||||
# ---------------------------------------------------------------------------
|
||||
|
|
|
@ -155,6 +155,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
|
|||
dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
|
||||
|
||||
targets += dtbs
|
||||
targets += $(dtb-y)
|
||||
endif
|
||||
|
||||
# *.dtb used to be generated in the directory above. Clean out the
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
@ -50,27 +50,25 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <17>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>;
|
||||
interrupts = <87>, <88>, <89>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -51,39 +51,36 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>, <23>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
};
|
||||
|
||||
gpio2: gpio@d0018180 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018180 0x40>,
|
||||
<0xd0018870 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
|
|
|
@ -66,39 +66,36 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>, <23>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
};
|
||||
|
||||
gpio2: gpio@d0018180 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018180 0x40>,
|
||||
<0xd0018870 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
|
|
|
@ -336,8 +336,8 @@
|
|||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 0 /* sda */
|
||||
&pioA 24 0 /* scl */
|
||||
gpios = <&pioA 25 0 /* sda */
|
||||
&pioA 26 0 /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
|
|
|
@ -306,6 +306,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0 /* PB17 periph A */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x0 /* PB19 periph A */
|
||||
1 20 0x1 0x0 /* PB20 periph A */
|
||||
1 21 0x1 0x0>; /* PB21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -450,6 +466,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffbc000 0x4000>;
|
||||
interrupts = <14 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -271,6 +271,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0 /* PB1 periph B */
|
||||
1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 3 0x2 0x0 /* PB3 periph B */
|
||||
1 4 0x2 0x0 /* PB4 periph B */
|
||||
1 5 0x2 0x0>; /* PB5 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x0 /* PB6 periph A */
|
||||
1 7 0x1 0x0 /* PB7 periph A */
|
||||
1 8 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<1 9 0x1 0x0 /* PB9 periph A */
|
||||
1 10 0x1 0x0 /* PB10 periph A */
|
||||
1 11 0x1 0x0>; /* PB11 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -368,6 +400,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff98000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -375,6 +409,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -290,6 +290,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<3 0 0x1 0x0 /* PD0 periph A */
|
||||
3 1 0x1 0x0 /* PD1 periph A */
|
||||
3 2 0x1 0x0>; /* PD2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<3 3 0x1 0x0 /* PD3 periph A */
|
||||
3 4 0x1 0x0 /* PD4 periph A */
|
||||
3 5 0x1 0x0>; /* PD5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<3 10 0x1 0x0 /* PD10 periph A */
|
||||
3 11 0x1 0x0 /* PD11 periph A */
|
||||
3 12 0x1 0x0>; /* PD12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<3 13 0x1 0x0 /* PD13 periph A */
|
||||
3 14 0x1 0x0 /* PD14 periph A */
|
||||
3 15 0x1 0x0>; /* PD15 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -425,6 +457,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -432,6 +466,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfffa0000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
};
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
@ -244,6 +245,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -294,6 +311,15 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf801c000 0x4000>;
|
||||
|
|
|
@ -88,13 +88,6 @@
|
|||
interrupts = <1 4 7>;
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
|
@ -150,6 +143,11 @@
|
|||
atmel,pins =
|
||||
<0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_sck: usart0_sck-0 {
|
||||
atmel,pins =
|
||||
<0 4 0x1 0x0>; /* PA4 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
|
@ -161,12 +159,17 @@
|
|||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<3 27 0x3 0x0>; /* PC27 periph C */
|
||||
<2 27 0x3 0x0>; /* PC27 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<3 28 0x3 0x0>; /* PC28 periph C */
|
||||
<2 28 0x3 0x0>; /* PC28 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_sck: usart1_sck-0 {
|
||||
atmel,pins =
|
||||
<2 28 0x3 0x0>; /* PC29 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -179,46 +182,56 @@
|
|||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x2 0x0>; /* PB0 periph B */
|
||||
<1 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x2 0x0>; /* PB1 periph B */
|
||||
<1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_uart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<3 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
3 23 0x2 0x0>; /* PC23 periph B */
|
||||
<2 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
2 23 0x2 0x0>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<3 24 0x2 0x0>; /* PC24 periph B */
|
||||
<2 24 0x2 0x0>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<3 25 0x2 0x0>; /* PC25 periph B */
|
||||
<2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<2 26 0x2 0x0>; /* PC26 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x3 0x0 /* PC8 periph C */
|
||||
3 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
<2 8 0x3 0x0 /* PC8 periph C */
|
||||
2 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x3 0x0 /* PC16 periph C */
|
||||
3 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
<2 16 0x3 0x0 /* PC16 periph C */
|
||||
2 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -247,14 +260,14 @@
|
|||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x0 /* PA8 periph A */
|
||||
1 11 0x1 0x0 /* PA11 periph A */
|
||||
1 12 0x1 0x0 /* PA12 periph A */
|
||||
1 13 0x1 0x0 /* PA13 periph A */
|
||||
1 14 0x1 0x0 /* PA14 periph A */
|
||||
1 15 0x1 0x0 /* PA15 periph A */
|
||||
1 16 0x1 0x0 /* PA16 periph A */
|
||||
1 17 0x1 0x0>; /* PA17 periph A */
|
||||
<1 8 0x1 0x0 /* PB8 periph A */
|
||||
1 11 0x1 0x0 /* PB11 periph A */
|
||||
1 12 0x1 0x0 /* PB12 periph A */
|
||||
1 13 0x1 0x0 /* PB13 periph A */
|
||||
1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x0 /* PB15 periph A */
|
||||
1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0>; /* PB17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -290,6 +303,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -333,6 +362,15 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
|
|
|
@ -96,8 +96,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -120,8 +120,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -141,8 +141,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
|
@ -26,10 +26,15 @@
|
|||
};
|
||||
|
||||
&uart0 { status = "okay"; };
|
||||
&sdio0 { status = "okay"; };
|
||||
&sata0 { status = "okay"; };
|
||||
&i2c0 { status = "okay"; };
|
||||
|
||||
&sdio0 {
|
||||
status = "okay";
|
||||
/* sdio0 card detect is connected to wrong pin on CuBox */
|
||||
cd-gpios = <&gpio0 12 1>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
|
@ -42,9 +47,14 @@
|
|||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&pmx_gpio_18>;
|
||||
pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_gpio_12: pmx-gpio-12 {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_18: pmx-gpio-18 {
|
||||
marvell,pins = "mpp18";
|
||||
marvell,function = "gpio";
|
||||
|
|
|
@ -115,8 +115,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -139,8 +139,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
/include/ "kirkwood.dtsi"
|
||||
/include/ "kirkwood-6281.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
|
@ -6,6 +7,21 @@
|
|||
};
|
||||
|
||||
ocp@f1000000 {
|
||||
pinctrl: pinctrl@10000 {
|
||||
pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0
|
||||
&pmx_ns2_sata0 &pmx_ns2_sata1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_ns2_sata0: pmx-ns2-sata0 {
|
||||
marvell,pins = "mpp21";
|
||||
marvell,function = "sata0";
|
||||
};
|
||||
pmx_ns2_sata1: pmx-ns2-sata1 {
|
||||
marvell,pins = "mpp20";
|
||||
marvell,function = "sata1";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
reg = <0x10100 0x40>;
|
||||
ngpios = <32>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <35>, <36>, <37>, <38>;
|
||||
};
|
||||
|
||||
|
@ -46,6 +47,7 @@
|
|||
reg = <0x10140 0x40>;
|
||||
ngpios = <18>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <39>, <40>, <41>;
|
||||
};
|
||||
|
||||
|
|
|
@ -48,6 +48,8 @@
|
|||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "mii";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii
|
||||
&pinctrl_macb_rmii_mii_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -60,19 +60,21 @@
|
|||
};
|
||||
|
||||
uart0: uart@01c28000 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28000 0x400>;
|
||||
interrupts = <1>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@01c28400 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28400 0x400>;
|
||||
interrupts = <2>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -45,7 +45,6 @@
|
|||
reg = <1>;
|
||||
};
|
||||
|
||||
/* A7s disabled till big.LITTLE patches are available...
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
|
@ -63,7 +62,6 @@
|
|||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
|
|
@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y
|
|||
CONFIG_SOC_AT91SAM9263=y
|
||||
CONFIG_SOC_AT91SAM9G45=y
|
||||
CONFIG_SOC_AT91SAM9X5=y
|
||||
CONFIG_SOC_AT91SAM9N12=y
|
||||
CONFIG_MACH_AT91SAM_DT=y
|
||||
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
|
||||
CONFIG_AT91_TIMER_HZ=128
|
||||
|
@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
|
|||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
|
|
|
@ -100,12 +100,14 @@ ENTRY(printch)
|
|||
b 1b
|
||||
ENDPROC(printch)
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
ENTRY(debug_ll_addr)
|
||||
addruart r2, r3, ip
|
||||
str r2, [r0]
|
||||
str r3, [r1]
|
||||
mov pc, lr
|
||||
ENDPROC(debug_ll_addr)
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
|
|
|
@ -246,6 +246,7 @@ __create_page_tables:
|
|||
|
||||
/*
|
||||
* Then map boot params address in r2 if specified.
|
||||
* We map 2 sections in case the ATAGs/DTB crosses a section boundary.
|
||||
*/
|
||||
mov r0, r2, lsr #SECTION_SHIFT
|
||||
movs r0, r0, lsl #SECTION_SHIFT
|
||||
|
@ -253,6 +254,8 @@ __create_page_tables:
|
|||
addne r3, r3, #PAGE_OFFSET
|
||||
addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
|
||||
orrne r6, r7, r0
|
||||
strne r6, [r3], #1 << PMD_ORDER
|
||||
addne r6, r6, #1 << SECTION_SHIFT
|
||||
strne r6, [r3]
|
||||
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
|
@ -331,7 +334,7 @@ ENTRY(secondary_startup)
|
|||
* as it has already been validated by the primary processor.
|
||||
*/
|
||||
#ifdef CONFIG_ARM_VIRT_EXT
|
||||
bl __hyp_stub_install
|
||||
bl __hyp_stub_install_secondary
|
||||
#endif
|
||||
safe_svcmode_maskall r9
|
||||
|
||||
|
|
|
@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
* immediately.
|
||||
*/
|
||||
compare_cpu_mode_with_primary r4, r5, r6, r7
|
||||
bxne lr
|
||||
movne pc, lr
|
||||
|
||||
/*
|
||||
* Once we have given up on one CPU, we do not try to install the
|
||||
|
@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
*/
|
||||
|
||||
cmp r4, #HYP_MODE
|
||||
bxne lr @ give up if the CPU is not in HYP mode
|
||||
movne pc, lr @ give up if the CPU is not in HYP mode
|
||||
|
||||
/*
|
||||
* Configure HSCTLR to set correct exception endianness/instruction set
|
||||
|
@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
* Eventually, CPU-specific code might be needed -- assume not for now
|
||||
*
|
||||
* This code relies on the "eret" instruction to synchronize the
|
||||
* various coprocessor accesses.
|
||||
* various coprocessor accesses. This is done when we switch to SVC
|
||||
* (see safe_svcmode_maskall).
|
||||
*/
|
||||
@ Now install the hypervisor stub:
|
||||
adr r7, __hyp_stub_vectors
|
||||
|
@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
|
|||
1:
|
||||
#endif
|
||||
|
||||
bic r7, r4, #MODE_MASK
|
||||
orr r7, r7, #SVC_MODE
|
||||
THUMB( orr r7, r7, #PSR_T_BIT )
|
||||
msr spsr_cxsf, r7 @ This is SPSR_hyp.
|
||||
|
||||
__MSR_ELR_HYP(14) @ msr elr_hyp, lr
|
||||
__ERET @ return, switching to SVC mode
|
||||
@ The boot CPU mode is left in r4.
|
||||
bx lr @ The boot CPU mode is left in r4.
|
||||
ENDPROC(__hyp_stub_install_secondary)
|
||||
|
||||
__hyp_stub_do_trap:
|
||||
|
@ -200,7 +194,7 @@ ENDPROC(__hyp_get_vectors)
|
|||
@ fall through
|
||||
ENTRY(__hyp_set_vectors)
|
||||
__HVC(0)
|
||||
bx lr
|
||||
mov pc, lr
|
||||
ENDPROC(__hyp_set_vectors)
|
||||
|
||||
#ifndef ZIMAGE
|
||||
|
|
|
@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base)
|
|||
switch (socid) {
|
||||
case ARCH_ID_AT91RM9200:
|
||||
at91_soc_initdata.type = AT91_SOC_RM9200;
|
||||
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
|
||||
at91_boot_soc = at91rm9200_soc;
|
||||
break;
|
||||
|
||||
|
|
|
@ -851,6 +851,7 @@ config SOC_IMX6Q
|
|||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select HAVE_IMX_GPC
|
||||
select HAVE_IMX_MMDC
|
||||
select HAVE_IMX_SRC
|
||||
select HAVE_SMP
|
||||
select MFD_SYSCON
|
||||
select PINCTRL
|
||||
|
|
|
@ -254,9 +254,9 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
|
||||
/* i.mx25 has the i.mx35 type cspi */
|
||||
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
|
||||
|
|
|
@ -236,9 +236,9 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.0");
|
||||
|
|
|
@ -139,9 +139,9 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
/* i.mx31 has the i.mx21 type uart */
|
||||
clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
|
||||
|
|
|
@ -251,9 +251,9 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
|
|
|
@ -269,9 +269,9 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
|
|
|
@ -436,6 +436,9 @@ int __init mx6q_clocks_init(void)
|
|||
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
|
||||
clk_prepare_enable(clk[clks_init_on[i]]);
|
||||
|
||||
/* Set initial power mode */
|
||||
imx6q_set_lpm(WAIT_CLOCKED);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
|
|
|
@ -142,6 +142,7 @@ extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
|
|||
extern void imx6q_clock_map_io(void);
|
||||
|
||||
extern void imx_cpu_die(unsigned int cpu);
|
||||
extern int imx_cpu_kill(unsigned int cpu);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void imx6q_pm_init(void);
|
||||
|
|
|
@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
|
|||
|
||||
#include <linux/fsl_devices.h>
|
||||
struct imx_fsl_usb2_udc_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t irq;
|
||||
};
|
||||
|
|
|
@ -11,35 +11,36 @@
|
|||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc) \
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _USB_OTG_BASE_ADDR, \
|
||||
.irq = soc ## _INT_USB_OTG, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX51
|
||||
const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51, "imx-udc-mx51");
|
||||
#endif
|
||||
|
||||
struct platform_device *__init imx_add_fsl_usb2_udc(
|
||||
|
@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
|
||||
return imx_add_platform_device_dmamask(data->devid, -1,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
|
@ -54,7 +54,7 @@ struct platform_device *__init imx_add_imx_fb(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("imx-fb", 0,
|
||||
return imx_add_platform_device_dmamask(data->devid, 0,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
|
@ -46,9 +46,11 @@ static inline void cpu_enter_lowpower(void)
|
|||
void imx_cpu_die(unsigned int cpu)
|
||||
{
|
||||
cpu_enter_lowpower();
|
||||
imx_enable_cpu(cpu, false);
|
||||
|
||||
/* spin here until hardware takes it down */
|
||||
while (1)
|
||||
;
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
int imx_cpu_kill(unsigned int cpu)
|
||||
{
|
||||
imx_enable_cpu(cpu, false);
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -22,8 +22,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/genalloc.h>
|
||||
|
||||
#include "iram.h"
|
||||
#include "linux/platform_data/imx-iram.h"
|
||||
|
||||
static unsigned long iram_phys_base;
|
||||
static void __iomem *iram_virt_base;
|
||||
|
|
|
@ -92,5 +92,6 @@ struct smp_operations imx_smp_ops __initdata = {
|
|||
.smp_boot_secondary = imx_boot_secondary,
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
.cpu_die = imx_cpu_die,
|
||||
.cpu_kill = imx_cpu_kill,
|
||||
#endif
|
||||
};
|
||||
|
|
|
@ -41,6 +41,7 @@ static int imx6q_pm_enter(suspend_state_t state)
|
|||
cpu_suspend(0, imx6q_suspend_finish);
|
||||
imx_smp_prepare();
|
||||
imx_gpc_post_resume();
|
||||
imx6q_set_lpm(WAIT_CLOCKED);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
|
|
@ -475,13 +475,12 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
|
|||
{
|
||||
int ret = 0;
|
||||
|
||||
if (!ap_syscon_base)
|
||||
return -EINVAL;
|
||||
|
||||
if (nr == 0) {
|
||||
sys->mem_offset = PHYS_PCI_MEM_BASE;
|
||||
ret = pci_v3_setup_resources(sys);
|
||||
/* Remap the Integrator system controller */
|
||||
ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
|
||||
if (!ap_syscon_base)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
@ -497,6 +496,13 @@ void __init pci_v3_preinit(void)
|
|||
unsigned int temp;
|
||||
int ret;
|
||||
|
||||
/* Remap the Integrator system controller */
|
||||
ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
|
||||
if (!ap_syscon_base) {
|
||||
pr_err("unable to remap the AP syscon for PCIv3\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pcibios_min_mem = 0x00100000;
|
||||
|
||||
/*
|
||||
|
|
|
@ -18,47 +18,11 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
#include "common.h"
|
||||
#include "mpp.h"
|
||||
|
||||
static struct mv643xx_eth_platform_data ns2_ge00_data = {
|
||||
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
|
||||
};
|
||||
|
||||
static unsigned int ns2_mpp_config[] __initdata = {
|
||||
MPP0_SPI_SCn,
|
||||
MPP1_SPI_MOSI,
|
||||
MPP2_SPI_SCK,
|
||||
MPP3_SPI_MISO,
|
||||
MPP4_NF_IO6,
|
||||
MPP5_NF_IO7,
|
||||
MPP6_SYSRST_OUTn,
|
||||
MPP7_GPO, /* Fan speed (bit 1) */
|
||||
MPP8_TW0_SDA,
|
||||
MPP9_TW0_SCK,
|
||||
MPP10_UART0_TXD,
|
||||
MPP11_UART0_RXD,
|
||||
MPP12_GPO, /* Red led */
|
||||
MPP14_GPIO, /* USB fuse */
|
||||
MPP16_GPIO, /* SATA 0 power */
|
||||
MPP17_GPIO, /* SATA 1 power */
|
||||
MPP18_NF_IO0,
|
||||
MPP19_NF_IO1,
|
||||
MPP20_SATA1_ACTn,
|
||||
MPP21_SATA0_ACTn,
|
||||
MPP22_GPIO, /* Fan speed (bit 0) */
|
||||
MPP23_GPIO, /* Fan power */
|
||||
MPP24_GPIO, /* USB mode select */
|
||||
MPP25_GPIO, /* Fan rotation fail */
|
||||
MPP26_GPIO, /* USB device vbus */
|
||||
MPP28_GPIO, /* USB enable host vbus */
|
||||
MPP29_GPIO, /* Blue led (slow register) */
|
||||
MPP30_GPIO, /* Blue led (command register) */
|
||||
MPP31_GPIO, /* Board power off */
|
||||
MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */
|
||||
MPP33_GPO, /* Fan speed (bit 2) */
|
||||
0
|
||||
};
|
||||
|
||||
#define NS2_GPIO_POWER_OFF 31
|
||||
|
||||
static void ns2_power_off(void)
|
||||
|
@ -71,8 +35,6 @@ void __init ns2_init(void)
|
|||
/*
|
||||
* Basic setup. Needs to be called early.
|
||||
*/
|
||||
kirkwood_mpp_conf(ns2_mpp_config);
|
||||
|
||||
if (of_machine_is_compatible("lacie,netspace_lite_v2") ||
|
||||
of_machine_is_compatible("lacie,netspace_mini_v2"))
|
||||
ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
|
||||
-I$(srctree)/arch/arm/plat-orion/include
|
||||
|
||||
AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
|
||||
|
||||
obj-y += system-controller.o
|
||||
obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
|
||||
|
|
|
@ -397,6 +397,12 @@ static struct omap_board_mux board_mux[] __initdata = {
|
|||
OMAP_PULL_ENA),
|
||||
OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
||||
|
||||
/* UART2 - BT/FM/GPS shared transport */
|
||||
OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
|
||||
OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
|
||||
OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
|
||||
OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
|
||||
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
|
||||
|
|
|
@ -1935,6 +1935,8 @@ int __init omap2420_clk_init(void)
|
|||
omap2_init_clk_hw_omap_clocks(c->lk.clk);
|
||||
}
|
||||
|
||||
omap2xxx_clkt_vps_late_init();
|
||||
|
||||
omap2_clk_disable_autoidle_all();
|
||||
|
||||
omap2_clk_enable_init_clocks(enable_init_clks,
|
||||
|
|
|
@ -2050,6 +2050,8 @@ int __init omap2430_clk_init(void)
|
|||
omap2_init_clk_hw_omap_clocks(c->lk.clk);
|
||||
}
|
||||
|
||||
omap2xxx_clkt_vps_late_init();
|
||||
|
||||
omap2_clk_disable_autoidle_all();
|
||||
|
||||
omap2_clk_enable_init_clocks(enable_init_clks,
|
||||
|
|
|
@ -2026,14 +2026,13 @@ int __init omap4xxx_clk_init(void)
|
|||
* On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
|
||||
* state when turning the ABE clock domain. Workaround this by
|
||||
* locking the ABE DPLL on boot.
|
||||
* Lock the ABE DPLL in any case to avoid issues with audio.
|
||||
*/
|
||||
if (cpu_is_omap446x()) {
|
||||
rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck);
|
||||
if (!rc)
|
||||
rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
|
||||
}
|
||||
rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck);
|
||||
if (!rc)
|
||||
rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -639,7 +639,7 @@ static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
|
|||
return cnt;
|
||||
}
|
||||
|
||||
static void omap_init_ocp2scp(void)
|
||||
static void __init omap_init_ocp2scp(void)
|
||||
{
|
||||
struct omap_hwmod *oh;
|
||||
struct platform_device *pdev;
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_data/omap_drm.h>
|
||||
|
||||
#include "soc.h"
|
||||
#include "omap_device.h"
|
||||
#include "omap_hwmod.h"
|
||||
|
||||
|
@ -56,7 +57,7 @@ static int __init omap_init_drm(void)
|
|||
oh->name);
|
||||
}
|
||||
|
||||
platform_data.omaprev = GET_OMAP_REVISION();
|
||||
platform_data.omaprev = GET_OMAP_TYPE;
|
||||
|
||||
return platform_device_register(&omap_drm_device);
|
||||
|
||||
|
|
|
@ -2132,8 +2132,12 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
|
|||
* currently reset very early during boot, before I2C is
|
||||
* available, so it doesn't seem that we have any choice in
|
||||
* the kernel other than to avoid resetting it.
|
||||
*
|
||||
* Also, McPDM needs to be configured to NO_IDLE mode when it
|
||||
* is in used otherwise vital clocks will be gated which
|
||||
* results 'slow motion' audio playback.
|
||||
*/
|
||||
.flags = HWMOD_EXT_OPT_MAIN_CLK,
|
||||
.flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
|
||||
.mpu_irqs = omap44xx_mcpdm_irqs,
|
||||
.sdma_reqs = omap44xx_mcpdm_sdma_reqs,
|
||||
.main_clk = "mcpdm_fck",
|
||||
|
|
|
@ -165,15 +165,11 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
|
|||
struct device_node *np;
|
||||
|
||||
for_each_matching_node(np, match) {
|
||||
if (!of_device_is_available(np)) {
|
||||
of_node_put(np);
|
||||
if (!of_device_is_available(np))
|
||||
continue;
|
||||
}
|
||||
|
||||
if (property && !of_get_property(np, property, NULL)) {
|
||||
of_node_put(np);
|
||||
if (property && !of_get_property(np, property, NULL))
|
||||
continue;
|
||||
}
|
||||
|
||||
of_add_property(np, &device_disabled);
|
||||
return np;
|
||||
|
|
|
@ -463,6 +463,9 @@
|
|||
GPIO76_LCD_PCLK, \
|
||||
GPIO77_LCD_BIAS
|
||||
|
||||
/* these enable a work-around for a hw bug in pxa27x during ac97 warm reset */
|
||||
#define GPIO113_AC97_nRESET_GPIO_HIGH MFP_CFG_OUT(GPIO113, AF0, DEFAULT)
|
||||
#define GPIO95_AC97_nRESET_GPIO_HIGH MFP_CFG_OUT(GPIO95, AF0, DEFAULT)
|
||||
|
||||
extern int keypad_set_wake(unsigned int on);
|
||||
#endif /* __ASM_ARCH_MFP_PXA27X_H */
|
||||
|
|
|
@ -47,9 +47,9 @@ void pxa27x_clear_otgph(void)
|
|||
EXPORT_SYMBOL(pxa27x_clear_otgph);
|
||||
|
||||
static unsigned long ac97_reset_config[] = {
|
||||
GPIO113_GPIO,
|
||||
GPIO113_AC97_nRESET_GPIO_HIGH,
|
||||
GPIO113_AC97_nRESET,
|
||||
GPIO95_GPIO,
|
||||
GPIO95_AC97_nRESET_GPIO_HIGH,
|
||||
GPIO95_AC97_nRESET,
|
||||
};
|
||||
|
||||
|
|
|
@ -47,7 +47,7 @@ static struct spi_board_info wm1253_devs[] = {
|
|||
.bus_num = 0,
|
||||
.chip_select = 0,
|
||||
.mode = SPI_MODE_0,
|
||||
.irq = S3C_EINT(5),
|
||||
.irq = S3C_EINT(4),
|
||||
.controller_data = &wm0010_spi_csinfo,
|
||||
.platform_data = &wm0010_pdata,
|
||||
},
|
||||
|
|
|
@ -338,8 +338,10 @@ int __init s3c64xx_pm_init(void)
|
|||
for (i = 0; i < ARRAY_SIZE(s3c64xx_pm_domains); i++)
|
||||
pm_genpd_init(&s3c64xx_pm_domains[i]->pd, NULL, false);
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_FB
|
||||
if (dev_get_platdata(&s3c_device_fb.dev))
|
||||
pm_genpd_add_device(&s3c64xx_pm_f.pd, &s3c_device_fb.dev);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -774,25 +774,27 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
|
|||
size_t size, enum dma_data_direction dir,
|
||||
void (*op)(const void *, size_t, int))
|
||||
{
|
||||
unsigned long pfn;
|
||||
size_t left = size;
|
||||
|
||||
pfn = page_to_pfn(page) + offset / PAGE_SIZE;
|
||||
offset %= PAGE_SIZE;
|
||||
|
||||
/*
|
||||
* A single sg entry may refer to multiple physically contiguous
|
||||
* pages. But we still need to process highmem pages individually.
|
||||
* If highmem is not configured then the bulk of this loop gets
|
||||
* optimized out.
|
||||
*/
|
||||
size_t left = size;
|
||||
do {
|
||||
size_t len = left;
|
||||
void *vaddr;
|
||||
|
||||
page = pfn_to_page(pfn);
|
||||
|
||||
if (PageHighMem(page)) {
|
||||
if (len + offset > PAGE_SIZE) {
|
||||
if (offset >= PAGE_SIZE) {
|
||||
page += offset / PAGE_SIZE;
|
||||
offset %= PAGE_SIZE;
|
||||
}
|
||||
if (len + offset > PAGE_SIZE)
|
||||
len = PAGE_SIZE - offset;
|
||||
}
|
||||
vaddr = kmap_high_get(page);
|
||||
if (vaddr) {
|
||||
vaddr += offset;
|
||||
|
@ -809,7 +811,7 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
|
|||
op(vaddr, len, dir);
|
||||
}
|
||||
offset = 0;
|
||||
page++;
|
||||
pfn++;
|
||||
left -= len;
|
||||
} while (left);
|
||||
}
|
||||
|
|
|
@ -283,7 +283,7 @@ static struct mem_type mem_types[] = {
|
|||
},
|
||||
[MT_MEMORY_SO] = {
|
||||
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
|
||||
L_PTE_MT_UNCACHED,
|
||||
L_PTE_MT_UNCACHED | L_PTE_XN,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_S |
|
||||
PMD_SECT_UNCACHED | PMD_SECT_XN,
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
*/
|
||||
ENTRY(versatile_secondary_startup)
|
||||
mrc p15, 0, r0, c0, c0, 5
|
||||
and r0, r0, #15
|
||||
bic r0, #0xff000000
|
||||
adr r4, 1f
|
||||
ldmia r4, {r5, r6}
|
||||
sub r4, r4, r5
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
@ IRQs disabled.
|
||||
@
|
||||
ENTRY(do_vfp)
|
||||
#ifdef CONFIG_PREEMPT
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
ldr r4, [r10, #TI_PREEMPT] @ get preempt count
|
||||
add r11, r4, #1 @ increment it
|
||||
str r11, [r10, #TI_PREEMPT]
|
||||
|
@ -35,7 +35,7 @@ ENTRY(do_vfp)
|
|||
ENDPROC(do_vfp)
|
||||
|
||||
ENTRY(vfp_null_entry)
|
||||
#ifdef CONFIG_PREEMPT
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
ldr r4, [r10, #TI_PREEMPT] @ get preempt count
|
||||
sub r11, r4, #1 @ decrement it
|
||||
|
@ -53,7 +53,7 @@ ENDPROC(vfp_null_entry)
|
|||
|
||||
__INIT
|
||||
ENTRY(vfp_testing_entry)
|
||||
#ifdef CONFIG_PREEMPT
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
ldr r4, [r10, #TI_PREEMPT] @ get preempt count
|
||||
sub r11, r4, #1 @ decrement it
|
||||
|
|
|
@ -168,7 +168,7 @@ vfp_hw_state_valid:
|
|||
@ else it's one 32-bit instruction, so
|
||||
@ always subtract 4 from the following
|
||||
@ instruction address.
|
||||
#ifdef CONFIG_PREEMPT
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
ldr r4, [r10, #TI_PREEMPT] @ get preempt count
|
||||
sub r11, r4, #1 @ decrement it
|
||||
|
@ -192,7 +192,7 @@ look_for_VFP_exceptions:
|
|||
@ not recognised by VFP
|
||||
|
||||
DBGSTR "not VFP"
|
||||
#ifdef CONFIG_PREEMPT
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
ldr r4, [r10, #TI_PREEMPT] @ get preempt count
|
||||
sub r11, r4, #1 @ decrement it
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
targets += dtbs
|
||||
targets += $(dtb-y)
|
||||
|
||||
dtbs: $(addprefix $(obj)/, $(dtb-y))
|
||||
|
||||
|
|
|
@ -26,7 +26,10 @@
|
|||
|
||||
typedef unsigned long elf_greg_t;
|
||||
|
||||
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
|
||||
#define ELF_NGREG (sizeof(struct user_pt_regs) / sizeof(elf_greg_t))
|
||||
#define ELF_CORE_COPY_REGS(dest, regs) \
|
||||
*(struct user_pt_regs *)&(dest) = (regs)->user_regs;
|
||||
|
||||
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
|
||||
typedef struct user_fpsimd_state elf_fpregset_t;
|
||||
|
||||
|
|
|
@ -24,7 +24,8 @@
|
|||
/*
|
||||
* Software defined PTE bits definition.
|
||||
*/
|
||||
#define PTE_VALID (_AT(pteval_t, 1) << 0) /* pte_present() check */
|
||||
#define PTE_VALID (_AT(pteval_t, 1) << 0)
|
||||
#define PTE_PROT_NONE (_AT(pteval_t, 1) << 1) /* only when !PTE_VALID */
|
||||
#define PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !pte_present() */
|
||||
#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
|
||||
#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
|
||||
|
@ -60,9 +61,12 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
|
||||
extern pgprot_t pgprot_default;
|
||||
|
||||
#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
|
||||
#define __pgprot_modify(prot,mask,bits) \
|
||||
__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
|
||||
|
||||
#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define _MOD_PROT(p, b) __pgprot_modify(p, 0, b)
|
||||
|
||||
#define PAGE_NONE __pgprot_modify(pgprot_default, PTE_TYPE_MASK, PTE_PROT_NONE)
|
||||
#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
|
||||
#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
|
@ -72,7 +76,7 @@ extern pgprot_t pgprot_default;
|
|||
#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
|
||||
#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
|
||||
|
||||
#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define __PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE_PROT_NONE)
|
||||
#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
|
||||
#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
|
@ -125,16 +129,15 @@ extern struct page *empty_zero_page;
|
|||
/*
|
||||
* The following only work if pte_present(). Undefined behaviour otherwise.
|
||||
*/
|
||||
#define pte_present(pte) (pte_val(pte) & PTE_VALID)
|
||||
#define pte_present(pte) (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE))
|
||||
#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY)
|
||||
#define pte_young(pte) (pte_val(pte) & PTE_AF)
|
||||
#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
|
||||
#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
|
||||
|
||||
#define pte_present_exec_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
|
||||
(PTE_VALID | PTE_USER))
|
||||
#define pte_valid_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
|
||||
|
||||
#define PTE_BIT_FUNC(fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
|
||||
|
@ -157,10 +160,13 @@ extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
|
|||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pte)
|
||||
{
|
||||
if (pte_present_exec_user(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
if (!pte_dirty(pte))
|
||||
pte = pte_wrprotect(pte);
|
||||
if (pte_valid_user(pte)) {
|
||||
if (pte_exec(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
if (!pte_dirty(pte))
|
||||
pte = pte_wrprotect(pte);
|
||||
}
|
||||
|
||||
set_pte(ptep, pte);
|
||||
}
|
||||
|
||||
|
@ -170,9 +176,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|||
#define pte_huge(pte) ((pte_val(pte) & PTE_TYPE_MASK) == PTE_TYPE_HUGEPAGE)
|
||||
#define pte_mkhuge(pte) (__pte((pte_val(pte) & ~PTE_TYPE_MASK) | PTE_TYPE_HUGEPAGE))
|
||||
|
||||
#define __pgprot_modify(prot,mask,bits) \
|
||||
__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
|
||||
|
||||
#define __HAVE_ARCH_PTE_SPECIAL
|
||||
|
||||
/*
|
||||
|
@ -264,7 +267,8 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
|
|||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
|
||||
const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
|
||||
PTE_PROT_NONE | PTE_VALID;
|
||||
pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
|
||||
return pte;
|
||||
}
|
||||
|
|
|
@ -395,8 +395,13 @@ __SYSCALL(370, sys_name_to_handle_at)
|
|||
__SYSCALL(371, compat_sys_open_by_handle_at)
|
||||
__SYSCALL(372, compat_sys_clock_adjtime)
|
||||
__SYSCALL(373, sys_syncfs)
|
||||
__SYSCALL(374, compat_sys_sendmmsg)
|
||||
__SYSCALL(375, sys_setns)
|
||||
__SYSCALL(376, compat_sys_process_vm_readv)
|
||||
__SYSCALL(377, compat_sys_process_vm_writev)
|
||||
__SYSCALL(378, sys_ni_syscall) /* 378 for kcmp */
|
||||
|
||||
#define __NR_compat_syscalls 374
|
||||
#define __NR_compat_syscalls 379
|
||||
|
||||
/*
|
||||
* Compat syscall numbers used by the AArch64 kernel.
|
||||
|
|
|
@ -252,10 +252,6 @@ void update_vsyscall(struct timekeeper *tk)
|
|||
|
||||
void update_vsyscall_tz(void)
|
||||
{
|
||||
++vdso_data->tb_seq_count;
|
||||
smp_wmb();
|
||||
vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
|
||||
vdso_data->tz_dsttime = sys_tz.tz_dsttime;
|
||||
smp_wmb();
|
||||
++vdso_data->tb_seq_count;
|
||||
}
|
||||
|
|
|
@ -73,8 +73,6 @@ ENTRY(__kernel_gettimeofday)
|
|||
/* If tz is NULL, return 0. */
|
||||
cbz x1, 3f
|
||||
ldp w4, w5, [vdso_data, #VDSO_TZ_MINWEST]
|
||||
seqcnt_read w9
|
||||
seqcnt_check w9, 1b
|
||||
stp w4, w5, [x1, #TZ_MINWEST]
|
||||
3:
|
||||
mov x0, xzr
|
||||
|
|
|
@ -672,33 +672,6 @@ ptrace_attach_sync_user_rbs (struct task_struct *child)
|
|||
read_unlock(&tasklist_lock);
|
||||
}
|
||||
|
||||
static inline int
|
||||
thread_matches (struct task_struct *thread, unsigned long addr)
|
||||
{
|
||||
unsigned long thread_rbs_end;
|
||||
struct pt_regs *thread_regs;
|
||||
|
||||
if (ptrace_check_attach(thread, 0) < 0)
|
||||
/*
|
||||
* If the thread is not in an attachable state, we'll
|
||||
* ignore it. The net effect is that if ADDR happens
|
||||
* to overlap with the portion of the thread's
|
||||
* register backing store that is currently residing
|
||||
* on the thread's kernel stack, then ptrace() may end
|
||||
* up accessing a stale value. But if the thread
|
||||
* isn't stopped, that's a problem anyhow, so we're
|
||||
* doing as well as we can...
|
||||
*/
|
||||
return 0;
|
||||
|
||||
thread_regs = task_pt_regs(thread);
|
||||
thread_rbs_end = ia64_get_user_rbs_end(thread, thread_regs, NULL);
|
||||
if (!on_kernel_rbs(addr, thread_regs->ar_bspstore, thread_rbs_end))
|
||||
return 0;
|
||||
|
||||
return 1; /* looks like we've got a winner */
|
||||
}
|
||||
|
||||
/*
|
||||
* Write f32-f127 back to task->thread.fph if it has been modified.
|
||||
*/
|
||||
|
|
|
@ -21,6 +21,22 @@ extern void *dma_alloc_coherent(struct device *, size_t,
|
|||
extern void dma_free_coherent(struct device *, size_t,
|
||||
void *, dma_addr_t);
|
||||
|
||||
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
/* attrs is not supported and ignored */
|
||||
return dma_alloc_coherent(dev, size, dma_handle, flag);
|
||||
}
|
||||
|
||||
static inline void dma_free_attrs(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t dma_handle,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
/* attrs is not supported and ignored */
|
||||
dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
||||
}
|
||||
|
||||
static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
||||
dma_addr_t *handle, gfp_t flag)
|
||||
{
|
||||
|
|
|
@ -64,6 +64,8 @@ extern unsigned int kobjsize(const void *objp);
|
|||
*/
|
||||
#define VMALLOC_START 0
|
||||
#define VMALLOC_END 0xffffffff
|
||||
#define KMAP_START 0
|
||||
#define KMAP_END 0xffffffff
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_syscalls 348
|
||||
#define NR_syscalls 349
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_OLD_STAT
|
||||
|
|
|
@ -353,5 +353,6 @@
|
|||
#define __NR_process_vm_readv 345
|
||||
#define __NR_process_vm_writev 346
|
||||
#define __NR_kcmp 347
|
||||
#define __NR_finit_module 348
|
||||
|
||||
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
|
||||
|
|
|
@ -368,4 +368,5 @@ ENTRY(sys_call_table)
|
|||
.long sys_process_vm_readv /* 345 */
|
||||
.long sys_process_vm_writev
|
||||
.long sys_kcmp
|
||||
.long sys_finit_module
|
||||
|
||||
|
|
|
@ -39,6 +39,11 @@
|
|||
void *empty_zero_page;
|
||||
EXPORT_SYMBOL(empty_zero_page);
|
||||
|
||||
#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
|
||||
extern void init_pointer_table(unsigned long ptable);
|
||||
extern pmd_t *zero_pgtable;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
pg_data_t pg_data_map[MAX_NUMNODES];
|
||||
|
@ -69,9 +74,6 @@ void __init m68k_setup_node(int node)
|
|||
node_set_online(node);
|
||||
}
|
||||
|
||||
extern void init_pointer_table(unsigned long ptable);
|
||||
extern pmd_t *zero_pgtable;
|
||||
|
||||
#else /* CONFIG_MMU */
|
||||
|
||||
/*
|
||||
|
|
|
@ -6,6 +6,7 @@ config MN10300
|
|||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select HAVE_ARCH_TRACEHOOK
|
||||
select HAVE_ARCH_KGDB
|
||||
select GENERIC_ATOMIC64
|
||||
select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select MODULES_USE_ELF_RELA
|
||||
|
|
|
@ -1865,7 +1865,7 @@ syscall_restore:
|
|||
|
||||
/* Are we being ptraced? */
|
||||
ldw TASK_FLAGS(%r1),%r19
|
||||
ldi (_TIF_SINGLESTEP|_TIF_BLOCKSTEP),%r2
|
||||
ldi _TIF_SYSCALL_TRACE_MASK,%r2
|
||||
and,COND(=) %r19,%r2,%r0
|
||||
b,n syscall_restore_rfi
|
||||
|
||||
|
@ -1978,15 +1978,23 @@ syscall_restore_rfi:
|
|||
/* sr2 should be set to zero for userspace syscalls */
|
||||
STREG %r0,TASK_PT_SR2(%r1)
|
||||
|
||||
pt_regs_ok:
|
||||
LDREG TASK_PT_GR31(%r1),%r2
|
||||
depi 3,31,2,%r2 /* ensure return to user mode. */
|
||||
STREG %r2,TASK_PT_IAOQ0(%r1)
|
||||
depi 3,31,2,%r2 /* ensure return to user mode. */
|
||||
STREG %r2,TASK_PT_IAOQ0(%r1)
|
||||
ldo 4(%r2),%r2
|
||||
STREG %r2,TASK_PT_IAOQ1(%r1)
|
||||
copy %r25,%r16
|
||||
b intr_restore
|
||||
nop
|
||||
copy %r25,%r16
|
||||
|
||||
pt_regs_ok:
|
||||
LDREG TASK_PT_IAOQ0(%r1),%r2
|
||||
depi 3,31,2,%r2 /* ensure return to user mode. */
|
||||
STREG %r2,TASK_PT_IAOQ0(%r1)
|
||||
LDREG TASK_PT_IAOQ1(%r1),%r2
|
||||
depi 3,31,2,%r2
|
||||
STREG %r2,TASK_PT_IAOQ1(%r1)
|
||||
b intr_restore
|
||||
copy %r25,%r16
|
||||
|
||||
.import schedule,code
|
||||
syscall_do_resched:
|
||||
|
|
|
@ -410,11 +410,13 @@ void __init init_IRQ(void)
|
|||
{
|
||||
local_irq_disable(); /* PARANOID - should already be disabled */
|
||||
mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
|
||||
claim_cpu_irqs();
|
||||
#ifdef CONFIG_SMP
|
||||
if (!cpu_eiem)
|
||||
if (!cpu_eiem) {
|
||||
claim_cpu_irqs();
|
||||
cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
|
||||
}
|
||||
#else
|
||||
claim_cpu_irqs();
|
||||
cpu_eiem = EIEM_MASK(TIMER_IRQ);
|
||||
#endif
|
||||
set_eiem(cpu_eiem); /* EIEM : enable all external intr */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#include <asm/asm-offsets.h>
|
||||
|
||||
/* PSW bits we allow the debugger to modify */
|
||||
#define USER_PSW_BITS (PSW_N | PSW_V | PSW_CB)
|
||||
#define USER_PSW_BITS (PSW_N | PSW_B | PSW_V | PSW_CB)
|
||||
|
||||
/*
|
||||
* Called by kernel/ptrace.c when detaching..
|
||||
|
|
|
@ -190,8 +190,10 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
|
|||
DBG(1,"get_sigframe: ka = %#lx, sp = %#lx, frame_size = %#lx\n",
|
||||
(unsigned long)ka, sp, frame_size);
|
||||
|
||||
/* Align alternate stack and reserve 64 bytes for the signal
|
||||
handler's frame marker. */
|
||||
if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! sas_ss_flags(sp))
|
||||
sp = current->sas_ss_sp; /* Stacks grow up! */
|
||||
sp = (current->sas_ss_sp + 0x7f) & ~0x3f; /* Stacks grow up! */
|
||||
|
||||
DBG(1,"get_sigframe: Returning sp = %#lx\n", (unsigned long)sp);
|
||||
return (void __user *) sp; /* Stacks grow up. Fun. */
|
||||
|
|
|
@ -347,16 +347,15 @@
|
|||
Sgl_isinexact_to_fix(sgl_value,exponent)
|
||||
|
||||
#define Duint_from_sgl_mantissa(sgl_value,exponent,dresultA,dresultB) \
|
||||
{Sall(sgl_value) <<= SGL_EXP_LENGTH; /* left-justify */ \
|
||||
{unsigned int val = Sall(sgl_value) << SGL_EXP_LENGTH; \
|
||||
if (exponent <= 31) { \
|
||||
Dintp1(dresultA) = 0; \
|
||||
Dintp2(dresultB) = (unsigned)Sall(sgl_value) >> (31 - exponent); \
|
||||
Dintp1(dresultA) = 0; \
|
||||
Dintp2(dresultB) = val >> (31 - exponent); \
|
||||
} \
|
||||
else { \
|
||||
Dintp1(dresultA) = Sall(sgl_value) >> (63 - exponent); \
|
||||
Dintp2(dresultB) = Sall(sgl_value) << (exponent - 31); \
|
||||
Dintp1(dresultA) = val >> (63 - exponent); \
|
||||
Dintp2(dresultB) = exponent <= 62 ? val << (exponent - 31) : 0; \
|
||||
} \
|
||||
Sall(sgl_value) >>= SGL_EXP_LENGTH; /* return to original */ \
|
||||
}
|
||||
|
||||
#define Duint_setzero(dresultA,dresultB) \
|
||||
|
|
|
@ -78,7 +78,7 @@ struct kvm_vcpu_arch_shared {
|
|||
|
||||
#define KVM_HCALL_TOKEN(num) _EV_HCALL_TOKEN(EV_KVM_VENDOR_ID, num)
|
||||
|
||||
#include <uapi/asm/epapr_hcalls.h>
|
||||
#include <asm/epapr_hcalls.h>
|
||||
|
||||
#define KVM_FEATURE_MAGIC_PAGE 1
|
||||
|
||||
|
|
|
@ -667,6 +667,19 @@ resume_kernel:
|
|||
ld r4,TI_FLAGS(r9)
|
||||
andi. r0,r4,_TIF_NEED_RESCHED
|
||||
bne 1b
|
||||
|
||||
/*
|
||||
* arch_local_irq_restore() from preempt_schedule_irq above may
|
||||
* enable hard interrupt but we really should disable interrupts
|
||||
* when we return from the interrupt, and so that we don't get
|
||||
* interrupted after loading SRR0/1.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 0
|
||||
#else
|
||||
ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */
|
||||
mtmsrd r10,1 /* Update machine state */
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
#endif /* CONFIG_PREEMPT */
|
||||
|
||||
.globl fast_exc_return_irq
|
||||
|
|
|
@ -154,12 +154,12 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
|
|||
static int kgdb_singlestep(struct pt_regs *regs)
|
||||
{
|
||||
struct thread_info *thread_info, *exception_thread_info;
|
||||
struct thread_info *backup_current_thread_info = \
|
||||
(struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
|
||||
struct thread_info *backup_current_thread_info;
|
||||
|
||||
if (user_mode(regs))
|
||||
return 0;
|
||||
|
||||
backup_current_thread_info = (struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
|
||||
/*
|
||||
* On Book E and perhaps other processors, singlestep is handled on
|
||||
* the critical exception stack. This causes current_thread_info()
|
||||
|
@ -185,6 +185,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
|
|||
/* Restore current_thread_info lastly. */
|
||||
memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
|
||||
|
||||
kfree(backup_current_thread_info);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -494,10 +494,15 @@ void timer_interrupt(struct pt_regs * regs)
|
|||
set_dec(DECREMENTER_MAX);
|
||||
|
||||
/* Some implementations of hotplug will get timer interrupts while
|
||||
* offline, just ignore these
|
||||
* offline, just ignore these and we also need to set
|
||||
* decrementers_next_tb as MAX to make sure __check_irq_replay
|
||||
* don't replay timer interrupt when return, otherwise we'll trap
|
||||
* here infinitely :(
|
||||
*/
|
||||
if (!cpu_online(smp_processor_id()))
|
||||
if (!cpu_online(smp_processor_id())) {
|
||||
*next_tb = ~(u64)0;
|
||||
return;
|
||||
}
|
||||
|
||||
/* Conditionally hard-enable interrupts now that the DEC has been
|
||||
* bumped to its maximum value
|
||||
|
|
|
@ -79,7 +79,9 @@ static void flush_tlb_power7(struct kvm_vcpu *vcpu)
|
|||
static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
unsigned long srr1 = vcpu->arch.shregs.msr;
|
||||
#ifdef CONFIG_PPC_POWERNV
|
||||
struct opal_machine_check_event *opal_evt;
|
||||
#endif
|
||||
long handled = 1;
|
||||
|
||||
if (srr1 & SRR1_MC_LDSTERR) {
|
||||
|
@ -117,6 +119,7 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
|
|||
handled = 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC_POWERNV
|
||||
/*
|
||||
* See if OPAL has already handled the condition.
|
||||
* We assume that if the condition is recovered then OPAL
|
||||
|
@ -131,6 +134,7 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
|
|||
|
||||
if (handled)
|
||||
opal_evt->in_use = 0;
|
||||
#endif
|
||||
|
||||
return handled;
|
||||
}
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#define OP_31_XOP_TRAP 4
|
||||
#define OP_31_XOP_LWZX 23
|
||||
#define OP_31_XOP_TRAP_64 68
|
||||
#define OP_31_XOP_DCBF 86
|
||||
#define OP_31_XOP_LBZX 87
|
||||
#define OP_31_XOP_STWX 151
|
||||
#define OP_31_XOP_STBX 215
|
||||
|
@ -374,6 +375,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
|
|||
emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
|
||||
break;
|
||||
|
||||
case OP_31_XOP_DCBF:
|
||||
case OP_31_XOP_DCBI:
|
||||
/* Do nothing. The guest is performing dcbi because
|
||||
* hardware DMA is not snooped by the dcache, but
|
||||
|
|
|
@ -52,7 +52,7 @@ static int power7_marked_instr_event(u64 mmcr1)
|
|||
for (pmc = 0; pmc < 4; pmc++) {
|
||||
psel = mmcr1 & (OPROFILE_PM_PMCSEL_MSK
|
||||
<< (OPROFILE_MAX_PMC_NUM - pmc)
|
||||
* OPROFILE_MAX_PMC_NUM);
|
||||
* OPROFILE_PMSEL_FIELD_WIDTH);
|
||||
psel = (psel >> ((OPROFILE_MAX_PMC_NUM - pmc)
|
||||
* OPROFILE_PMSEL_FIELD_WIDTH)) & ~1ULL;
|
||||
unit = mmcr1 & (OPROFILE_PM_UNIT_MSK
|
||||
|
|
|
@ -236,6 +236,13 @@ out:
|
|||
|
||||
static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
|
||||
{
|
||||
/*
|
||||
* We don't support CPU hotplug. Don't unmap after the system
|
||||
* has already made it to a running state.
|
||||
*/
|
||||
if (system_state != SYSTEM_BOOTING)
|
||||
return 0;
|
||||
|
||||
if (sdcasr_mapbase)
|
||||
iounmap(sdcasr_mapbase);
|
||||
if (sdcpwr_mapbase)
|
||||
|
|
|
@ -24,8 +24,8 @@ CHECKFLAGS += -D__s390__ -msize-long
|
|||
else
|
||||
LD_BFD := elf64-s390
|
||||
LDFLAGS := -m elf64_s390
|
||||
KBUILD_AFLAGS_MODULE += -fpic -D__PIC__
|
||||
KBUILD_CFLAGS_MODULE += -fpic -D__PIC__
|
||||
KBUILD_AFLAGS_MODULE += -fPIC
|
||||
KBUILD_CFLAGS_MODULE += -fPIC
|
||||
KBUILD_CFLAGS += -m64
|
||||
KBUILD_AFLAGS += -m64
|
||||
UTS_MACHINE := s390x
|
||||
|
|
|
@ -10,4 +10,10 @@
|
|||
*/
|
||||
#define MAX_DMA_ADDRESS 0x80000000
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
extern int isa_dma_bridge_buggy;
|
||||
#else
|
||||
#define isa_dma_bridge_buggy (0)
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_S390_DMA_H */
|
||||
|
|
|
@ -85,6 +85,11 @@ static inline void iounmap(volatile void __iomem *addr)
|
|||
#define __raw_writel zpci_write_u32
|
||||
#define __raw_writeq zpci_write_u64
|
||||
|
||||
#define readb_relaxed readb
|
||||
#define readw_relaxed readw
|
||||
#define readl_relaxed readl
|
||||
#define readq_relaxed readq
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
|
|
@ -2,43 +2,61 @@
|
|||
#define _ASM_IRQ_H
|
||||
|
||||
#include <linux/hardirq.h>
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
enum interruption_class {
|
||||
enum interruption_main_class {
|
||||
EXTERNAL_INTERRUPT,
|
||||
IO_INTERRUPT,
|
||||
EXTINT_CLK,
|
||||
EXTINT_EXC,
|
||||
EXTINT_EMS,
|
||||
EXTINT_TMR,
|
||||
EXTINT_TLA,
|
||||
EXTINT_PFL,
|
||||
EXTINT_DSD,
|
||||
EXTINT_VRT,
|
||||
EXTINT_SCP,
|
||||
EXTINT_IUC,
|
||||
EXTINT_CMS,
|
||||
EXTINT_CMC,
|
||||
EXTINT_CMR,
|
||||
IOINT_CIO,
|
||||
IOINT_QAI,
|
||||
IOINT_DAS,
|
||||
IOINT_C15,
|
||||
IOINT_C70,
|
||||
IOINT_TAP,
|
||||
IOINT_VMR,
|
||||
IOINT_LCS,
|
||||
IOINT_CLW,
|
||||
IOINT_CTC,
|
||||
IOINT_APB,
|
||||
IOINT_ADM,
|
||||
IOINT_CSC,
|
||||
IOINT_PCI,
|
||||
IOINT_MSI,
|
||||
NMI_NMI,
|
||||
NR_IRQS,
|
||||
NR_IRQS
|
||||
};
|
||||
|
||||
enum interruption_class {
|
||||
IRQEXT_CLK,
|
||||
IRQEXT_EXC,
|
||||
IRQEXT_EMS,
|
||||
IRQEXT_TMR,
|
||||
IRQEXT_TLA,
|
||||
IRQEXT_PFL,
|
||||
IRQEXT_DSD,
|
||||
IRQEXT_VRT,
|
||||
IRQEXT_SCP,
|
||||
IRQEXT_IUC,
|
||||
IRQEXT_CMS,
|
||||
IRQEXT_CMC,
|
||||
IRQEXT_CMR,
|
||||
IRQIO_CIO,
|
||||
IRQIO_QAI,
|
||||
IRQIO_DAS,
|
||||
IRQIO_C15,
|
||||
IRQIO_C70,
|
||||
IRQIO_TAP,
|
||||
IRQIO_VMR,
|
||||
IRQIO_LCS,
|
||||
IRQIO_CLW,
|
||||
IRQIO_CTC,
|
||||
IRQIO_APB,
|
||||
IRQIO_ADM,
|
||||
IRQIO_CSC,
|
||||
IRQIO_PCI,
|
||||
IRQIO_MSI,
|
||||
NMI_NMI,
|
||||
CPU_RST,
|
||||
NR_ARCH_IRQS
|
||||
};
|
||||
|
||||
struct irq_stat {
|
||||
unsigned int irqs[NR_ARCH_IRQS];
|
||||
};
|
||||
|
||||
DECLARE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
|
||||
|
||||
static __always_inline void inc_irq_stat(enum interruption_class irq)
|
||||
{
|
||||
__get_cpu_var(irq_stat).irqs[irq]++;
|
||||
}
|
||||
|
||||
struct ext_code {
|
||||
unsigned short subcode;
|
||||
unsigned short code;
|
||||
|
|
|
@ -1387,10 +1387,7 @@ static inline int has_transparent_hugepage(void)
|
|||
|
||||
static inline unsigned long pmd_pfn(pmd_t pmd)
|
||||
{
|
||||
if (pmd_trans_huge(pmd))
|
||||
return pmd_val(pmd) >> HPAGE_SHIFT;
|
||||
else
|
||||
return pmd_val(pmd) >> PAGE_SHIFT;
|
||||
return pmd_val(pmd) >> PAGE_SHIFT;
|
||||
}
|
||||
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
||||
|
||||
|
|
|
@ -128,4 +128,32 @@ static inline unsigned long long get_clock_monotonic(void)
|
|||
return get_clock_xt() - sched_clock_base_cc;
|
||||
}
|
||||
|
||||
/**
|
||||
* tod_to_ns - convert a TOD format value to nanoseconds
|
||||
* @todval: to be converted TOD format value
|
||||
* Returns: number of nanoseconds that correspond to the TOD format value
|
||||
*
|
||||
* Converting a 64 Bit TOD format value to nanoseconds means that the value
|
||||
* must be divided by 4.096. In order to achieve that we multiply with 125
|
||||
* and divide by 512:
|
||||
*
|
||||
* ns = (todval * 125) >> 9;
|
||||
*
|
||||
* In order to avoid an overflow with the multiplication we can rewrite this.
|
||||
* With a split todval == 2^32 * th + tl (th upper 32 bits, tl lower 32 bits)
|
||||
* we end up with
|
||||
*
|
||||
* ns = ((2^32 * th + tl) * 125 ) >> 9;
|
||||
* -> ns = (2^23 * th * 125) + ((tl * 125) >> 9);
|
||||
*
|
||||
*/
|
||||
static inline unsigned long long tod_to_ns(unsigned long long todval)
|
||||
{
|
||||
unsigned long long ns;
|
||||
|
||||
ns = ((todval >> 32) << 23) * 125;
|
||||
ns += ((todval & 0xffffffff) * 125) >> 9;
|
||||
return ns;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -279,7 +279,8 @@
|
|||
#define __NR_process_vm_writev 341
|
||||
#define __NR_s390_runtime_instr 342
|
||||
#define __NR_kcmp 343
|
||||
#define NR_syscalls 344
|
||||
#define __NR_finit_module 344
|
||||
#define NR_syscalls 345
|
||||
|
||||
/*
|
||||
* There are some system calls that are not present on 64 bit, some
|
||||
|
|
|
@ -1659,3 +1659,9 @@ ENTRY(sys_kcmp_wrapper)
|
|||
llgfr %r5,%r5 # unsigned long
|
||||
llgfr %r6,%r6 # unsigned long
|
||||
jg sys_kcmp
|
||||
|
||||
ENTRY(sys_finit_module_wrapper)
|
||||
lgfr %r2,%r2 # int
|
||||
llgtr %r3,%r3 # const char __user *
|
||||
lgfr %r4,%r4 # int
|
||||
jg sys_finit_module
|
||||
|
|
|
@ -1127,13 +1127,14 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
|
|||
if (i == DEBUG_MAX_VIEWS) {
|
||||
pr_err("Registering view %s/%s would exceed the maximum "
|
||||
"number of views %i\n", id->name, view->name, i);
|
||||
debugfs_remove(pde);
|
||||
rc = -1;
|
||||
} else {
|
||||
id->views[i] = view;
|
||||
id->debugfs_entries[i] = pde;
|
||||
}
|
||||
spin_unlock_irqrestore(&id->lock, flags);
|
||||
if (rc)
|
||||
debugfs_remove(pde);
|
||||
out:
|
||||
return rc;
|
||||
}
|
||||
|
@ -1146,9 +1147,9 @@ EXPORT_SYMBOL(debug_register_view);
|
|||
int
|
||||
debug_unregister_view(debug_info_t * id, struct debug_view *view)
|
||||
{
|
||||
int rc = 0;
|
||||
int i;
|
||||
struct dentry *dentry = NULL;
|
||||
unsigned long flags;
|
||||
int i, rc = 0;
|
||||
|
||||
if (!id)
|
||||
goto out;
|
||||
|
@ -1160,10 +1161,12 @@ debug_unregister_view(debug_info_t * id, struct debug_view *view)
|
|||
if (i == DEBUG_MAX_VIEWS)
|
||||
rc = -1;
|
||||
else {
|
||||
debugfs_remove(id->debugfs_entries[i]);
|
||||
dentry = id->debugfs_entries[i];
|
||||
id->views[i] = NULL;
|
||||
id->debugfs_entries[i] = NULL;
|
||||
}
|
||||
spin_unlock_irqrestore(&id->lock, flags);
|
||||
debugfs_remove(dentry);
|
||||
out:
|
||||
return rc;
|
||||
}
|
||||
|
|
|
@ -24,43 +24,65 @@
|
|||
#include <asm/irq.h>
|
||||
#include "entry.h"
|
||||
|
||||
DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
|
||||
EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
|
||||
|
||||
struct irq_class {
|
||||
char *name;
|
||||
char *desc;
|
||||
};
|
||||
|
||||
static const struct irq_class intrclass_names[] = {
|
||||
/*
|
||||
* The list of "main" irq classes on s390. This is the list of interrrupts
|
||||
* that appear both in /proc/stat ("intr" line) and /proc/interrupts.
|
||||
* Historically only external and I/O interrupts have been part of /proc/stat.
|
||||
* We can't add the split external and I/O sub classes since the first field
|
||||
* in the "intr" line in /proc/stat is supposed to be the sum of all other
|
||||
* fields.
|
||||
* Since the external and I/O interrupt fields are already sums we would end
|
||||
* up with having a sum which accounts each interrupt twice.
|
||||
*/
|
||||
static const struct irq_class irqclass_main_desc[NR_IRQS] = {
|
||||
[EXTERNAL_INTERRUPT] = {.name = "EXT"},
|
||||
[IO_INTERRUPT] = {.name = "I/O"},
|
||||
[EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
|
||||
[EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
|
||||
[EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
|
||||
[EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
|
||||
[EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
|
||||
[EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
|
||||
[EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
|
||||
[EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
|
||||
[EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
|
||||
[EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
|
||||
[EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
|
||||
[EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
|
||||
[EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
|
||||
[IOINT_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
|
||||
[IOINT_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
|
||||
[IOINT_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
|
||||
[IOINT_C15] = {.name = "C15", .desc = "[I/O] 3215"},
|
||||
[IOINT_C70] = {.name = "C70", .desc = "[I/O] 3270"},
|
||||
[IOINT_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
|
||||
[IOINT_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
|
||||
[IOINT_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
|
||||
[IOINT_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
|
||||
[IOINT_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
|
||||
[IOINT_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
|
||||
[IOINT_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
|
||||
[IOINT_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
|
||||
[IOINT_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
|
||||
[IOINT_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
|
||||
[IO_INTERRUPT] = {.name = "I/O"}
|
||||
};
|
||||
|
||||
/*
|
||||
* The list of split external and I/O interrupts that appear only in
|
||||
* /proc/interrupts.
|
||||
* In addition this list contains non external / I/O events like NMIs.
|
||||
*/
|
||||
static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
|
||||
[IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
|
||||
[IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
|
||||
[IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
|
||||
[IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
|
||||
[IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
|
||||
[IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
|
||||
[IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
|
||||
[IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
|
||||
[IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
|
||||
[IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
|
||||
[IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
|
||||
[IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
|
||||
[IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
|
||||
[IRQIO_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
|
||||
[IRQIO_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
|
||||
[IRQIO_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
|
||||
[IRQIO_C15] = {.name = "C15", .desc = "[I/O] 3215"},
|
||||
[IRQIO_C70] = {.name = "C70", .desc = "[I/O] 3270"},
|
||||
[IRQIO_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
|
||||
[IRQIO_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
|
||||
[IRQIO_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
|
||||
[IRQIO_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
|
||||
[IRQIO_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
|
||||
[IRQIO_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
|
||||
[IRQIO_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
|
||||
[IRQIO_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
|
||||
[IRQIO_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
|
||||
[IRQIO_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
|
||||
[NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
|
||||
[CPU_RST] = {.name = "RST", .desc = "[CPU] CPU Restart"},
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -68,30 +90,34 @@ static const struct irq_class intrclass_names[] = {
|
|||
*/
|
||||
int show_interrupts(struct seq_file *p, void *v)
|
||||
{
|
||||
int i = *(loff_t *) v, j;
|
||||
int irq = *(loff_t *) v;
|
||||
int cpu;
|
||||
|
||||
get_online_cpus();
|
||||
if (i == 0) {
|
||||
if (irq == 0) {
|
||||
seq_puts(p, " ");
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "CPU%d ",j);
|
||||
for_each_online_cpu(cpu)
|
||||
seq_printf(p, "CPU%d ", cpu);
|
||||
seq_putc(p, '\n');
|
||||
}
|
||||
|
||||
if (i < NR_IRQS) {
|
||||
seq_printf(p, "%s: ", intrclass_names[i].name);
|
||||
#ifndef CONFIG_SMP
|
||||
seq_printf(p, "%10u ", kstat_irqs(i));
|
||||
#else
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
|
||||
#endif
|
||||
if (intrclass_names[i].desc)
|
||||
seq_printf(p, " %s", intrclass_names[i].desc);
|
||||
seq_putc(p, '\n');
|
||||
}
|
||||
if (irq < NR_IRQS) {
|
||||
seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
|
||||
for_each_online_cpu(cpu)
|
||||
seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[irq]);
|
||||
seq_putc(p, '\n');
|
||||
goto skip_arch_irqs;
|
||||
}
|
||||
for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
|
||||
seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
|
||||
for_each_online_cpu(cpu)
|
||||
seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).irqs[irq]);
|
||||
if (irqclass_sub_desc[irq].desc)
|
||||
seq_printf(p, " %s", irqclass_sub_desc[irq].desc);
|
||||
seq_putc(p, '\n');
|
||||
}
|
||||
skip_arch_irqs:
|
||||
put_online_cpus();
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -222,7 +248,7 @@ void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
|
|||
/* Serve timer interrupts first. */
|
||||
clock_comparator_work();
|
||||
}
|
||||
kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
|
||||
kstat_incr_irqs_this_cpu(EXTERNAL_INTERRUPT, NULL);
|
||||
if (ext_code.code != 0x1004)
|
||||
__get_cpu_var(s390_idle).nohz_delay = 1;
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue